1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 #include "iavf_generic_flow.h" 31 32 static int iavf_dev_configure(struct rte_eth_dev *dev); 33 static int iavf_dev_start(struct rte_eth_dev *dev); 34 static void iavf_dev_stop(struct rte_eth_dev *dev); 35 static void iavf_dev_close(struct rte_eth_dev *dev); 36 static int iavf_dev_reset(struct rte_eth_dev *dev); 37 static int iavf_dev_info_get(struct rte_eth_dev *dev, 38 struct rte_eth_dev_info *dev_info); 39 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 40 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 41 struct rte_eth_stats *stats); 42 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 43 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 44 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 45 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 46 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 47 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 48 struct rte_ether_addr *addr, 49 uint32_t index, 50 uint32_t pool); 51 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 52 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 53 uint16_t vlan_id, int on); 54 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 55 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 56 struct rte_eth_rss_reta_entry64 *reta_conf, 57 uint16_t reta_size); 58 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 59 struct rte_eth_rss_reta_entry64 *reta_conf, 60 uint16_t reta_size); 61 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 62 struct rte_eth_rss_conf *rss_conf); 63 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 64 struct rte_eth_rss_conf *rss_conf); 65 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 66 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 67 struct rte_ether_addr *mac_addr); 68 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 69 uint16_t queue_id); 70 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 71 uint16_t queue_id); 72 static int iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 73 enum rte_filter_type filter_type, 74 enum rte_filter_op filter_op, 75 void *arg); 76 77 static const struct rte_pci_id pci_id_iavf_map[] = { 78 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 79 { .vendor_id = 0, /* sentinel */ }, 80 }; 81 82 static const struct eth_dev_ops iavf_eth_dev_ops = { 83 .dev_configure = iavf_dev_configure, 84 .dev_start = iavf_dev_start, 85 .dev_stop = iavf_dev_stop, 86 .dev_close = iavf_dev_close, 87 .dev_reset = iavf_dev_reset, 88 .dev_infos_get = iavf_dev_info_get, 89 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 90 .link_update = iavf_dev_link_update, 91 .stats_get = iavf_dev_stats_get, 92 .stats_reset = iavf_dev_stats_reset, 93 .promiscuous_enable = iavf_dev_promiscuous_enable, 94 .promiscuous_disable = iavf_dev_promiscuous_disable, 95 .allmulticast_enable = iavf_dev_allmulticast_enable, 96 .allmulticast_disable = iavf_dev_allmulticast_disable, 97 .mac_addr_add = iavf_dev_add_mac_addr, 98 .mac_addr_remove = iavf_dev_del_mac_addr, 99 .vlan_filter_set = iavf_dev_vlan_filter_set, 100 .vlan_offload_set = iavf_dev_vlan_offload_set, 101 .rx_queue_start = iavf_dev_rx_queue_start, 102 .rx_queue_stop = iavf_dev_rx_queue_stop, 103 .tx_queue_start = iavf_dev_tx_queue_start, 104 .tx_queue_stop = iavf_dev_tx_queue_stop, 105 .rx_queue_setup = iavf_dev_rx_queue_setup, 106 .rx_queue_release = iavf_dev_rx_queue_release, 107 .tx_queue_setup = iavf_dev_tx_queue_setup, 108 .tx_queue_release = iavf_dev_tx_queue_release, 109 .mac_addr_set = iavf_dev_set_default_mac_addr, 110 .reta_update = iavf_dev_rss_reta_update, 111 .reta_query = iavf_dev_rss_reta_query, 112 .rss_hash_update = iavf_dev_rss_hash_update, 113 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 114 .rxq_info_get = iavf_dev_rxq_info_get, 115 .txq_info_get = iavf_dev_txq_info_get, 116 .rx_queue_count = iavf_dev_rxq_count, 117 .rx_descriptor_status = iavf_dev_rx_desc_status, 118 .tx_descriptor_status = iavf_dev_tx_desc_status, 119 .mtu_set = iavf_dev_mtu_set, 120 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 121 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 122 .filter_ctrl = iavf_dev_filter_ctrl, 123 }; 124 125 static int 126 iavf_dev_configure(struct rte_eth_dev *dev) 127 { 128 struct iavf_adapter *ad = 129 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 130 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 131 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 132 133 ad->rx_bulk_alloc_allowed = true; 134 /* Initialize to TRUE. If any of Rx queues doesn't meet the 135 * vector Rx/Tx preconditions, it will be reset. 136 */ 137 ad->rx_vec_allowed = true; 138 ad->tx_vec_allowed = true; 139 140 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 141 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 142 143 /* Vlan stripping setting */ 144 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { 145 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 146 iavf_enable_vlan_strip(ad); 147 else 148 iavf_disable_vlan_strip(ad); 149 } 150 return 0; 151 } 152 153 static int 154 iavf_init_rss(struct iavf_adapter *adapter) 155 { 156 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 157 struct rte_eth_rss_conf *rss_conf; 158 uint8_t i, j, nb_q; 159 int ret; 160 161 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 162 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 163 IAVF_MAX_NUM_QUEUES); 164 165 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 166 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 167 return -ENOTSUP; 168 } 169 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 170 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 171 /* set all lut items to default queue */ 172 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 173 vf->rss_lut[i] = 0; 174 ret = iavf_configure_rss_lut(adapter); 175 return ret; 176 } 177 178 /* In IAVF, RSS enablement is set by PF driver. It is not supported 179 * to set based on rss_conf->rss_hf. 180 */ 181 182 /* configure RSS key */ 183 if (!rss_conf->rss_key) { 184 /* Calculate the default hash key */ 185 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 186 vf->rss_key[i] = (uint8_t)rte_rand(); 187 } else 188 rte_memcpy(vf->rss_key, rss_conf->rss_key, 189 RTE_MIN(rss_conf->rss_key_len, 190 vf->vf_res->rss_key_size)); 191 192 /* init RSS LUT table */ 193 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 194 if (j >= nb_q) 195 j = 0; 196 vf->rss_lut[i] = j; 197 } 198 /* send virtchnnl ops to configure rss*/ 199 ret = iavf_configure_rss_lut(adapter); 200 if (ret) 201 return ret; 202 ret = iavf_configure_rss_key(adapter); 203 if (ret) 204 return ret; 205 206 return 0; 207 } 208 209 static int 210 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 211 { 212 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 213 struct rte_eth_dev_data *dev_data = dev->data; 214 uint16_t buf_size, max_pkt_len, len; 215 216 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 217 218 /* Calculate the maximum packet length allowed */ 219 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 220 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 221 222 /* Check if the jumbo frame and maximum packet length are set 223 * correctly. 224 */ 225 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 226 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 227 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 228 PMD_DRV_LOG(ERR, "maximum packet length must be " 229 "larger than %u and smaller than %u, " 230 "as jumbo frame is enabled", 231 (uint32_t)RTE_ETHER_MAX_LEN, 232 (uint32_t)IAVF_FRAME_SIZE_MAX); 233 return -EINVAL; 234 } 235 } else { 236 if (max_pkt_len < RTE_ETHER_MIN_LEN || 237 max_pkt_len > RTE_ETHER_MAX_LEN) { 238 PMD_DRV_LOG(ERR, "maximum packet length must be " 239 "larger than %u and smaller than %u, " 240 "as jumbo frame is disabled", 241 (uint32_t)RTE_ETHER_MIN_LEN, 242 (uint32_t)RTE_ETHER_MAX_LEN); 243 return -EINVAL; 244 } 245 } 246 247 rxq->max_pkt_len = max_pkt_len; 248 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 249 (rxq->max_pkt_len + 2 * IAVF_VLAN_TAG_SIZE) > buf_size) { 250 dev_data->scattered_rx = 1; 251 } 252 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 253 IAVF_WRITE_FLUSH(hw); 254 255 return 0; 256 } 257 258 static int 259 iavf_init_queues(struct rte_eth_dev *dev) 260 { 261 struct iavf_rx_queue **rxq = 262 (struct iavf_rx_queue **)dev->data->rx_queues; 263 int i, ret = IAVF_SUCCESS; 264 265 for (i = 0; i < dev->data->nb_rx_queues; i++) { 266 if (!rxq[i] || !rxq[i]->q_set) 267 continue; 268 ret = iavf_init_rxq(dev, rxq[i]); 269 if (ret != IAVF_SUCCESS) 270 break; 271 } 272 /* set rx/tx function to vector/scatter/single-segment 273 * according to parameters 274 */ 275 iavf_set_rx_function(dev); 276 iavf_set_tx_function(dev); 277 278 return ret; 279 } 280 281 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 282 struct rte_intr_handle *intr_handle) 283 { 284 struct iavf_adapter *adapter = 285 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 286 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 287 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 288 uint16_t interval, i; 289 int vec; 290 291 if (rte_intr_cap_multiple(intr_handle) && 292 dev->data->dev_conf.intr_conf.rxq) { 293 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 294 return -1; 295 } 296 297 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 298 intr_handle->intr_vec = 299 rte_zmalloc("intr_vec", 300 dev->data->nb_rx_queues * sizeof(int), 0); 301 if (!intr_handle->intr_vec) { 302 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 303 dev->data->nb_rx_queues); 304 return -1; 305 } 306 } 307 308 if (!dev->data->dev_conf.intr_conf.rxq || 309 !rte_intr_dp_is_en(intr_handle)) { 310 /* Rx interrupt disabled, Map interrupt only for writeback */ 311 vf->nb_msix = 1; 312 if (vf->vf_res->vf_cap_flags & 313 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 314 /* If WB_ON_ITR supports, enable it */ 315 vf->msix_base = IAVF_RX_VEC_START; 316 IAVF_WRITE_REG(hw, 317 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 318 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK | 319 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK); 320 } else { 321 /* If no WB_ON_ITR offload flags, need to set 322 * interrupt for descriptor write back. 323 */ 324 vf->msix_base = IAVF_MISC_VEC_ID; 325 326 /* set ITR to max */ 327 interval = iavf_calc_itr_interval( 328 IAVF_QUEUE_ITR_INTERVAL_MAX); 329 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 330 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 331 (IAVF_ITR_INDEX_DEFAULT << 332 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 333 (interval << 334 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 335 } 336 IAVF_WRITE_FLUSH(hw); 337 /* map all queues to the same interrupt */ 338 for (i = 0; i < dev->data->nb_rx_queues; i++) 339 vf->rxq_map[vf->msix_base] |= 1 << i; 340 } else { 341 if (!rte_intr_allow_others(intr_handle)) { 342 vf->nb_msix = 1; 343 vf->msix_base = IAVF_MISC_VEC_ID; 344 for (i = 0; i < dev->data->nb_rx_queues; i++) { 345 vf->rxq_map[vf->msix_base] |= 1 << i; 346 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 347 } 348 PMD_DRV_LOG(DEBUG, 349 "vector %u are mapping to all Rx queues", 350 vf->msix_base); 351 } else { 352 /* If Rx interrupt is reuquired, and we can use 353 * multi interrupts, then the vec is from 1 354 */ 355 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 356 intr_handle->nb_efd); 357 vf->msix_base = IAVF_RX_VEC_START; 358 vec = IAVF_RX_VEC_START; 359 for (i = 0; i < dev->data->nb_rx_queues; i++) { 360 vf->rxq_map[vec] |= 1 << i; 361 intr_handle->intr_vec[i] = vec++; 362 if (vec >= vf->nb_msix) 363 vec = IAVF_RX_VEC_START; 364 } 365 PMD_DRV_LOG(DEBUG, 366 "%u vectors are mapping to %u Rx queues", 367 vf->nb_msix, dev->data->nb_rx_queues); 368 } 369 } 370 371 if (iavf_config_irq_map(adapter)) { 372 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 373 return -1; 374 } 375 return 0; 376 } 377 378 static int 379 iavf_start_queues(struct rte_eth_dev *dev) 380 { 381 struct iavf_rx_queue *rxq; 382 struct iavf_tx_queue *txq; 383 int i; 384 385 for (i = 0; i < dev->data->nb_tx_queues; i++) { 386 txq = dev->data->tx_queues[i]; 387 if (txq->tx_deferred_start) 388 continue; 389 if (iavf_dev_tx_queue_start(dev, i) != 0) { 390 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 391 return -1; 392 } 393 } 394 395 for (i = 0; i < dev->data->nb_rx_queues; i++) { 396 rxq = dev->data->rx_queues[i]; 397 if (rxq->rx_deferred_start) 398 continue; 399 if (iavf_dev_rx_queue_start(dev, i) != 0) { 400 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 401 return -1; 402 } 403 } 404 405 return 0; 406 } 407 408 static int 409 iavf_dev_start(struct rte_eth_dev *dev) 410 { 411 struct iavf_adapter *adapter = 412 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 413 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 414 struct rte_intr_handle *intr_handle = dev->intr_handle; 415 416 PMD_INIT_FUNC_TRACE(); 417 418 adapter->stopped = 0; 419 420 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 421 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 422 dev->data->nb_tx_queues); 423 424 if (iavf_init_queues(dev) != 0) { 425 PMD_DRV_LOG(ERR, "failed to do Queue init"); 426 return -1; 427 } 428 429 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 430 if (iavf_init_rss(adapter) != 0) { 431 PMD_DRV_LOG(ERR, "configure rss failed"); 432 goto err_rss; 433 } 434 } 435 436 if (iavf_configure_queues(adapter) != 0) { 437 PMD_DRV_LOG(ERR, "configure queues failed"); 438 goto err_queue; 439 } 440 441 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 442 PMD_DRV_LOG(ERR, "configure irq failed"); 443 goto err_queue; 444 } 445 /* re-enable intr again, because efd assign may change */ 446 if (dev->data->dev_conf.intr_conf.rxq != 0) { 447 rte_intr_disable(intr_handle); 448 rte_intr_enable(intr_handle); 449 } 450 451 /* Set all mac addrs */ 452 iavf_add_del_all_mac_addr(adapter, true); 453 454 if (iavf_start_queues(dev) != 0) { 455 PMD_DRV_LOG(ERR, "enable queues failed"); 456 goto err_mac; 457 } 458 459 return 0; 460 461 err_mac: 462 iavf_add_del_all_mac_addr(adapter, false); 463 err_queue: 464 err_rss: 465 return -1; 466 } 467 468 static void 469 iavf_dev_stop(struct rte_eth_dev *dev) 470 { 471 struct iavf_adapter *adapter = 472 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 473 struct rte_intr_handle *intr_handle = dev->intr_handle; 474 475 PMD_INIT_FUNC_TRACE(); 476 477 if (adapter->stopped == 1) 478 return; 479 480 iavf_stop_queues(dev); 481 482 /* Disable the interrupt for Rx */ 483 rte_intr_efd_disable(intr_handle); 484 /* Rx interrupt vector mapping free */ 485 if (intr_handle->intr_vec) { 486 rte_free(intr_handle->intr_vec); 487 intr_handle->intr_vec = NULL; 488 } 489 490 /* remove all mac addrs */ 491 iavf_add_del_all_mac_addr(adapter, false); 492 adapter->stopped = 1; 493 } 494 495 static int 496 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 497 { 498 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 499 500 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs; 501 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs; 502 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 503 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 504 dev_info->hash_key_size = vf->vf_res->rss_key_size; 505 dev_info->reta_size = vf->vf_res->rss_lut_size; 506 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 507 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 508 dev_info->rx_offload_capa = 509 DEV_RX_OFFLOAD_VLAN_STRIP | 510 DEV_RX_OFFLOAD_QINQ_STRIP | 511 DEV_RX_OFFLOAD_IPV4_CKSUM | 512 DEV_RX_OFFLOAD_UDP_CKSUM | 513 DEV_RX_OFFLOAD_TCP_CKSUM | 514 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 515 DEV_RX_OFFLOAD_SCATTER | 516 DEV_RX_OFFLOAD_JUMBO_FRAME | 517 DEV_RX_OFFLOAD_VLAN_FILTER | 518 DEV_RX_OFFLOAD_RSS_HASH; 519 dev_info->tx_offload_capa = 520 DEV_TX_OFFLOAD_VLAN_INSERT | 521 DEV_TX_OFFLOAD_QINQ_INSERT | 522 DEV_TX_OFFLOAD_IPV4_CKSUM | 523 DEV_TX_OFFLOAD_UDP_CKSUM | 524 DEV_TX_OFFLOAD_TCP_CKSUM | 525 DEV_TX_OFFLOAD_SCTP_CKSUM | 526 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 527 DEV_TX_OFFLOAD_TCP_TSO | 528 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 529 DEV_TX_OFFLOAD_GRE_TNL_TSO | 530 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 531 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 532 DEV_TX_OFFLOAD_MULTI_SEGS; 533 534 dev_info->default_rxconf = (struct rte_eth_rxconf) { 535 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 536 .rx_drop_en = 0, 537 .offloads = 0, 538 }; 539 540 dev_info->default_txconf = (struct rte_eth_txconf) { 541 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 542 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 543 .offloads = 0, 544 }; 545 546 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 547 .nb_max = IAVF_MAX_RING_DESC, 548 .nb_min = IAVF_MIN_RING_DESC, 549 .nb_align = IAVF_ALIGN_RING_DESC, 550 }; 551 552 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 553 .nb_max = IAVF_MAX_RING_DESC, 554 .nb_min = IAVF_MIN_RING_DESC, 555 .nb_align = IAVF_ALIGN_RING_DESC, 556 }; 557 558 return 0; 559 } 560 561 static const uint32_t * 562 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 563 { 564 static const uint32_t ptypes[] = { 565 RTE_PTYPE_L2_ETHER, 566 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 567 RTE_PTYPE_L4_FRAG, 568 RTE_PTYPE_L4_ICMP, 569 RTE_PTYPE_L4_NONFRAG, 570 RTE_PTYPE_L4_SCTP, 571 RTE_PTYPE_L4_TCP, 572 RTE_PTYPE_L4_UDP, 573 RTE_PTYPE_UNKNOWN 574 }; 575 return ptypes; 576 } 577 578 int 579 iavf_dev_link_update(struct rte_eth_dev *dev, 580 __rte_unused int wait_to_complete) 581 { 582 struct rte_eth_link new_link; 583 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 584 585 /* Only read status info stored in VF, and the info is updated 586 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 587 */ 588 switch (vf->link_speed) { 589 case 10: 590 new_link.link_speed = ETH_SPEED_NUM_10M; 591 break; 592 case 100: 593 new_link.link_speed = ETH_SPEED_NUM_100M; 594 break; 595 case 1000: 596 new_link.link_speed = ETH_SPEED_NUM_1G; 597 break; 598 case 10000: 599 new_link.link_speed = ETH_SPEED_NUM_10G; 600 break; 601 case 20000: 602 new_link.link_speed = ETH_SPEED_NUM_20G; 603 break; 604 case 25000: 605 new_link.link_speed = ETH_SPEED_NUM_25G; 606 break; 607 case 40000: 608 new_link.link_speed = ETH_SPEED_NUM_40G; 609 break; 610 case 50000: 611 new_link.link_speed = ETH_SPEED_NUM_50G; 612 break; 613 case 100000: 614 new_link.link_speed = ETH_SPEED_NUM_100G; 615 break; 616 default: 617 new_link.link_speed = ETH_SPEED_NUM_NONE; 618 break; 619 } 620 621 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 622 new_link.link_status = vf->link_up ? ETH_LINK_UP : 623 ETH_LINK_DOWN; 624 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 625 ETH_LINK_SPEED_FIXED); 626 627 if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link, 628 *(uint64_t *)&dev->data->dev_link, 629 *(uint64_t *)&new_link) == 0) 630 return -1; 631 632 return 0; 633 } 634 635 static int 636 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 637 { 638 struct iavf_adapter *adapter = 639 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 640 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 641 int ret; 642 643 if (vf->promisc_unicast_enabled) 644 return 0; 645 646 ret = iavf_config_promisc(adapter, true, vf->promisc_multicast_enabled); 647 if (!ret) 648 vf->promisc_unicast_enabled = true; 649 else 650 ret = -EAGAIN; 651 652 return ret; 653 } 654 655 static int 656 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 657 { 658 struct iavf_adapter *adapter = 659 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 660 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 661 int ret; 662 663 if (!vf->promisc_unicast_enabled) 664 return 0; 665 666 ret = iavf_config_promisc(adapter, false, 667 vf->promisc_multicast_enabled); 668 if (!ret) 669 vf->promisc_unicast_enabled = false; 670 else 671 ret = -EAGAIN; 672 673 return ret; 674 } 675 676 static int 677 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 678 { 679 struct iavf_adapter *adapter = 680 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 681 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 682 int ret; 683 684 if (vf->promisc_multicast_enabled) 685 return 0; 686 687 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, true); 688 if (!ret) 689 vf->promisc_multicast_enabled = true; 690 else 691 ret = -EAGAIN; 692 693 return ret; 694 } 695 696 static int 697 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 698 { 699 struct iavf_adapter *adapter = 700 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 701 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 702 int ret; 703 704 if (!vf->promisc_multicast_enabled) 705 return 0; 706 707 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, false); 708 if (!ret) 709 vf->promisc_multicast_enabled = false; 710 else 711 ret = -EAGAIN; 712 713 return ret; 714 } 715 716 static int 717 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 718 __rte_unused uint32_t index, 719 __rte_unused uint32_t pool) 720 { 721 struct iavf_adapter *adapter = 722 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 723 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 724 int err; 725 726 if (rte_is_zero_ether_addr(addr)) { 727 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 728 return -EINVAL; 729 } 730 731 err = iavf_add_del_eth_addr(adapter, addr, true); 732 if (err) { 733 PMD_DRV_LOG(ERR, "fail to add MAC address"); 734 return -EIO; 735 } 736 737 vf->mac_num++; 738 739 return 0; 740 } 741 742 static void 743 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 744 { 745 struct iavf_adapter *adapter = 746 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 747 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 748 struct rte_ether_addr *addr; 749 int err; 750 751 addr = &dev->data->mac_addrs[index]; 752 753 err = iavf_add_del_eth_addr(adapter, addr, false); 754 if (err) 755 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 756 757 vf->mac_num--; 758 } 759 760 static int 761 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 762 { 763 struct iavf_adapter *adapter = 764 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 765 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 766 int err; 767 768 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 769 return -ENOTSUP; 770 771 err = iavf_add_del_vlan(adapter, vlan_id, on); 772 if (err) 773 return -EIO; 774 return 0; 775 } 776 777 static int 778 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 779 { 780 struct iavf_adapter *adapter = 781 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 782 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 783 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 784 int err; 785 786 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 787 return -ENOTSUP; 788 789 /* Vlan stripping setting */ 790 if (mask & ETH_VLAN_STRIP_MASK) { 791 /* Enable or disable VLAN stripping */ 792 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 793 err = iavf_enable_vlan_strip(adapter); 794 else 795 err = iavf_disable_vlan_strip(adapter); 796 797 if (err) 798 return -EIO; 799 } 800 return 0; 801 } 802 803 static int 804 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 805 struct rte_eth_rss_reta_entry64 *reta_conf, 806 uint16_t reta_size) 807 { 808 struct iavf_adapter *adapter = 809 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 810 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 811 uint8_t *lut; 812 uint16_t i, idx, shift; 813 int ret; 814 815 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 816 return -ENOTSUP; 817 818 if (reta_size != vf->vf_res->rss_lut_size) { 819 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 820 "(%d) doesn't match the number of hardware can " 821 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 822 return -EINVAL; 823 } 824 825 lut = rte_zmalloc("rss_lut", reta_size, 0); 826 if (!lut) { 827 PMD_DRV_LOG(ERR, "No memory can be allocated"); 828 return -ENOMEM; 829 } 830 /* store the old lut table temporarily */ 831 rte_memcpy(lut, vf->rss_lut, reta_size); 832 833 for (i = 0; i < reta_size; i++) { 834 idx = i / RTE_RETA_GROUP_SIZE; 835 shift = i % RTE_RETA_GROUP_SIZE; 836 if (reta_conf[idx].mask & (1ULL << shift)) 837 lut[i] = reta_conf[idx].reta[shift]; 838 } 839 840 rte_memcpy(vf->rss_lut, lut, reta_size); 841 /* send virtchnnl ops to configure rss*/ 842 ret = iavf_configure_rss_lut(adapter); 843 if (ret) /* revert back */ 844 rte_memcpy(vf->rss_lut, lut, reta_size); 845 rte_free(lut); 846 847 return ret; 848 } 849 850 static int 851 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 852 struct rte_eth_rss_reta_entry64 *reta_conf, 853 uint16_t reta_size) 854 { 855 struct iavf_adapter *adapter = 856 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 857 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 858 uint16_t i, idx, shift; 859 860 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 861 return -ENOTSUP; 862 863 if (reta_size != vf->vf_res->rss_lut_size) { 864 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 865 "(%d) doesn't match the number of hardware can " 866 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 867 return -EINVAL; 868 } 869 870 for (i = 0; i < reta_size; i++) { 871 idx = i / RTE_RETA_GROUP_SIZE; 872 shift = i % RTE_RETA_GROUP_SIZE; 873 if (reta_conf[idx].mask & (1ULL << shift)) 874 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 875 } 876 877 return 0; 878 } 879 880 static int 881 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 882 struct rte_eth_rss_conf *rss_conf) 883 { 884 struct iavf_adapter *adapter = 885 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 886 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 887 888 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 889 return -ENOTSUP; 890 891 /* HENA setting, it is enabled by default, no change */ 892 if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) { 893 PMD_DRV_LOG(DEBUG, "No key to be configured"); 894 return 0; 895 } else if (rss_conf->rss_key_len != vf->vf_res->rss_key_size) { 896 PMD_DRV_LOG(ERR, "The size of hash key configured " 897 "(%d) doesn't match the size of hardware can " 898 "support (%d)", rss_conf->rss_key_len, 899 vf->vf_res->rss_key_size); 900 return -EINVAL; 901 } 902 903 rte_memcpy(vf->rss_key, rss_conf->rss_key, rss_conf->rss_key_len); 904 905 return iavf_configure_rss_key(adapter); 906 } 907 908 static int 909 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 910 struct rte_eth_rss_conf *rss_conf) 911 { 912 struct iavf_adapter *adapter = 913 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 914 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 915 916 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 917 return -ENOTSUP; 918 919 /* Just set it to default value now. */ 920 rss_conf->rss_hf = IAVF_RSS_OFFLOAD_ALL; 921 922 if (!rss_conf->rss_key) 923 return 0; 924 925 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 926 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 927 928 return 0; 929 } 930 931 static int 932 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 933 { 934 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 935 int ret = 0; 936 937 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 938 return -EINVAL; 939 940 /* mtu setting is forbidden if port is start */ 941 if (dev->data->dev_started) { 942 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 943 return -EBUSY; 944 } 945 946 if (frame_size > RTE_ETHER_MAX_LEN) 947 dev->data->dev_conf.rxmode.offloads |= 948 DEV_RX_OFFLOAD_JUMBO_FRAME; 949 else 950 dev->data->dev_conf.rxmode.offloads &= 951 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 952 953 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 954 955 return ret; 956 } 957 958 static int 959 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 960 struct rte_ether_addr *mac_addr) 961 { 962 struct iavf_adapter *adapter = 963 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 964 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 965 struct rte_ether_addr *perm_addr, *old_addr; 966 int ret; 967 968 old_addr = (struct rte_ether_addr *)hw->mac.addr; 969 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 970 971 if (rte_is_same_ether_addr(mac_addr, old_addr)) 972 return 0; 973 974 /* If the MAC address is configured by host, skip the setting */ 975 if (rte_is_valid_assigned_ether_addr(perm_addr)) 976 return -EPERM; 977 978 ret = iavf_add_del_eth_addr(adapter, old_addr, false); 979 if (ret) 980 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 981 " %02X:%02X:%02X:%02X:%02X:%02X", 982 old_addr->addr_bytes[0], 983 old_addr->addr_bytes[1], 984 old_addr->addr_bytes[2], 985 old_addr->addr_bytes[3], 986 old_addr->addr_bytes[4], 987 old_addr->addr_bytes[5]); 988 989 ret = iavf_add_del_eth_addr(adapter, mac_addr, true); 990 if (ret) 991 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 992 " %02X:%02X:%02X:%02X:%02X:%02X", 993 mac_addr->addr_bytes[0], 994 mac_addr->addr_bytes[1], 995 mac_addr->addr_bytes[2], 996 mac_addr->addr_bytes[3], 997 mac_addr->addr_bytes[4], 998 mac_addr->addr_bytes[5]); 999 1000 if (ret) 1001 return -EIO; 1002 1003 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1004 return 0; 1005 } 1006 1007 static void 1008 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1009 { 1010 if (*stat >= *offset) 1011 *stat = *stat - *offset; 1012 else 1013 *stat = (uint64_t)((*stat + 1014 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1015 1016 *stat &= IAVF_48_BIT_MASK; 1017 } 1018 1019 static void 1020 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1021 { 1022 if (*stat >= *offset) 1023 *stat = (uint64_t)(*stat - *offset); 1024 else 1025 *stat = (uint64_t)((*stat + 1026 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1027 } 1028 1029 static void 1030 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1031 { 1032 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1033 1034 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1035 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1036 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1037 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1038 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1039 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1040 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1041 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1042 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1043 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1044 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1045 } 1046 1047 static int 1048 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1049 { 1050 struct iavf_adapter *adapter = 1051 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1052 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1053 struct iavf_vsi *vsi = &vf->vsi; 1054 struct virtchnl_eth_stats *pstats = NULL; 1055 int ret; 1056 1057 ret = iavf_query_stats(adapter, &pstats); 1058 if (ret == 0) { 1059 iavf_update_stats(vsi, pstats); 1060 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1061 pstats->rx_broadcast - pstats->rx_discards; 1062 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1063 pstats->tx_unicast; 1064 stats->imissed = pstats->rx_discards; 1065 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1066 stats->ibytes = pstats->rx_bytes; 1067 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 1068 stats->obytes = pstats->tx_bytes; 1069 } else { 1070 PMD_DRV_LOG(ERR, "Get statistics failed"); 1071 } 1072 return ret; 1073 } 1074 1075 static int 1076 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1077 { 1078 int ret; 1079 struct iavf_adapter *adapter = 1080 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1081 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1082 struct iavf_vsi *vsi = &vf->vsi; 1083 struct virtchnl_eth_stats *pstats = NULL; 1084 1085 /* read stat values to clear hardware registers */ 1086 ret = iavf_query_stats(adapter, &pstats); 1087 if (ret != 0) 1088 return ret; 1089 1090 /* set stats offset base on current values */ 1091 vsi->eth_stats_offset = *pstats; 1092 1093 return 0; 1094 } 1095 1096 static int 1097 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1098 { 1099 struct iavf_adapter *adapter = 1100 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1101 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1102 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1103 uint16_t msix_intr; 1104 1105 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1106 if (msix_intr == IAVF_MISC_VEC_ID) { 1107 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1108 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1109 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1110 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1111 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1112 } else { 1113 IAVF_WRITE_REG(hw, 1114 IAVF_VFINT_DYN_CTLN1 1115 (msix_intr - IAVF_RX_VEC_START), 1116 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1117 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1118 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1119 } 1120 1121 IAVF_WRITE_FLUSH(hw); 1122 1123 rte_intr_ack(&pci_dev->intr_handle); 1124 1125 return 0; 1126 } 1127 1128 static int 1129 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1130 { 1131 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1132 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1133 uint16_t msix_intr; 1134 1135 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1136 if (msix_intr == IAVF_MISC_VEC_ID) { 1137 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1138 return -EIO; 1139 } 1140 1141 IAVF_WRITE_REG(hw, 1142 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1143 0); 1144 1145 IAVF_WRITE_FLUSH(hw); 1146 return 0; 1147 } 1148 1149 static int 1150 iavf_check_vf_reset_done(struct iavf_hw *hw) 1151 { 1152 int i, reset; 1153 1154 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1155 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1156 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1157 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1158 if (reset == VIRTCHNL_VFR_VFACTIVE || 1159 reset == VIRTCHNL_VFR_COMPLETED) 1160 break; 1161 rte_delay_ms(20); 1162 } 1163 1164 if (i >= IAVF_RESET_WAIT_CNT) 1165 return -1; 1166 1167 return 0; 1168 } 1169 1170 static int 1171 iavf_init_vf(struct rte_eth_dev *dev) 1172 { 1173 int err, bufsz; 1174 struct iavf_adapter *adapter = 1175 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1176 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1177 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1178 1179 err = iavf_set_mac_type(hw); 1180 if (err) { 1181 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1182 goto err; 1183 } 1184 1185 err = iavf_check_vf_reset_done(hw); 1186 if (err) { 1187 PMD_INIT_LOG(ERR, "VF is still resetting"); 1188 goto err; 1189 } 1190 1191 iavf_init_adminq_parameter(hw); 1192 err = iavf_init_adminq(hw); 1193 if (err) { 1194 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1195 goto err; 1196 } 1197 1198 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1199 if (!vf->aq_resp) { 1200 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1201 goto err_aq; 1202 } 1203 if (iavf_check_api_version(adapter) != 0) { 1204 PMD_INIT_LOG(ERR, "check_api version failed"); 1205 goto err_api; 1206 } 1207 1208 bufsz = sizeof(struct virtchnl_vf_resource) + 1209 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1210 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1211 if (!vf->vf_res) { 1212 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1213 goto err_api; 1214 } 1215 if (iavf_get_vf_resource(adapter) != 0) { 1216 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1217 goto err_alloc; 1218 } 1219 /* Allocate memort for RSS info */ 1220 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1221 vf->rss_key = rte_zmalloc("rss_key", 1222 vf->vf_res->rss_key_size, 0); 1223 if (!vf->rss_key) { 1224 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1225 goto err_rss; 1226 } 1227 vf->rss_lut = rte_zmalloc("rss_lut", 1228 vf->vf_res->rss_lut_size, 0); 1229 if (!vf->rss_lut) { 1230 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1231 goto err_rss; 1232 } 1233 } 1234 1235 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 1236 if (iavf_get_supported_rxdid(adapter) != 0) { 1237 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 1238 goto err_rss; 1239 } 1240 } 1241 1242 return 0; 1243 err_rss: 1244 rte_free(vf->rss_key); 1245 rte_free(vf->rss_lut); 1246 err_alloc: 1247 rte_free(vf->vf_res); 1248 vf->vsi_res = NULL; 1249 err_api: 1250 rte_free(vf->aq_resp); 1251 err_aq: 1252 iavf_shutdown_adminq(hw); 1253 err: 1254 return -1; 1255 } 1256 1257 /* Enable default admin queue interrupt setting */ 1258 static inline void 1259 iavf_enable_irq0(struct iavf_hw *hw) 1260 { 1261 /* Enable admin queue interrupt trigger */ 1262 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 1263 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 1264 1265 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1266 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1267 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1268 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1269 1270 IAVF_WRITE_FLUSH(hw); 1271 } 1272 1273 static inline void 1274 iavf_disable_irq0(struct iavf_hw *hw) 1275 { 1276 /* Disable all interrupt types */ 1277 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 1278 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1279 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1280 IAVF_WRITE_FLUSH(hw); 1281 } 1282 1283 static void 1284 iavf_dev_interrupt_handler(void *param) 1285 { 1286 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1287 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1288 1289 iavf_disable_irq0(hw); 1290 1291 iavf_handle_virtchnl_msg(dev); 1292 1293 iavf_enable_irq0(hw); 1294 } 1295 1296 static int 1297 iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 1298 enum rte_filter_type filter_type, 1299 enum rte_filter_op filter_op, 1300 void *arg) 1301 { 1302 int ret = 0; 1303 1304 if (!dev) 1305 return -EINVAL; 1306 1307 switch (filter_type) { 1308 case RTE_ETH_FILTER_GENERIC: 1309 if (filter_op != RTE_ETH_FILTER_GET) 1310 return -EINVAL; 1311 *(const void **)arg = &iavf_flow_ops; 1312 break; 1313 default: 1314 PMD_DRV_LOG(WARNING, "Filter type (%d) not supported", 1315 filter_type); 1316 ret = -EINVAL; 1317 break; 1318 } 1319 1320 return ret; 1321 } 1322 1323 1324 static int 1325 iavf_dev_init(struct rte_eth_dev *eth_dev) 1326 { 1327 struct iavf_adapter *adapter = 1328 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1329 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1330 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1331 int ret = 0; 1332 1333 PMD_INIT_FUNC_TRACE(); 1334 1335 /* assign ops func pointer */ 1336 eth_dev->dev_ops = &iavf_eth_dev_ops; 1337 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 1338 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 1339 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 1340 1341 /* For secondary processes, we don't initialise any further as primary 1342 * has already done this work. Only check if we need a different RX 1343 * and TX function. 1344 */ 1345 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1346 iavf_set_rx_function(eth_dev); 1347 iavf_set_tx_function(eth_dev); 1348 return 0; 1349 } 1350 rte_eth_copy_pci_info(eth_dev, pci_dev); 1351 1352 hw->vendor_id = pci_dev->id.vendor_id; 1353 hw->device_id = pci_dev->id.device_id; 1354 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 1355 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 1356 hw->bus.bus_id = pci_dev->addr.bus; 1357 hw->bus.device = pci_dev->addr.devid; 1358 hw->bus.func = pci_dev->addr.function; 1359 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 1360 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1361 adapter->eth_dev = eth_dev; 1362 adapter->stopped = 1; 1363 1364 if (iavf_init_vf(eth_dev) != 0) { 1365 PMD_INIT_LOG(ERR, "Init vf failed"); 1366 return -1; 1367 } 1368 1369 /* set default ptype table */ 1370 adapter->ptype_tbl = iavf_get_default_ptype_table(); 1371 1372 /* copy mac addr */ 1373 eth_dev->data->mac_addrs = rte_zmalloc( 1374 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 1375 if (!eth_dev->data->mac_addrs) { 1376 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 1377 " store MAC addresses", 1378 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 1379 return -ENOMEM; 1380 } 1381 /* If the MAC address is not configured by host, 1382 * generate a random one. 1383 */ 1384 if (!rte_is_valid_assigned_ether_addr( 1385 (struct rte_ether_addr *)hw->mac.addr)) 1386 rte_eth_random_addr(hw->mac.addr); 1387 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 1388 ð_dev->data->mac_addrs[0]); 1389 1390 /* register callback func to eal lib */ 1391 rte_intr_callback_register(&pci_dev->intr_handle, 1392 iavf_dev_interrupt_handler, 1393 (void *)eth_dev); 1394 1395 /* enable uio intr after callback register */ 1396 rte_intr_enable(&pci_dev->intr_handle); 1397 1398 /* configure and enable device interrupt */ 1399 iavf_enable_irq0(hw); 1400 1401 ret = iavf_flow_init(adapter); 1402 if (ret) { 1403 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 1404 return ret; 1405 } 1406 1407 return 0; 1408 } 1409 1410 static void 1411 iavf_dev_close(struct rte_eth_dev *dev) 1412 { 1413 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1414 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1415 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 1416 struct iavf_adapter *adapter = 1417 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1418 1419 iavf_dev_stop(dev); 1420 iavf_flow_flush(dev, NULL); 1421 iavf_flow_uninit(adapter); 1422 iavf_shutdown_adminq(hw); 1423 /* disable uio intr before callback unregister */ 1424 rte_intr_disable(intr_handle); 1425 1426 /* unregister callback func from eal lib */ 1427 rte_intr_callback_unregister(intr_handle, 1428 iavf_dev_interrupt_handler, dev); 1429 iavf_disable_irq0(hw); 1430 } 1431 1432 static int 1433 iavf_dev_uninit(struct rte_eth_dev *dev) 1434 { 1435 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1436 1437 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1438 return -EPERM; 1439 1440 dev->dev_ops = NULL; 1441 dev->rx_pkt_burst = NULL; 1442 dev->tx_pkt_burst = NULL; 1443 iavf_dev_close(dev); 1444 1445 rte_free(vf->vf_res); 1446 vf->vsi_res = NULL; 1447 vf->vf_res = NULL; 1448 1449 rte_free(vf->aq_resp); 1450 vf->aq_resp = NULL; 1451 1452 if (vf->rss_lut) { 1453 rte_free(vf->rss_lut); 1454 vf->rss_lut = NULL; 1455 } 1456 if (vf->rss_key) { 1457 rte_free(vf->rss_key); 1458 vf->rss_key = NULL; 1459 } 1460 1461 return 0; 1462 } 1463 1464 /* 1465 * Reset VF device only to re-initialize resources in PMD layer 1466 */ 1467 static int 1468 iavf_dev_reset(struct rte_eth_dev *dev) 1469 { 1470 int ret; 1471 1472 ret = iavf_dev_uninit(dev); 1473 if (ret) 1474 return ret; 1475 1476 return iavf_dev_init(dev); 1477 } 1478 1479 static int 1480 iavf_dcf_cap_check_handler(__rte_unused const char *key, 1481 const char *value, __rte_unused void *opaque) 1482 { 1483 if (strcmp(value, "dcf")) 1484 return -1; 1485 1486 return 0; 1487 } 1488 1489 static int 1490 iavf_dcf_cap_selected(struct rte_devargs *devargs) 1491 { 1492 struct rte_kvargs *kvlist; 1493 const char *key = "cap"; 1494 int ret = 0; 1495 1496 if (devargs == NULL) 1497 return 0; 1498 1499 kvlist = rte_kvargs_parse(devargs->args, NULL); 1500 if (kvlist == NULL) 1501 return 0; 1502 1503 if (!rte_kvargs_count(kvlist, key)) 1504 goto exit; 1505 1506 /* dcf capability selected when there's a key-value pair: cap=dcf */ 1507 if (rte_kvargs_process(kvlist, key, 1508 iavf_dcf_cap_check_handler, NULL) < 0) 1509 goto exit; 1510 1511 ret = 1; 1512 1513 exit: 1514 rte_kvargs_free(kvlist); 1515 return ret; 1516 } 1517 1518 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1519 struct rte_pci_device *pci_dev) 1520 { 1521 if (iavf_dcf_cap_selected(pci_dev->device.devargs)) 1522 return 1; 1523 1524 return rte_eth_dev_pci_generic_probe(pci_dev, 1525 sizeof(struct iavf_adapter), iavf_dev_init); 1526 } 1527 1528 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 1529 { 1530 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 1531 } 1532 1533 /* Adaptive virtual function driver struct */ 1534 static struct rte_pci_driver rte_iavf_pmd = { 1535 .id_table = pci_id_iavf_map, 1536 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 1537 .probe = eth_iavf_pci_probe, 1538 .remove = eth_iavf_pci_remove, 1539 }; 1540 1541 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 1542 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 1543 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 1544 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf"); 1545 RTE_LOG_REGISTER(iavf_logtype_init, pmd.net.iavf.init, NOTICE); 1546 RTE_LOG_REGISTER(iavf_logtype_driver, pmd.net.iavf.driver, NOTICE); 1547 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 1548 RTE_LOG_REGISTER(iavf_logtype_rx, pmd.net.iavf.rx, DEBUG); 1549 #endif 1550 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 1551 RTE_LOG_REGISTER(iavf_logtype_tx, pmd.net.iavf.tx, DEBUG); 1552 #endif 1553 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 1554 RTE_LOG_REGISTER(iavf_logtype_tx_free, pmd.net.iavf.tx_free, DEBUG); 1555 #endif 1556