1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 #include "iavf_generic_flow.h" 31 #include "rte_pmd_iavf.h" 32 33 /* devargs */ 34 #define IAVF_PROTO_XTR_ARG "proto_xtr" 35 36 static const char * const iavf_valid_args[] = { 37 IAVF_PROTO_XTR_ARG, 38 NULL 39 }; 40 41 static const struct rte_mbuf_dynfield iavf_proto_xtr_metadata_param = { 42 .name = "intel_pmd_dynfield_proto_xtr_metadata", 43 .size = sizeof(uint32_t), 44 .align = __alignof__(uint32_t), 45 .flags = 0, 46 }; 47 48 struct iavf_proto_xtr_ol { 49 const struct rte_mbuf_dynflag param; 50 uint64_t *ol_flag; 51 bool required; 52 }; 53 54 static struct iavf_proto_xtr_ol iavf_proto_xtr_params[] = { 55 [IAVF_PROTO_XTR_VLAN] = { 56 .param = { .name = "intel_pmd_dynflag_proto_xtr_vlan" }, 57 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_vlan_mask }, 58 [IAVF_PROTO_XTR_IPV4] = { 59 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv4" }, 60 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv4_mask }, 61 [IAVF_PROTO_XTR_IPV6] = { 62 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6" }, 63 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_mask }, 64 [IAVF_PROTO_XTR_IPV6_FLOW] = { 65 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6_flow" }, 66 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_flow_mask }, 67 [IAVF_PROTO_XTR_TCP] = { 68 .param = { .name = "intel_pmd_dynflag_proto_xtr_tcp" }, 69 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_tcp_mask }, 70 [IAVF_PROTO_XTR_IP_OFFSET] = { 71 .param = { .name = "intel_pmd_dynflag_proto_xtr_ip_offset" }, 72 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ip_offset_mask }, 73 }; 74 75 static int iavf_dev_configure(struct rte_eth_dev *dev); 76 static int iavf_dev_start(struct rte_eth_dev *dev); 77 static int iavf_dev_stop(struct rte_eth_dev *dev); 78 static int iavf_dev_close(struct rte_eth_dev *dev); 79 static int iavf_dev_reset(struct rte_eth_dev *dev); 80 static int iavf_dev_info_get(struct rte_eth_dev *dev, 81 struct rte_eth_dev_info *dev_info); 82 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 83 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 84 struct rte_eth_stats *stats); 85 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 86 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 87 struct rte_eth_xstat *xstats, unsigned int n); 88 static int iavf_dev_xstats_get_names(struct rte_eth_dev *dev, 89 struct rte_eth_xstat_name *xstats_names, 90 unsigned int limit); 91 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 92 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 93 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 94 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 95 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 96 struct rte_ether_addr *addr, 97 uint32_t index, 98 uint32_t pool); 99 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 100 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 101 uint16_t vlan_id, int on); 102 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 103 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 104 struct rte_eth_rss_reta_entry64 *reta_conf, 105 uint16_t reta_size); 106 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 107 struct rte_eth_rss_reta_entry64 *reta_conf, 108 uint16_t reta_size); 109 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 110 struct rte_eth_rss_conf *rss_conf); 111 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 112 struct rte_eth_rss_conf *rss_conf); 113 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 114 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 115 struct rte_ether_addr *mac_addr); 116 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 117 uint16_t queue_id); 118 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 119 uint16_t queue_id); 120 static int iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 121 enum rte_filter_type filter_type, 122 enum rte_filter_op filter_op, 123 void *arg); 124 static int iavf_set_mc_addr_list(struct rte_eth_dev *dev, 125 struct rte_ether_addr *mc_addrs, 126 uint32_t mc_addrs_num); 127 128 static const struct rte_pci_id pci_id_iavf_map[] = { 129 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 130 { .vendor_id = 0, /* sentinel */ }, 131 }; 132 133 struct rte_iavf_xstats_name_off { 134 char name[RTE_ETH_XSTATS_NAME_SIZE]; 135 unsigned int offset; 136 }; 137 138 static const struct rte_iavf_xstats_name_off rte_iavf_stats_strings[] = { 139 {"rx_bytes", offsetof(struct iavf_eth_stats, rx_bytes)}, 140 {"rx_unicast_packets", offsetof(struct iavf_eth_stats, rx_unicast)}, 141 {"rx_multicast_packets", offsetof(struct iavf_eth_stats, rx_multicast)}, 142 {"rx_broadcast_packets", offsetof(struct iavf_eth_stats, rx_broadcast)}, 143 {"rx_dropped_packets", offsetof(struct iavf_eth_stats, rx_discards)}, 144 {"rx_unknown_protocol_packets", offsetof(struct iavf_eth_stats, 145 rx_unknown_protocol)}, 146 {"tx_bytes", offsetof(struct iavf_eth_stats, tx_bytes)}, 147 {"tx_unicast_packets", offsetof(struct iavf_eth_stats, tx_unicast)}, 148 {"tx_multicast_packets", offsetof(struct iavf_eth_stats, tx_multicast)}, 149 {"tx_broadcast_packets", offsetof(struct iavf_eth_stats, tx_broadcast)}, 150 {"tx_dropped_packets", offsetof(struct iavf_eth_stats, tx_discards)}, 151 {"tx_error_packets", offsetof(struct iavf_eth_stats, tx_errors)}, 152 }; 153 154 #define IAVF_NB_XSTATS (sizeof(rte_iavf_stats_strings) / \ 155 sizeof(rte_iavf_stats_strings[0])) 156 157 static const struct eth_dev_ops iavf_eth_dev_ops = { 158 .dev_configure = iavf_dev_configure, 159 .dev_start = iavf_dev_start, 160 .dev_stop = iavf_dev_stop, 161 .dev_close = iavf_dev_close, 162 .dev_reset = iavf_dev_reset, 163 .dev_infos_get = iavf_dev_info_get, 164 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 165 .link_update = iavf_dev_link_update, 166 .stats_get = iavf_dev_stats_get, 167 .stats_reset = iavf_dev_stats_reset, 168 .xstats_get = iavf_dev_xstats_get, 169 .xstats_get_names = iavf_dev_xstats_get_names, 170 .xstats_reset = iavf_dev_stats_reset, 171 .promiscuous_enable = iavf_dev_promiscuous_enable, 172 .promiscuous_disable = iavf_dev_promiscuous_disable, 173 .allmulticast_enable = iavf_dev_allmulticast_enable, 174 .allmulticast_disable = iavf_dev_allmulticast_disable, 175 .mac_addr_add = iavf_dev_add_mac_addr, 176 .mac_addr_remove = iavf_dev_del_mac_addr, 177 .set_mc_addr_list = iavf_set_mc_addr_list, 178 .vlan_filter_set = iavf_dev_vlan_filter_set, 179 .vlan_offload_set = iavf_dev_vlan_offload_set, 180 .rx_queue_start = iavf_dev_rx_queue_start, 181 .rx_queue_stop = iavf_dev_rx_queue_stop, 182 .tx_queue_start = iavf_dev_tx_queue_start, 183 .tx_queue_stop = iavf_dev_tx_queue_stop, 184 .rx_queue_setup = iavf_dev_rx_queue_setup, 185 .rx_queue_release = iavf_dev_rx_queue_release, 186 .tx_queue_setup = iavf_dev_tx_queue_setup, 187 .tx_queue_release = iavf_dev_tx_queue_release, 188 .mac_addr_set = iavf_dev_set_default_mac_addr, 189 .reta_update = iavf_dev_rss_reta_update, 190 .reta_query = iavf_dev_rss_reta_query, 191 .rss_hash_update = iavf_dev_rss_hash_update, 192 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 193 .rxq_info_get = iavf_dev_rxq_info_get, 194 .txq_info_get = iavf_dev_txq_info_get, 195 .mtu_set = iavf_dev_mtu_set, 196 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 197 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 198 .filter_ctrl = iavf_dev_filter_ctrl, 199 .tx_done_cleanup = iavf_dev_tx_done_cleanup, 200 }; 201 202 static int 203 iavf_set_mc_addr_list(struct rte_eth_dev *dev, 204 struct rte_ether_addr *mc_addrs, 205 uint32_t mc_addrs_num) 206 { 207 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 208 struct iavf_adapter *adapter = 209 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 210 int err, ret; 211 212 if (mc_addrs_num > IAVF_NUM_MACADDR_MAX) { 213 PMD_DRV_LOG(ERR, 214 "can't add more than a limited number (%u) of addresses.", 215 (uint32_t)IAVF_NUM_MACADDR_MAX); 216 return -EINVAL; 217 } 218 219 /* flush previous addresses */ 220 err = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 221 false); 222 if (err) 223 return err; 224 225 /* add new ones */ 226 err = iavf_add_del_mc_addr_list(adapter, mc_addrs, mc_addrs_num, true); 227 228 if (err) { 229 /* if adding mac address list fails, should add the previous 230 * addresses back. 231 */ 232 ret = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, 233 vf->mc_addrs_num, true); 234 if (ret) 235 return ret; 236 } else { 237 vf->mc_addrs_num = mc_addrs_num; 238 memcpy(vf->mc_addrs, 239 mc_addrs, mc_addrs_num * sizeof(*mc_addrs)); 240 } 241 242 return err; 243 } 244 245 static int 246 iavf_init_rss(struct iavf_adapter *adapter) 247 { 248 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 249 struct rte_eth_rss_conf *rss_conf; 250 uint16_t i, j, nb_q; 251 int ret; 252 253 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 254 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 255 vf->max_rss_qregion); 256 257 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 258 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 259 return -ENOTSUP; 260 } 261 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 262 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 263 /* set all lut items to default queue */ 264 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 265 vf->rss_lut[i] = 0; 266 ret = iavf_configure_rss_lut(adapter); 267 return ret; 268 } 269 270 /* configure RSS key */ 271 if (!rss_conf->rss_key) { 272 /* Calculate the default hash key */ 273 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 274 vf->rss_key[i] = (uint8_t)rte_rand(); 275 } else 276 rte_memcpy(vf->rss_key, rss_conf->rss_key, 277 RTE_MIN(rss_conf->rss_key_len, 278 vf->vf_res->rss_key_size)); 279 280 /* init RSS LUT table */ 281 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 282 if (j >= nb_q) 283 j = 0; 284 vf->rss_lut[i] = j; 285 } 286 /* send virtchnnl ops to configure rss*/ 287 ret = iavf_configure_rss_lut(adapter); 288 if (ret) 289 return ret; 290 ret = iavf_configure_rss_key(adapter); 291 if (ret) 292 return ret; 293 294 /* Set RSS hash configuration based on rss_conf->rss_hf. */ 295 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 296 if (ret) { 297 PMD_DRV_LOG(ERR, "fail to set default RSS"); 298 return ret; 299 } 300 301 return 0; 302 } 303 304 static int 305 iavf_queues_req_reset(struct rte_eth_dev *dev, uint16_t num) 306 { 307 struct iavf_adapter *ad = 308 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 309 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 310 int ret; 311 312 ret = iavf_request_queues(ad, num); 313 if (ret) { 314 PMD_DRV_LOG(ERR, "request queues from PF failed"); 315 return ret; 316 } 317 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u", 318 vf->vsi_res->num_queue_pairs, num); 319 320 ret = iavf_dev_reset(dev); 321 if (ret) { 322 PMD_DRV_LOG(ERR, "vf reset failed"); 323 return ret; 324 } 325 326 return 0; 327 } 328 329 static int 330 iavf_dev_vlan_insert_set(struct rte_eth_dev *dev) 331 { 332 struct iavf_adapter *adapter = 333 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 334 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 335 bool enable; 336 337 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2)) 338 return 0; 339 340 enable = !!(dev->data->dev_conf.txmode.offloads & 341 DEV_TX_OFFLOAD_VLAN_INSERT); 342 iavf_config_vlan_insert_v2(adapter, enable); 343 344 return 0; 345 } 346 347 static int 348 iavf_dev_init_vlan(struct rte_eth_dev *dev) 349 { 350 int err; 351 352 err = iavf_dev_vlan_offload_set(dev, 353 ETH_VLAN_STRIP_MASK | 354 ETH_QINQ_STRIP_MASK | 355 ETH_VLAN_FILTER_MASK | 356 ETH_VLAN_EXTEND_MASK); 357 if (err) { 358 PMD_DRV_LOG(ERR, "Failed to update vlan offload"); 359 return err; 360 } 361 362 err = iavf_dev_vlan_insert_set(dev); 363 if (err) 364 PMD_DRV_LOG(ERR, "Failed to update vlan insertion"); 365 366 return err; 367 } 368 369 static int 370 iavf_dev_configure(struct rte_eth_dev *dev) 371 { 372 struct iavf_adapter *ad = 373 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 374 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 375 uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 376 dev->data->nb_tx_queues); 377 int ret; 378 379 ad->rx_bulk_alloc_allowed = true; 380 /* Initialize to TRUE. If any of Rx queues doesn't meet the 381 * vector Rx/Tx preconditions, it will be reset. 382 */ 383 ad->rx_vec_allowed = true; 384 ad->tx_vec_allowed = true; 385 386 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 387 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 388 389 /* Large VF setting */ 390 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_DFLT) { 391 if (!(vf->vf_res->vf_cap_flags & 392 VIRTCHNL_VF_LARGE_NUM_QPAIRS)) { 393 PMD_DRV_LOG(ERR, "large VF is not supported"); 394 return -1; 395 } 396 397 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_LV) { 398 PMD_DRV_LOG(ERR, "queue pairs number cannot be larger than %u", 399 IAVF_MAX_NUM_QUEUES_LV); 400 return -1; 401 } 402 403 ret = iavf_queues_req_reset(dev, num_queue_pairs); 404 if (ret) 405 return ret; 406 407 ret = iavf_get_max_rss_queue_region(ad); 408 if (ret) { 409 PMD_INIT_LOG(ERR, "get max rss queue region failed"); 410 return ret; 411 } 412 413 vf->lv_enabled = true; 414 } else { 415 /* Check if large VF is already enabled. If so, disable and 416 * release redundant queue resource. 417 * Or check if enough queue pairs. If not, request them from PF. 418 */ 419 if (vf->lv_enabled || 420 num_queue_pairs > vf->vsi_res->num_queue_pairs) { 421 ret = iavf_queues_req_reset(dev, num_queue_pairs); 422 if (ret) 423 return ret; 424 425 vf->lv_enabled = false; 426 } 427 /* if large VF is not required, use default rss queue region */ 428 vf->max_rss_qregion = IAVF_MAX_NUM_QUEUES_DFLT; 429 } 430 431 ret = iavf_dev_init_vlan(dev); 432 if (ret) { 433 PMD_DRV_LOG(ERR, "configure VLAN failed: %d", ret); 434 return -1; 435 } 436 437 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 438 if (iavf_init_rss(ad) != 0) { 439 PMD_DRV_LOG(ERR, "configure rss failed"); 440 return -1; 441 } 442 } 443 return 0; 444 } 445 446 static int 447 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 448 { 449 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 450 struct rte_eth_dev_data *dev_data = dev->data; 451 uint16_t buf_size, max_pkt_len, len; 452 453 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 454 455 /* Calculate the maximum packet length allowed */ 456 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 457 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 458 459 /* Check if the jumbo frame and maximum packet length are set 460 * correctly. 461 */ 462 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 463 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 464 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 465 PMD_DRV_LOG(ERR, "maximum packet length must be " 466 "larger than %u and smaller than %u, " 467 "as jumbo frame is enabled", 468 (uint32_t)RTE_ETHER_MAX_LEN, 469 (uint32_t)IAVF_FRAME_SIZE_MAX); 470 return -EINVAL; 471 } 472 } else { 473 if (max_pkt_len < RTE_ETHER_MIN_LEN || 474 max_pkt_len > RTE_ETHER_MAX_LEN) { 475 PMD_DRV_LOG(ERR, "maximum packet length must be " 476 "larger than %u and smaller than %u, " 477 "as jumbo frame is disabled", 478 (uint32_t)RTE_ETHER_MIN_LEN, 479 (uint32_t)RTE_ETHER_MAX_LEN); 480 return -EINVAL; 481 } 482 } 483 484 rxq->max_pkt_len = max_pkt_len; 485 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 486 rxq->max_pkt_len > buf_size) { 487 dev_data->scattered_rx = 1; 488 } 489 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 490 IAVF_WRITE_FLUSH(hw); 491 492 return 0; 493 } 494 495 static int 496 iavf_init_queues(struct rte_eth_dev *dev) 497 { 498 struct iavf_rx_queue **rxq = 499 (struct iavf_rx_queue **)dev->data->rx_queues; 500 int i, ret = IAVF_SUCCESS; 501 502 for (i = 0; i < dev->data->nb_rx_queues; i++) { 503 if (!rxq[i] || !rxq[i]->q_set) 504 continue; 505 ret = iavf_init_rxq(dev, rxq[i]); 506 if (ret != IAVF_SUCCESS) 507 break; 508 } 509 /* set rx/tx function to vector/scatter/single-segment 510 * according to parameters 511 */ 512 iavf_set_rx_function(dev); 513 iavf_set_tx_function(dev); 514 515 return ret; 516 } 517 518 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 519 struct rte_intr_handle *intr_handle) 520 { 521 struct iavf_adapter *adapter = 522 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 523 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 524 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 525 struct iavf_qv_map *qv_map; 526 uint16_t interval, i; 527 int vec; 528 529 if (rte_intr_cap_multiple(intr_handle) && 530 dev->data->dev_conf.intr_conf.rxq) { 531 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 532 return -1; 533 } 534 535 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 536 intr_handle->intr_vec = 537 rte_zmalloc("intr_vec", 538 dev->data->nb_rx_queues * sizeof(int), 0); 539 if (!intr_handle->intr_vec) { 540 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 541 dev->data->nb_rx_queues); 542 return -1; 543 } 544 } 545 546 qv_map = rte_zmalloc("qv_map", 547 dev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0); 548 if (!qv_map) { 549 PMD_DRV_LOG(ERR, "Failed to allocate %d queue-vector map", 550 dev->data->nb_rx_queues); 551 return -1; 552 } 553 554 if (!dev->data->dev_conf.intr_conf.rxq || 555 !rte_intr_dp_is_en(intr_handle)) { 556 /* Rx interrupt disabled, Map interrupt only for writeback */ 557 vf->nb_msix = 1; 558 if (vf->vf_res->vf_cap_flags & 559 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 560 /* If WB_ON_ITR supports, enable it */ 561 vf->msix_base = IAVF_RX_VEC_START; 562 /* Set the ITR for index zero, to 2us to make sure that 563 * we leave time for aggregation to occur, but don't 564 * increase latency dramatically. 565 */ 566 IAVF_WRITE_REG(hw, 567 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 568 (0 << IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) | 569 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK | 570 (2UL << IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT)); 571 /* debug - check for success! the return value 572 * should be 2, offset is 0x2800 573 */ 574 /* IAVF_READ_REG(hw, IAVF_VFINT_ITRN1(0, 0)); */ 575 } else { 576 /* If no WB_ON_ITR offload flags, need to set 577 * interrupt for descriptor write back. 578 */ 579 vf->msix_base = IAVF_MISC_VEC_ID; 580 581 /* set ITR to max */ 582 interval = iavf_calc_itr_interval( 583 IAVF_QUEUE_ITR_INTERVAL_MAX); 584 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 585 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 586 (IAVF_ITR_INDEX_DEFAULT << 587 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 588 (interval << 589 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 590 } 591 IAVF_WRITE_FLUSH(hw); 592 /* map all queues to the same interrupt */ 593 for (i = 0; i < dev->data->nb_rx_queues; i++) { 594 qv_map[i].queue_id = i; 595 qv_map[i].vector_id = vf->msix_base; 596 } 597 vf->qv_map = qv_map; 598 } else { 599 if (!rte_intr_allow_others(intr_handle)) { 600 vf->nb_msix = 1; 601 vf->msix_base = IAVF_MISC_VEC_ID; 602 for (i = 0; i < dev->data->nb_rx_queues; i++) { 603 qv_map[i].queue_id = i; 604 qv_map[i].vector_id = vf->msix_base; 605 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 606 } 607 vf->qv_map = qv_map; 608 PMD_DRV_LOG(DEBUG, 609 "vector %u are mapping to all Rx queues", 610 vf->msix_base); 611 } else { 612 /* If Rx interrupt is reuquired, and we can use 613 * multi interrupts, then the vec is from 1 614 */ 615 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 616 intr_handle->nb_efd); 617 vf->msix_base = IAVF_RX_VEC_START; 618 vec = IAVF_RX_VEC_START; 619 for (i = 0; i < dev->data->nb_rx_queues; i++) { 620 qv_map[i].queue_id = i; 621 qv_map[i].vector_id = vec; 622 intr_handle->intr_vec[i] = vec++; 623 if (vec >= vf->nb_msix) 624 vec = IAVF_RX_VEC_START; 625 } 626 vf->qv_map = qv_map; 627 PMD_DRV_LOG(DEBUG, 628 "%u vectors are mapping to %u Rx queues", 629 vf->nb_msix, dev->data->nb_rx_queues); 630 } 631 } 632 633 if (!vf->lv_enabled) { 634 if (iavf_config_irq_map(adapter)) { 635 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 636 return -1; 637 } 638 } else { 639 uint16_t num_qv_maps = dev->data->nb_rx_queues; 640 uint16_t index = 0; 641 642 while (num_qv_maps > IAVF_IRQ_MAP_NUM_PER_BUF) { 643 if (iavf_config_irq_map_lv(adapter, 644 IAVF_IRQ_MAP_NUM_PER_BUF, index)) { 645 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 646 return -1; 647 } 648 num_qv_maps -= IAVF_IRQ_MAP_NUM_PER_BUF; 649 index += IAVF_IRQ_MAP_NUM_PER_BUF; 650 } 651 652 if (iavf_config_irq_map_lv(adapter, num_qv_maps, index)) { 653 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 654 return -1; 655 } 656 } 657 return 0; 658 } 659 660 static int 661 iavf_start_queues(struct rte_eth_dev *dev) 662 { 663 struct iavf_rx_queue *rxq; 664 struct iavf_tx_queue *txq; 665 int i; 666 667 for (i = 0; i < dev->data->nb_tx_queues; i++) { 668 txq = dev->data->tx_queues[i]; 669 if (txq->tx_deferred_start) 670 continue; 671 if (iavf_dev_tx_queue_start(dev, i) != 0) { 672 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 673 return -1; 674 } 675 } 676 677 for (i = 0; i < dev->data->nb_rx_queues; i++) { 678 rxq = dev->data->rx_queues[i]; 679 if (rxq->rx_deferred_start) 680 continue; 681 if (iavf_dev_rx_queue_start(dev, i) != 0) { 682 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 683 return -1; 684 } 685 } 686 687 return 0; 688 } 689 690 static int 691 iavf_dev_start(struct rte_eth_dev *dev) 692 { 693 struct iavf_adapter *adapter = 694 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 695 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 696 struct rte_intr_handle *intr_handle = dev->intr_handle; 697 uint16_t num_queue_pairs; 698 uint16_t index = 0; 699 700 PMD_INIT_FUNC_TRACE(); 701 702 adapter->stopped = 0; 703 704 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 705 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 706 dev->data->nb_tx_queues); 707 num_queue_pairs = vf->num_queue_pairs; 708 709 if (iavf_init_queues(dev) != 0) { 710 PMD_DRV_LOG(ERR, "failed to do Queue init"); 711 return -1; 712 } 713 714 /* If needed, send configure queues msg multiple times to make the 715 * adminq buffer length smaller than the 4K limitation. 716 */ 717 while (num_queue_pairs > IAVF_CFG_Q_NUM_PER_BUF) { 718 if (iavf_configure_queues(adapter, 719 IAVF_CFG_Q_NUM_PER_BUF, index) != 0) { 720 PMD_DRV_LOG(ERR, "configure queues failed"); 721 goto err_queue; 722 } 723 num_queue_pairs -= IAVF_CFG_Q_NUM_PER_BUF; 724 index += IAVF_CFG_Q_NUM_PER_BUF; 725 } 726 727 if (iavf_configure_queues(adapter, num_queue_pairs, index) != 0) { 728 PMD_DRV_LOG(ERR, "configure queues failed"); 729 goto err_queue; 730 } 731 732 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 733 PMD_DRV_LOG(ERR, "configure irq failed"); 734 goto err_queue; 735 } 736 /* re-enable intr again, because efd assign may change */ 737 if (dev->data->dev_conf.intr_conf.rxq != 0) { 738 rte_intr_disable(intr_handle); 739 rte_intr_enable(intr_handle); 740 } 741 742 /* Set all mac addrs */ 743 iavf_add_del_all_mac_addr(adapter, true); 744 745 /* Set all multicast addresses */ 746 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 747 true); 748 749 if (iavf_start_queues(dev) != 0) { 750 PMD_DRV_LOG(ERR, "enable queues failed"); 751 goto err_mac; 752 } 753 754 return 0; 755 756 err_mac: 757 iavf_add_del_all_mac_addr(adapter, false); 758 err_queue: 759 return -1; 760 } 761 762 static int 763 iavf_dev_stop(struct rte_eth_dev *dev) 764 { 765 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 766 struct iavf_adapter *adapter = 767 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 768 struct rte_intr_handle *intr_handle = dev->intr_handle; 769 770 PMD_INIT_FUNC_TRACE(); 771 772 if (adapter->stopped == 1) 773 return 0; 774 775 iavf_stop_queues(dev); 776 777 /* Disable the interrupt for Rx */ 778 rte_intr_efd_disable(intr_handle); 779 /* Rx interrupt vector mapping free */ 780 if (intr_handle->intr_vec) { 781 rte_free(intr_handle->intr_vec); 782 intr_handle->intr_vec = NULL; 783 } 784 785 /* remove all mac addrs */ 786 iavf_add_del_all_mac_addr(adapter, false); 787 788 /* remove all multicast addresses */ 789 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 790 false); 791 792 adapter->stopped = 1; 793 dev->data->dev_started = 0; 794 795 return 0; 796 } 797 798 static int 799 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 800 { 801 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 802 803 dev_info->max_rx_queues = IAVF_MAX_NUM_QUEUES_LV; 804 dev_info->max_tx_queues = IAVF_MAX_NUM_QUEUES_LV; 805 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 806 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 807 dev_info->max_mtu = dev_info->max_rx_pktlen - IAVF_ETH_OVERHEAD; 808 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 809 dev_info->hash_key_size = vf->vf_res->rss_key_size; 810 dev_info->reta_size = vf->vf_res->rss_lut_size; 811 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 812 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 813 dev_info->rx_offload_capa = 814 DEV_RX_OFFLOAD_VLAN_STRIP | 815 DEV_RX_OFFLOAD_QINQ_STRIP | 816 DEV_RX_OFFLOAD_IPV4_CKSUM | 817 DEV_RX_OFFLOAD_UDP_CKSUM | 818 DEV_RX_OFFLOAD_TCP_CKSUM | 819 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 820 DEV_RX_OFFLOAD_SCATTER | 821 DEV_RX_OFFLOAD_JUMBO_FRAME | 822 DEV_RX_OFFLOAD_VLAN_FILTER | 823 DEV_RX_OFFLOAD_RSS_HASH; 824 825 dev_info->tx_offload_capa = 826 DEV_TX_OFFLOAD_VLAN_INSERT | 827 DEV_TX_OFFLOAD_QINQ_INSERT | 828 DEV_TX_OFFLOAD_IPV4_CKSUM | 829 DEV_TX_OFFLOAD_UDP_CKSUM | 830 DEV_TX_OFFLOAD_TCP_CKSUM | 831 DEV_TX_OFFLOAD_SCTP_CKSUM | 832 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 833 DEV_TX_OFFLOAD_TCP_TSO | 834 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 835 DEV_TX_OFFLOAD_GRE_TNL_TSO | 836 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 837 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 838 DEV_TX_OFFLOAD_MULTI_SEGS | 839 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 840 841 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_CRC) 842 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_KEEP_CRC; 843 844 dev_info->default_rxconf = (struct rte_eth_rxconf) { 845 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 846 .rx_drop_en = 0, 847 .offloads = 0, 848 }; 849 850 dev_info->default_txconf = (struct rte_eth_txconf) { 851 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 852 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 853 .offloads = 0, 854 }; 855 856 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 857 .nb_max = IAVF_MAX_RING_DESC, 858 .nb_min = IAVF_MIN_RING_DESC, 859 .nb_align = IAVF_ALIGN_RING_DESC, 860 }; 861 862 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 863 .nb_max = IAVF_MAX_RING_DESC, 864 .nb_min = IAVF_MIN_RING_DESC, 865 .nb_align = IAVF_ALIGN_RING_DESC, 866 }; 867 868 return 0; 869 } 870 871 static const uint32_t * 872 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 873 { 874 static const uint32_t ptypes[] = { 875 RTE_PTYPE_L2_ETHER, 876 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 877 RTE_PTYPE_L4_FRAG, 878 RTE_PTYPE_L4_ICMP, 879 RTE_PTYPE_L4_NONFRAG, 880 RTE_PTYPE_L4_SCTP, 881 RTE_PTYPE_L4_TCP, 882 RTE_PTYPE_L4_UDP, 883 RTE_PTYPE_UNKNOWN 884 }; 885 return ptypes; 886 } 887 888 int 889 iavf_dev_link_update(struct rte_eth_dev *dev, 890 __rte_unused int wait_to_complete) 891 { 892 struct rte_eth_link new_link; 893 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 894 895 memset(&new_link, 0, sizeof(new_link)); 896 897 /* Only read status info stored in VF, and the info is updated 898 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 899 */ 900 switch (vf->link_speed) { 901 case 10: 902 new_link.link_speed = ETH_SPEED_NUM_10M; 903 break; 904 case 100: 905 new_link.link_speed = ETH_SPEED_NUM_100M; 906 break; 907 case 1000: 908 new_link.link_speed = ETH_SPEED_NUM_1G; 909 break; 910 case 10000: 911 new_link.link_speed = ETH_SPEED_NUM_10G; 912 break; 913 case 20000: 914 new_link.link_speed = ETH_SPEED_NUM_20G; 915 break; 916 case 25000: 917 new_link.link_speed = ETH_SPEED_NUM_25G; 918 break; 919 case 40000: 920 new_link.link_speed = ETH_SPEED_NUM_40G; 921 break; 922 case 50000: 923 new_link.link_speed = ETH_SPEED_NUM_50G; 924 break; 925 case 100000: 926 new_link.link_speed = ETH_SPEED_NUM_100G; 927 break; 928 default: 929 new_link.link_speed = ETH_SPEED_NUM_NONE; 930 break; 931 } 932 933 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 934 new_link.link_status = vf->link_up ? ETH_LINK_UP : 935 ETH_LINK_DOWN; 936 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 937 ETH_LINK_SPEED_FIXED); 938 939 return rte_eth_linkstatus_set(dev, &new_link); 940 } 941 942 static int 943 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 944 { 945 struct iavf_adapter *adapter = 946 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 947 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 948 949 return iavf_config_promisc(adapter, 950 true, vf->promisc_multicast_enabled); 951 } 952 953 static int 954 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 955 { 956 struct iavf_adapter *adapter = 957 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 958 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 959 960 return iavf_config_promisc(adapter, 961 false, vf->promisc_multicast_enabled); 962 } 963 964 static int 965 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 966 { 967 struct iavf_adapter *adapter = 968 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 969 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 970 971 return iavf_config_promisc(adapter, 972 vf->promisc_unicast_enabled, true); 973 } 974 975 static int 976 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 977 { 978 struct iavf_adapter *adapter = 979 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 980 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 981 982 return iavf_config_promisc(adapter, 983 vf->promisc_unicast_enabled, false); 984 } 985 986 static int 987 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 988 __rte_unused uint32_t index, 989 __rte_unused uint32_t pool) 990 { 991 struct iavf_adapter *adapter = 992 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 993 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 994 int err; 995 996 if (rte_is_zero_ether_addr(addr)) { 997 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 998 return -EINVAL; 999 } 1000 1001 err = iavf_add_del_eth_addr(adapter, addr, true); 1002 if (err) { 1003 PMD_DRV_LOG(ERR, "fail to add MAC address"); 1004 return -EIO; 1005 } 1006 1007 vf->mac_num++; 1008 1009 return 0; 1010 } 1011 1012 static void 1013 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 1014 { 1015 struct iavf_adapter *adapter = 1016 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1017 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1018 struct rte_ether_addr *addr; 1019 int err; 1020 1021 addr = &dev->data->mac_addrs[index]; 1022 1023 err = iavf_add_del_eth_addr(adapter, addr, false); 1024 if (err) 1025 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 1026 1027 vf->mac_num--; 1028 } 1029 1030 static int 1031 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 1032 { 1033 struct iavf_adapter *adapter = 1034 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1035 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1036 int err; 1037 1038 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 1039 err = iavf_add_del_vlan_v2(adapter, vlan_id, on); 1040 if (err) 1041 return -EIO; 1042 return 0; 1043 } 1044 1045 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1046 return -ENOTSUP; 1047 1048 err = iavf_add_del_vlan(adapter, vlan_id, on); 1049 if (err) 1050 return -EIO; 1051 return 0; 1052 } 1053 1054 static void 1055 iavf_iterate_vlan_filters_v2(struct rte_eth_dev *dev, bool enable) 1056 { 1057 struct rte_vlan_filter_conf *vfc = &dev->data->vlan_filter_conf; 1058 struct iavf_adapter *adapter = 1059 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1060 uint32_t i, j; 1061 uint64_t ids; 1062 1063 for (i = 0; i < RTE_DIM(vfc->ids); i++) { 1064 if (vfc->ids[i] == 0) 1065 continue; 1066 1067 ids = vfc->ids[i]; 1068 for (j = 0; ids != 0 && j < 64; j++, ids >>= 1) { 1069 if (ids & 1) 1070 iavf_add_del_vlan_v2(adapter, 1071 64 * i + j, enable); 1072 } 1073 } 1074 } 1075 1076 static int 1077 iavf_dev_vlan_offload_set_v2(struct rte_eth_dev *dev, int mask) 1078 { 1079 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1080 struct iavf_adapter *adapter = 1081 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1082 bool enable; 1083 int err; 1084 1085 if (mask & ETH_VLAN_FILTER_MASK) { 1086 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER); 1087 1088 iavf_iterate_vlan_filters_v2(dev, enable); 1089 } 1090 1091 if (mask & ETH_VLAN_STRIP_MASK) { 1092 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 1093 1094 err = iavf_config_vlan_strip_v2(adapter, enable); 1095 if (err) 1096 return -EIO; 1097 } 1098 1099 return 0; 1100 } 1101 1102 static int 1103 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 1104 { 1105 struct iavf_adapter *adapter = 1106 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1107 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1108 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 1109 int err; 1110 1111 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) 1112 return iavf_dev_vlan_offload_set_v2(dev, mask); 1113 1114 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1115 return -ENOTSUP; 1116 1117 /* Vlan stripping setting */ 1118 if (mask & ETH_VLAN_STRIP_MASK) { 1119 /* Enable or disable VLAN stripping */ 1120 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 1121 err = iavf_enable_vlan_strip(adapter); 1122 else 1123 err = iavf_disable_vlan_strip(adapter); 1124 1125 if (err) 1126 return -EIO; 1127 } 1128 return 0; 1129 } 1130 1131 static int 1132 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 1133 struct rte_eth_rss_reta_entry64 *reta_conf, 1134 uint16_t reta_size) 1135 { 1136 struct iavf_adapter *adapter = 1137 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1138 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1139 uint8_t *lut; 1140 uint16_t i, idx, shift; 1141 int ret; 1142 1143 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1144 return -ENOTSUP; 1145 1146 if (reta_size != vf->vf_res->rss_lut_size) { 1147 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1148 "(%d) doesn't match the number of hardware can " 1149 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1150 return -EINVAL; 1151 } 1152 1153 lut = rte_zmalloc("rss_lut", reta_size, 0); 1154 if (!lut) { 1155 PMD_DRV_LOG(ERR, "No memory can be allocated"); 1156 return -ENOMEM; 1157 } 1158 /* store the old lut table temporarily */ 1159 rte_memcpy(lut, vf->rss_lut, reta_size); 1160 1161 for (i = 0; i < reta_size; i++) { 1162 idx = i / RTE_RETA_GROUP_SIZE; 1163 shift = i % RTE_RETA_GROUP_SIZE; 1164 if (reta_conf[idx].mask & (1ULL << shift)) 1165 lut[i] = reta_conf[idx].reta[shift]; 1166 } 1167 1168 rte_memcpy(vf->rss_lut, lut, reta_size); 1169 /* send virtchnnl ops to configure rss*/ 1170 ret = iavf_configure_rss_lut(adapter); 1171 if (ret) /* revert back */ 1172 rte_memcpy(vf->rss_lut, lut, reta_size); 1173 rte_free(lut); 1174 1175 return ret; 1176 } 1177 1178 static int 1179 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 1180 struct rte_eth_rss_reta_entry64 *reta_conf, 1181 uint16_t reta_size) 1182 { 1183 struct iavf_adapter *adapter = 1184 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1185 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1186 uint16_t i, idx, shift; 1187 1188 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1189 return -ENOTSUP; 1190 1191 if (reta_size != vf->vf_res->rss_lut_size) { 1192 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1193 "(%d) doesn't match the number of hardware can " 1194 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1195 return -EINVAL; 1196 } 1197 1198 for (i = 0; i < reta_size; i++) { 1199 idx = i / RTE_RETA_GROUP_SIZE; 1200 shift = i % RTE_RETA_GROUP_SIZE; 1201 if (reta_conf[idx].mask & (1ULL << shift)) 1202 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 1203 } 1204 1205 return 0; 1206 } 1207 1208 static int 1209 iavf_set_rss_key(struct iavf_adapter *adapter, uint8_t *key, uint8_t key_len) 1210 { 1211 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1212 1213 /* HENA setting, it is enabled by default, no change */ 1214 if (!key || key_len == 0) { 1215 PMD_DRV_LOG(DEBUG, "No key to be configured"); 1216 return 0; 1217 } else if (key_len != vf->vf_res->rss_key_size) { 1218 PMD_DRV_LOG(ERR, "The size of hash key configured " 1219 "(%d) doesn't match the size of hardware can " 1220 "support (%d)", key_len, 1221 vf->vf_res->rss_key_size); 1222 return -EINVAL; 1223 } 1224 1225 rte_memcpy(vf->rss_key, key, key_len); 1226 1227 return iavf_configure_rss_key(adapter); 1228 } 1229 1230 static int 1231 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 1232 struct rte_eth_rss_conf *rss_conf) 1233 { 1234 struct iavf_adapter *adapter = 1235 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1236 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1237 int ret; 1238 1239 adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf = *rss_conf; 1240 1241 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1242 return -ENOTSUP; 1243 1244 /* Set hash key. */ 1245 ret = iavf_set_rss_key(adapter, rss_conf->rss_key, 1246 rss_conf->rss_key_len); 1247 if (ret) 1248 return ret; 1249 1250 if (rss_conf->rss_hf == 0) 1251 return 0; 1252 1253 /* Overwritten default RSS. */ 1254 ret = iavf_set_hena(adapter, 0); 1255 if (ret) 1256 PMD_DRV_LOG(ERR, "%s Remove rss vsi fail %d", 1257 __func__, ret); 1258 1259 /* Set new RSS configuration. */ 1260 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 1261 if (ret) { 1262 PMD_DRV_LOG(ERR, "fail to set new RSS"); 1263 return ret; 1264 } 1265 1266 return 0; 1267 } 1268 1269 static int 1270 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1271 struct rte_eth_rss_conf *rss_conf) 1272 { 1273 struct iavf_adapter *adapter = 1274 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1275 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1276 1277 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1278 return -ENOTSUP; 1279 1280 rss_conf->rss_hf = vf->rss_hf; 1281 1282 if (!rss_conf->rss_key) 1283 return 0; 1284 1285 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 1286 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 1287 1288 return 0; 1289 } 1290 1291 static int 1292 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1293 { 1294 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 1295 int ret = 0; 1296 1297 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 1298 return -EINVAL; 1299 1300 /* mtu setting is forbidden if port is start */ 1301 if (dev->data->dev_started) { 1302 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 1303 return -EBUSY; 1304 } 1305 1306 if (frame_size > RTE_ETHER_MAX_LEN) 1307 dev->data->dev_conf.rxmode.offloads |= 1308 DEV_RX_OFFLOAD_JUMBO_FRAME; 1309 else 1310 dev->data->dev_conf.rxmode.offloads &= 1311 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1312 1313 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1314 1315 return ret; 1316 } 1317 1318 static int 1319 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 1320 struct rte_ether_addr *mac_addr) 1321 { 1322 struct iavf_adapter *adapter = 1323 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1324 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1325 struct rte_ether_addr *perm_addr, *old_addr; 1326 int ret; 1327 1328 old_addr = (struct rte_ether_addr *)hw->mac.addr; 1329 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 1330 1331 /* If the MAC address is configured by host, skip the setting */ 1332 if (rte_is_valid_assigned_ether_addr(perm_addr)) 1333 return -EPERM; 1334 1335 ret = iavf_add_del_eth_addr(adapter, old_addr, false); 1336 if (ret) 1337 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 1338 " %02X:%02X:%02X:%02X:%02X:%02X", 1339 old_addr->addr_bytes[0], 1340 old_addr->addr_bytes[1], 1341 old_addr->addr_bytes[2], 1342 old_addr->addr_bytes[3], 1343 old_addr->addr_bytes[4], 1344 old_addr->addr_bytes[5]); 1345 1346 ret = iavf_add_del_eth_addr(adapter, mac_addr, true); 1347 if (ret) 1348 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 1349 " %02X:%02X:%02X:%02X:%02X:%02X", 1350 mac_addr->addr_bytes[0], 1351 mac_addr->addr_bytes[1], 1352 mac_addr->addr_bytes[2], 1353 mac_addr->addr_bytes[3], 1354 mac_addr->addr_bytes[4], 1355 mac_addr->addr_bytes[5]); 1356 1357 if (ret) 1358 return -EIO; 1359 1360 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1361 return 0; 1362 } 1363 1364 static void 1365 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1366 { 1367 if (*stat >= *offset) 1368 *stat = *stat - *offset; 1369 else 1370 *stat = (uint64_t)((*stat + 1371 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1372 1373 *stat &= IAVF_48_BIT_MASK; 1374 } 1375 1376 static void 1377 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1378 { 1379 if (*stat >= *offset) 1380 *stat = (uint64_t)(*stat - *offset); 1381 else 1382 *stat = (uint64_t)((*stat + 1383 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1384 } 1385 1386 static void 1387 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1388 { 1389 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1390 1391 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1392 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1393 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1394 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1395 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1396 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1397 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1398 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1399 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1400 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1401 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1402 } 1403 1404 static int 1405 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1406 { 1407 struct iavf_adapter *adapter = 1408 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1409 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1410 struct iavf_vsi *vsi = &vf->vsi; 1411 struct virtchnl_eth_stats *pstats = NULL; 1412 int ret; 1413 1414 ret = iavf_query_stats(adapter, &pstats); 1415 if (ret == 0) { 1416 iavf_update_stats(vsi, pstats); 1417 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1418 pstats->rx_broadcast - pstats->rx_discards; 1419 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1420 pstats->tx_unicast; 1421 stats->imissed = pstats->rx_discards; 1422 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1423 stats->ibytes = pstats->rx_bytes; 1424 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 1425 stats->obytes = pstats->tx_bytes; 1426 } else { 1427 PMD_DRV_LOG(ERR, "Get statistics failed"); 1428 } 1429 return ret; 1430 } 1431 1432 static int 1433 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1434 { 1435 int ret; 1436 struct iavf_adapter *adapter = 1437 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1438 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1439 struct iavf_vsi *vsi = &vf->vsi; 1440 struct virtchnl_eth_stats *pstats = NULL; 1441 1442 /* read stat values to clear hardware registers */ 1443 ret = iavf_query_stats(adapter, &pstats); 1444 if (ret != 0) 1445 return ret; 1446 1447 /* set stats offset base on current values */ 1448 vsi->eth_stats_offset = *pstats; 1449 1450 return 0; 1451 } 1452 1453 static int iavf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1454 struct rte_eth_xstat_name *xstats_names, 1455 __rte_unused unsigned int limit) 1456 { 1457 unsigned int i; 1458 1459 if (xstats_names != NULL) 1460 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1461 snprintf(xstats_names[i].name, 1462 sizeof(xstats_names[i].name), 1463 "%s", rte_iavf_stats_strings[i].name); 1464 } 1465 return IAVF_NB_XSTATS; 1466 } 1467 1468 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 1469 struct rte_eth_xstat *xstats, unsigned int n) 1470 { 1471 int ret; 1472 unsigned int i; 1473 struct iavf_adapter *adapter = 1474 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1475 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1476 struct iavf_vsi *vsi = &vf->vsi; 1477 struct virtchnl_eth_stats *pstats = NULL; 1478 1479 if (n < IAVF_NB_XSTATS) 1480 return IAVF_NB_XSTATS; 1481 1482 ret = iavf_query_stats(adapter, &pstats); 1483 if (ret != 0) 1484 return 0; 1485 1486 if (!xstats) 1487 return 0; 1488 1489 iavf_update_stats(vsi, pstats); 1490 1491 /* loop over xstats array and values from pstats */ 1492 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1493 xstats[i].id = i; 1494 xstats[i].value = *(uint64_t *)(((char *)pstats) + 1495 rte_iavf_stats_strings[i].offset); 1496 } 1497 1498 return IAVF_NB_XSTATS; 1499 } 1500 1501 1502 static int 1503 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1504 { 1505 struct iavf_adapter *adapter = 1506 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1507 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1508 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1509 uint16_t msix_intr; 1510 1511 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1512 if (msix_intr == IAVF_MISC_VEC_ID) { 1513 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1514 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1515 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1516 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1517 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1518 } else { 1519 IAVF_WRITE_REG(hw, 1520 IAVF_VFINT_DYN_CTLN1 1521 (msix_intr - IAVF_RX_VEC_START), 1522 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1523 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1524 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1525 } 1526 1527 IAVF_WRITE_FLUSH(hw); 1528 1529 rte_intr_ack(&pci_dev->intr_handle); 1530 1531 return 0; 1532 } 1533 1534 static int 1535 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1536 { 1537 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1538 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1539 uint16_t msix_intr; 1540 1541 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1542 if (msix_intr == IAVF_MISC_VEC_ID) { 1543 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1544 return -EIO; 1545 } 1546 1547 IAVF_WRITE_REG(hw, 1548 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1549 0); 1550 1551 IAVF_WRITE_FLUSH(hw); 1552 return 0; 1553 } 1554 1555 static int 1556 iavf_check_vf_reset_done(struct iavf_hw *hw) 1557 { 1558 int i, reset; 1559 1560 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1561 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1562 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1563 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1564 if (reset == VIRTCHNL_VFR_VFACTIVE || 1565 reset == VIRTCHNL_VFR_COMPLETED) 1566 break; 1567 rte_delay_ms(20); 1568 } 1569 1570 if (i >= IAVF_RESET_WAIT_CNT) 1571 return -1; 1572 1573 return 0; 1574 } 1575 1576 static int 1577 iavf_lookup_proto_xtr_type(const char *flex_name) 1578 { 1579 static struct { 1580 const char *name; 1581 enum iavf_proto_xtr_type type; 1582 } xtr_type_map[] = { 1583 { "vlan", IAVF_PROTO_XTR_VLAN }, 1584 { "ipv4", IAVF_PROTO_XTR_IPV4 }, 1585 { "ipv6", IAVF_PROTO_XTR_IPV6 }, 1586 { "ipv6_flow", IAVF_PROTO_XTR_IPV6_FLOW }, 1587 { "tcp", IAVF_PROTO_XTR_TCP }, 1588 { "ip_offset", IAVF_PROTO_XTR_IP_OFFSET }, 1589 }; 1590 uint32_t i; 1591 1592 for (i = 0; i < RTE_DIM(xtr_type_map); i++) { 1593 if (strcmp(flex_name, xtr_type_map[i].name) == 0) 1594 return xtr_type_map[i].type; 1595 } 1596 1597 PMD_DRV_LOG(ERR, "wrong proto_xtr type, " 1598 "it should be: vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset"); 1599 1600 return -1; 1601 } 1602 1603 /** 1604 * Parse elem, the elem could be single number/range or '(' ')' group 1605 * 1) A single number elem, it's just a simple digit. e.g. 9 1606 * 2) A single range elem, two digits with a '-' between. e.g. 2-6 1607 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6) 1608 * Within group elem, '-' used for a range separator; 1609 * ',' used for a single number. 1610 */ 1611 static int 1612 iavf_parse_queue_set(const char *input, int xtr_type, 1613 struct iavf_devargs *devargs) 1614 { 1615 const char *str = input; 1616 char *end = NULL; 1617 uint32_t min, max; 1618 uint32_t idx; 1619 1620 while (isblank(*str)) 1621 str++; 1622 1623 if (!isdigit(*str) && *str != '(') 1624 return -1; 1625 1626 /* process single number or single range of number */ 1627 if (*str != '(') { 1628 errno = 0; 1629 idx = strtoul(str, &end, 10); 1630 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1631 return -1; 1632 1633 while (isblank(*end)) 1634 end++; 1635 1636 min = idx; 1637 max = idx; 1638 1639 /* process single <number>-<number> */ 1640 if (*end == '-') { 1641 end++; 1642 while (isblank(*end)) 1643 end++; 1644 if (!isdigit(*end)) 1645 return -1; 1646 1647 errno = 0; 1648 idx = strtoul(end, &end, 10); 1649 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1650 return -1; 1651 1652 max = idx; 1653 while (isblank(*end)) 1654 end++; 1655 } 1656 1657 if (*end != ':') 1658 return -1; 1659 1660 for (idx = RTE_MIN(min, max); 1661 idx <= RTE_MAX(min, max); idx++) 1662 devargs->proto_xtr[idx] = xtr_type; 1663 1664 return 0; 1665 } 1666 1667 /* process set within bracket */ 1668 str++; 1669 while (isblank(*str)) 1670 str++; 1671 if (*str == '\0') 1672 return -1; 1673 1674 min = IAVF_MAX_QUEUE_NUM; 1675 do { 1676 /* go ahead to the first digit */ 1677 while (isblank(*str)) 1678 str++; 1679 if (!isdigit(*str)) 1680 return -1; 1681 1682 /* get the digit value */ 1683 errno = 0; 1684 idx = strtoul(str, &end, 10); 1685 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1686 return -1; 1687 1688 /* go ahead to separator '-',',' and ')' */ 1689 while (isblank(*end)) 1690 end++; 1691 if (*end == '-') { 1692 if (min == IAVF_MAX_QUEUE_NUM) 1693 min = idx; 1694 else /* avoid continuous '-' */ 1695 return -1; 1696 } else if (*end == ',' || *end == ')') { 1697 max = idx; 1698 if (min == IAVF_MAX_QUEUE_NUM) 1699 min = idx; 1700 1701 for (idx = RTE_MIN(min, max); 1702 idx <= RTE_MAX(min, max); idx++) 1703 devargs->proto_xtr[idx] = xtr_type; 1704 1705 min = IAVF_MAX_QUEUE_NUM; 1706 } else { 1707 return -1; 1708 } 1709 1710 str = end + 1; 1711 } while (*end != ')' && *end != '\0'); 1712 1713 return 0; 1714 } 1715 1716 static int 1717 iavf_parse_queue_proto_xtr(const char *queues, struct iavf_devargs *devargs) 1718 { 1719 const char *queue_start; 1720 uint32_t idx; 1721 int xtr_type; 1722 char flex_name[32]; 1723 1724 while (isblank(*queues)) 1725 queues++; 1726 1727 if (*queues != '[') { 1728 xtr_type = iavf_lookup_proto_xtr_type(queues); 1729 if (xtr_type < 0) 1730 return -1; 1731 1732 devargs->proto_xtr_dflt = xtr_type; 1733 1734 return 0; 1735 } 1736 1737 queues++; 1738 do { 1739 while (isblank(*queues)) 1740 queues++; 1741 if (*queues == '\0') 1742 return -1; 1743 1744 queue_start = queues; 1745 1746 /* go across a complete bracket */ 1747 if (*queue_start == '(') { 1748 queues += strcspn(queues, ")"); 1749 if (*queues != ')') 1750 return -1; 1751 } 1752 1753 /* scan the separator ':' */ 1754 queues += strcspn(queues, ":"); 1755 if (*queues++ != ':') 1756 return -1; 1757 while (isblank(*queues)) 1758 queues++; 1759 1760 for (idx = 0; ; idx++) { 1761 if (isblank(queues[idx]) || 1762 queues[idx] == ',' || 1763 queues[idx] == ']' || 1764 queues[idx] == '\0') 1765 break; 1766 1767 if (idx > sizeof(flex_name) - 2) 1768 return -1; 1769 1770 flex_name[idx] = queues[idx]; 1771 } 1772 flex_name[idx] = '\0'; 1773 xtr_type = iavf_lookup_proto_xtr_type(flex_name); 1774 if (xtr_type < 0) 1775 return -1; 1776 1777 queues += idx; 1778 1779 while (isblank(*queues) || *queues == ',' || *queues == ']') 1780 queues++; 1781 1782 if (iavf_parse_queue_set(queue_start, xtr_type, devargs) < 0) 1783 return -1; 1784 } while (*queues != '\0'); 1785 1786 return 0; 1787 } 1788 1789 static int 1790 iavf_handle_proto_xtr_arg(__rte_unused const char *key, const char *value, 1791 void *extra_args) 1792 { 1793 struct iavf_devargs *devargs = extra_args; 1794 1795 if (!value || !extra_args) 1796 return -EINVAL; 1797 1798 if (iavf_parse_queue_proto_xtr(value, devargs) < 0) { 1799 PMD_DRV_LOG(ERR, "the proto_xtr's parameter is wrong : '%s'", 1800 value); 1801 return -1; 1802 } 1803 1804 return 0; 1805 } 1806 1807 static int iavf_parse_devargs(struct rte_eth_dev *dev) 1808 { 1809 struct iavf_adapter *ad = 1810 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1811 struct rte_devargs *devargs = dev->device->devargs; 1812 struct rte_kvargs *kvlist; 1813 int ret; 1814 1815 if (!devargs) 1816 return 0; 1817 1818 kvlist = rte_kvargs_parse(devargs->args, iavf_valid_args); 1819 if (!kvlist) { 1820 PMD_INIT_LOG(ERR, "invalid kvargs key\n"); 1821 return -EINVAL; 1822 } 1823 1824 ad->devargs.proto_xtr_dflt = IAVF_PROTO_XTR_NONE; 1825 memset(ad->devargs.proto_xtr, IAVF_PROTO_XTR_NONE, 1826 sizeof(ad->devargs.proto_xtr)); 1827 1828 ret = rte_kvargs_process(kvlist, IAVF_PROTO_XTR_ARG, 1829 &iavf_handle_proto_xtr_arg, &ad->devargs); 1830 if (ret) 1831 goto bail; 1832 1833 bail: 1834 rte_kvargs_free(kvlist); 1835 return ret; 1836 } 1837 1838 static void 1839 iavf_init_proto_xtr(struct rte_eth_dev *dev) 1840 { 1841 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1842 struct iavf_adapter *ad = 1843 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1844 const struct iavf_proto_xtr_ol *xtr_ol; 1845 bool proto_xtr_enable = false; 1846 int offset; 1847 uint16_t i; 1848 1849 vf->proto_xtr = rte_zmalloc("vf proto xtr", 1850 vf->vsi_res->num_queue_pairs, 0); 1851 if (unlikely(!(vf->proto_xtr))) { 1852 PMD_DRV_LOG(ERR, "no memory for setting up proto_xtr's table"); 1853 return; 1854 } 1855 1856 for (i = 0; i < vf->vsi_res->num_queue_pairs; i++) { 1857 vf->proto_xtr[i] = ad->devargs.proto_xtr[i] != 1858 IAVF_PROTO_XTR_NONE ? 1859 ad->devargs.proto_xtr[i] : 1860 ad->devargs.proto_xtr_dflt; 1861 1862 if (vf->proto_xtr[i] != IAVF_PROTO_XTR_NONE) { 1863 uint8_t type = vf->proto_xtr[i]; 1864 1865 iavf_proto_xtr_params[type].required = true; 1866 proto_xtr_enable = true; 1867 } 1868 } 1869 1870 if (likely(!proto_xtr_enable)) 1871 return; 1872 1873 offset = rte_mbuf_dynfield_register(&iavf_proto_xtr_metadata_param); 1874 if (unlikely(offset == -1)) { 1875 PMD_DRV_LOG(ERR, 1876 "failed to extract protocol metadata, error %d", 1877 -rte_errno); 1878 return; 1879 } 1880 1881 PMD_DRV_LOG(DEBUG, 1882 "proto_xtr metadata offset in mbuf is : %d", 1883 offset); 1884 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = offset; 1885 1886 for (i = 0; i < RTE_DIM(iavf_proto_xtr_params); i++) { 1887 xtr_ol = &iavf_proto_xtr_params[i]; 1888 1889 uint8_t rxdid = iavf_proto_xtr_type_to_rxdid((uint8_t)i); 1890 1891 if (!xtr_ol->required) 1892 continue; 1893 1894 if (!(vf->supported_rxdid & BIT(rxdid))) { 1895 PMD_DRV_LOG(ERR, 1896 "rxdid[%u] is not supported in hardware", 1897 rxdid); 1898 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 1899 break; 1900 } 1901 1902 offset = rte_mbuf_dynflag_register(&xtr_ol->param); 1903 if (unlikely(offset == -1)) { 1904 PMD_DRV_LOG(ERR, 1905 "failed to register proto_xtr offload '%s', error %d", 1906 xtr_ol->param.name, -rte_errno); 1907 1908 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 1909 break; 1910 } 1911 1912 PMD_DRV_LOG(DEBUG, 1913 "proto_xtr offload '%s' offset in mbuf is : %d", 1914 xtr_ol->param.name, offset); 1915 *xtr_ol->ol_flag = 1ULL << offset; 1916 } 1917 } 1918 1919 static int 1920 iavf_init_vf(struct rte_eth_dev *dev) 1921 { 1922 int err, bufsz; 1923 struct iavf_adapter *adapter = 1924 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1925 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1926 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1927 1928 err = iavf_parse_devargs(dev); 1929 if (err) { 1930 PMD_INIT_LOG(ERR, "Failed to parse devargs"); 1931 goto err; 1932 } 1933 1934 err = iavf_set_mac_type(hw); 1935 if (err) { 1936 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1937 goto err; 1938 } 1939 1940 err = iavf_check_vf_reset_done(hw); 1941 if (err) { 1942 PMD_INIT_LOG(ERR, "VF is still resetting"); 1943 goto err; 1944 } 1945 1946 iavf_init_adminq_parameter(hw); 1947 err = iavf_init_adminq(hw); 1948 if (err) { 1949 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1950 goto err; 1951 } 1952 1953 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1954 if (!vf->aq_resp) { 1955 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1956 goto err_aq; 1957 } 1958 if (iavf_check_api_version(adapter) != 0) { 1959 PMD_INIT_LOG(ERR, "check_api version failed"); 1960 goto err_api; 1961 } 1962 1963 bufsz = sizeof(struct virtchnl_vf_resource) + 1964 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1965 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1966 if (!vf->vf_res) { 1967 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1968 goto err_api; 1969 } 1970 if (iavf_get_vf_resource(adapter) != 0) { 1971 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1972 goto err_alloc; 1973 } 1974 /* Allocate memort for RSS info */ 1975 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1976 vf->rss_key = rte_zmalloc("rss_key", 1977 vf->vf_res->rss_key_size, 0); 1978 if (!vf->rss_key) { 1979 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1980 goto err_rss; 1981 } 1982 vf->rss_lut = rte_zmalloc("rss_lut", 1983 vf->vf_res->rss_lut_size, 0); 1984 if (!vf->rss_lut) { 1985 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1986 goto err_rss; 1987 } 1988 } 1989 1990 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 1991 if (iavf_get_supported_rxdid(adapter) != 0) { 1992 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 1993 goto err_rss; 1994 } 1995 } 1996 1997 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 1998 if (iavf_get_vlan_offload_caps_v2(adapter) != 0) { 1999 PMD_INIT_LOG(ERR, "failed to do get VLAN offload v2 capabilities"); 2000 goto err_rss; 2001 } 2002 } 2003 2004 iavf_init_proto_xtr(dev); 2005 2006 return 0; 2007 err_rss: 2008 rte_free(vf->rss_key); 2009 rte_free(vf->rss_lut); 2010 err_alloc: 2011 rte_free(vf->vf_res); 2012 vf->vsi_res = NULL; 2013 err_api: 2014 rte_free(vf->aq_resp); 2015 err_aq: 2016 iavf_shutdown_adminq(hw); 2017 err: 2018 return -1; 2019 } 2020 2021 /* Enable default admin queue interrupt setting */ 2022 static inline void 2023 iavf_enable_irq0(struct iavf_hw *hw) 2024 { 2025 /* Enable admin queue interrupt trigger */ 2026 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 2027 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 2028 2029 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2030 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 2031 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 2032 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2033 2034 IAVF_WRITE_FLUSH(hw); 2035 } 2036 2037 static inline void 2038 iavf_disable_irq0(struct iavf_hw *hw) 2039 { 2040 /* Disable all interrupt types */ 2041 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 2042 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2043 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2044 IAVF_WRITE_FLUSH(hw); 2045 } 2046 2047 static void 2048 iavf_dev_interrupt_handler(void *param) 2049 { 2050 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 2051 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2052 2053 iavf_disable_irq0(hw); 2054 2055 iavf_handle_virtchnl_msg(dev); 2056 2057 iavf_enable_irq0(hw); 2058 } 2059 2060 static int 2061 iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 2062 enum rte_filter_type filter_type, 2063 enum rte_filter_op filter_op, 2064 void *arg) 2065 { 2066 int ret = 0; 2067 2068 if (!dev) 2069 return -EINVAL; 2070 2071 switch (filter_type) { 2072 case RTE_ETH_FILTER_GENERIC: 2073 if (filter_op != RTE_ETH_FILTER_GET) 2074 return -EINVAL; 2075 *(const void **)arg = &iavf_flow_ops; 2076 break; 2077 default: 2078 PMD_DRV_LOG(WARNING, "Filter type (%d) not supported", 2079 filter_type); 2080 ret = -EINVAL; 2081 break; 2082 } 2083 2084 return ret; 2085 } 2086 2087 2088 static int 2089 iavf_dev_init(struct rte_eth_dev *eth_dev) 2090 { 2091 struct iavf_adapter *adapter = 2092 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2093 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 2094 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 2095 int ret = 0; 2096 2097 PMD_INIT_FUNC_TRACE(); 2098 2099 /* assign ops func pointer */ 2100 eth_dev->dev_ops = &iavf_eth_dev_ops; 2101 eth_dev->rx_queue_count = iavf_dev_rxq_count; 2102 eth_dev->rx_descriptor_status = iavf_dev_rx_desc_status; 2103 eth_dev->tx_descriptor_status = iavf_dev_tx_desc_status; 2104 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 2105 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 2106 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 2107 2108 /* For secondary processes, we don't initialise any further as primary 2109 * has already done this work. Only check if we need a different RX 2110 * and TX function. 2111 */ 2112 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2113 iavf_set_rx_function(eth_dev); 2114 iavf_set_tx_function(eth_dev); 2115 return 0; 2116 } 2117 rte_eth_copy_pci_info(eth_dev, pci_dev); 2118 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2119 2120 hw->vendor_id = pci_dev->id.vendor_id; 2121 hw->device_id = pci_dev->id.device_id; 2122 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 2123 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 2124 hw->bus.bus_id = pci_dev->addr.bus; 2125 hw->bus.device = pci_dev->addr.devid; 2126 hw->bus.func = pci_dev->addr.function; 2127 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 2128 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2129 adapter->eth_dev = eth_dev; 2130 adapter->stopped = 1; 2131 2132 if (iavf_init_vf(eth_dev) != 0) { 2133 PMD_INIT_LOG(ERR, "Init vf failed"); 2134 return -1; 2135 } 2136 2137 /* set default ptype table */ 2138 adapter->ptype_tbl = iavf_get_default_ptype_table(); 2139 2140 /* copy mac addr */ 2141 eth_dev->data->mac_addrs = rte_zmalloc( 2142 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 2143 if (!eth_dev->data->mac_addrs) { 2144 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 2145 " store MAC addresses", 2146 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 2147 return -ENOMEM; 2148 } 2149 /* If the MAC address is not configured by host, 2150 * generate a random one. 2151 */ 2152 if (!rte_is_valid_assigned_ether_addr( 2153 (struct rte_ether_addr *)hw->mac.addr)) 2154 rte_eth_random_addr(hw->mac.addr); 2155 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 2156 ð_dev->data->mac_addrs[0]); 2157 2158 /* register callback func to eal lib */ 2159 rte_intr_callback_register(&pci_dev->intr_handle, 2160 iavf_dev_interrupt_handler, 2161 (void *)eth_dev); 2162 2163 /* enable uio intr after callback register */ 2164 rte_intr_enable(&pci_dev->intr_handle); 2165 2166 /* configure and enable device interrupt */ 2167 iavf_enable_irq0(hw); 2168 2169 ret = iavf_flow_init(adapter); 2170 if (ret) { 2171 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 2172 return ret; 2173 } 2174 2175 /* Set hena = 0 to ask PF to cleanup all existing RSS. */ 2176 ret = iavf_set_hena(adapter, 0); 2177 if (ret) { 2178 PMD_DRV_LOG(ERR, "fail to disable default PF RSS"); 2179 return ret; 2180 } 2181 2182 return 0; 2183 } 2184 2185 static int 2186 iavf_dev_close(struct rte_eth_dev *dev) 2187 { 2188 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2189 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2190 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 2191 struct iavf_adapter *adapter = 2192 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2193 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2194 int ret; 2195 2196 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2197 return 0; 2198 2199 ret = iavf_dev_stop(dev); 2200 2201 iavf_flow_flush(dev, NULL); 2202 iavf_flow_uninit(adapter); 2203 2204 /* 2205 * disable promiscuous mode before reset vf 2206 * it is a workaround solution when work with kernel driver 2207 * and it is not the normal way 2208 */ 2209 if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled) 2210 iavf_config_promisc(adapter, false, false); 2211 2212 iavf_shutdown_adminq(hw); 2213 /* disable uio intr before callback unregister */ 2214 rte_intr_disable(intr_handle); 2215 2216 /* unregister callback func from eal lib */ 2217 rte_intr_callback_unregister(intr_handle, 2218 iavf_dev_interrupt_handler, dev); 2219 iavf_disable_irq0(hw); 2220 2221 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2222 if (vf->rss_lut) { 2223 rte_free(vf->rss_lut); 2224 vf->rss_lut = NULL; 2225 } 2226 if (vf->rss_key) { 2227 rte_free(vf->rss_key); 2228 vf->rss_key = NULL; 2229 } 2230 } 2231 2232 rte_free(vf->vf_res); 2233 vf->vsi_res = NULL; 2234 vf->vf_res = NULL; 2235 2236 rte_free(vf->aq_resp); 2237 vf->aq_resp = NULL; 2238 2239 vf->vf_reset = false; 2240 2241 return ret; 2242 } 2243 2244 static int 2245 iavf_dev_uninit(struct rte_eth_dev *dev) 2246 { 2247 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2248 return -EPERM; 2249 2250 iavf_dev_close(dev); 2251 2252 return 0; 2253 } 2254 2255 /* 2256 * Reset VF device only to re-initialize resources in PMD layer 2257 */ 2258 static int 2259 iavf_dev_reset(struct rte_eth_dev *dev) 2260 { 2261 int ret; 2262 2263 ret = iavf_dev_uninit(dev); 2264 if (ret) 2265 return ret; 2266 2267 return iavf_dev_init(dev); 2268 } 2269 2270 static int 2271 iavf_dcf_cap_check_handler(__rte_unused const char *key, 2272 const char *value, __rte_unused void *opaque) 2273 { 2274 if (strcmp(value, "dcf")) 2275 return -1; 2276 2277 return 0; 2278 } 2279 2280 static int 2281 iavf_dcf_cap_selected(struct rte_devargs *devargs) 2282 { 2283 struct rte_kvargs *kvlist; 2284 const char *key = "cap"; 2285 int ret = 0; 2286 2287 if (devargs == NULL) 2288 return 0; 2289 2290 kvlist = rte_kvargs_parse(devargs->args, NULL); 2291 if (kvlist == NULL) 2292 return 0; 2293 2294 if (!rte_kvargs_count(kvlist, key)) 2295 goto exit; 2296 2297 /* dcf capability selected when there's a key-value pair: cap=dcf */ 2298 if (rte_kvargs_process(kvlist, key, 2299 iavf_dcf_cap_check_handler, NULL) < 0) 2300 goto exit; 2301 2302 ret = 1; 2303 2304 exit: 2305 rte_kvargs_free(kvlist); 2306 return ret; 2307 } 2308 2309 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2310 struct rte_pci_device *pci_dev) 2311 { 2312 if (iavf_dcf_cap_selected(pci_dev->device.devargs)) 2313 return 1; 2314 2315 return rte_eth_dev_pci_generic_probe(pci_dev, 2316 sizeof(struct iavf_adapter), iavf_dev_init); 2317 } 2318 2319 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 2320 { 2321 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 2322 } 2323 2324 /* Adaptive virtual function driver struct */ 2325 static struct rte_pci_driver rte_iavf_pmd = { 2326 .id_table = pci_id_iavf_map, 2327 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 2328 .probe = eth_iavf_pci_probe, 2329 .remove = eth_iavf_pci_remove, 2330 }; 2331 2332 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 2333 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 2334 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 2335 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf"); 2336 RTE_LOG_REGISTER(iavf_logtype_init, pmd.net.iavf.init, NOTICE); 2337 RTE_LOG_REGISTER(iavf_logtype_driver, pmd.net.iavf.driver, NOTICE); 2338 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 2339 RTE_LOG_REGISTER(iavf_logtype_rx, pmd.net.iavf.rx, DEBUG); 2340 #endif 2341 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 2342 RTE_LOG_REGISTER(iavf_logtype_tx, pmd.net.iavf.tx, DEBUG); 2343 #endif 2344 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 2345 RTE_LOG_REGISTER(iavf_logtype_tx_free, pmd.net.iavf.tx_free, DEBUG); 2346 #endif 2347