1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <ethdev_driver.h> 23 #include <ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 #include "iavf_generic_flow.h" 31 #include "rte_pmd_iavf.h" 32 33 /* devargs */ 34 #define IAVF_PROTO_XTR_ARG "proto_xtr" 35 36 static const char * const iavf_valid_args[] = { 37 IAVF_PROTO_XTR_ARG, 38 NULL 39 }; 40 41 static const struct rte_mbuf_dynfield iavf_proto_xtr_metadata_param = { 42 .name = "intel_pmd_dynfield_proto_xtr_metadata", 43 .size = sizeof(uint32_t), 44 .align = __alignof__(uint32_t), 45 .flags = 0, 46 }; 47 48 struct iavf_proto_xtr_ol { 49 const struct rte_mbuf_dynflag param; 50 uint64_t *ol_flag; 51 bool required; 52 }; 53 54 static struct iavf_proto_xtr_ol iavf_proto_xtr_params[] = { 55 [IAVF_PROTO_XTR_VLAN] = { 56 .param = { .name = "intel_pmd_dynflag_proto_xtr_vlan" }, 57 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_vlan_mask }, 58 [IAVF_PROTO_XTR_IPV4] = { 59 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv4" }, 60 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv4_mask }, 61 [IAVF_PROTO_XTR_IPV6] = { 62 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6" }, 63 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_mask }, 64 [IAVF_PROTO_XTR_IPV6_FLOW] = { 65 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6_flow" }, 66 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_flow_mask }, 67 [IAVF_PROTO_XTR_TCP] = { 68 .param = { .name = "intel_pmd_dynflag_proto_xtr_tcp" }, 69 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_tcp_mask }, 70 [IAVF_PROTO_XTR_IP_OFFSET] = { 71 .param = { .name = "intel_pmd_dynflag_proto_xtr_ip_offset" }, 72 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ip_offset_mask }, 73 }; 74 75 static int iavf_dev_configure(struct rte_eth_dev *dev); 76 static int iavf_dev_start(struct rte_eth_dev *dev); 77 static int iavf_dev_stop(struct rte_eth_dev *dev); 78 static int iavf_dev_close(struct rte_eth_dev *dev); 79 static int iavf_dev_reset(struct rte_eth_dev *dev); 80 static int iavf_dev_info_get(struct rte_eth_dev *dev, 81 struct rte_eth_dev_info *dev_info); 82 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 83 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 84 struct rte_eth_stats *stats); 85 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 86 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 87 struct rte_eth_xstat *xstats, unsigned int n); 88 static int iavf_dev_xstats_get_names(struct rte_eth_dev *dev, 89 struct rte_eth_xstat_name *xstats_names, 90 unsigned int limit); 91 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 92 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 93 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 94 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 95 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 96 struct rte_ether_addr *addr, 97 uint32_t index, 98 uint32_t pool); 99 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 100 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 101 uint16_t vlan_id, int on); 102 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 103 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 104 struct rte_eth_rss_reta_entry64 *reta_conf, 105 uint16_t reta_size); 106 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 107 struct rte_eth_rss_reta_entry64 *reta_conf, 108 uint16_t reta_size); 109 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 110 struct rte_eth_rss_conf *rss_conf); 111 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 112 struct rte_eth_rss_conf *rss_conf); 113 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 114 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 115 struct rte_ether_addr *mac_addr); 116 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 117 uint16_t queue_id); 118 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 119 uint16_t queue_id); 120 static int iavf_dev_flow_ops_get(struct rte_eth_dev *dev, 121 const struct rte_flow_ops **ops); 122 static int iavf_set_mc_addr_list(struct rte_eth_dev *dev, 123 struct rte_ether_addr *mc_addrs, 124 uint32_t mc_addrs_num); 125 static int iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg); 126 127 static const struct rte_pci_id pci_id_iavf_map[] = { 128 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 129 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF) }, 130 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF_HV) }, 131 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_VF) }, 132 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_A0_VF) }, 133 { .vendor_id = 0, /* sentinel */ }, 134 }; 135 136 struct rte_iavf_xstats_name_off { 137 char name[RTE_ETH_XSTATS_NAME_SIZE]; 138 unsigned int offset; 139 }; 140 141 static const struct rte_iavf_xstats_name_off rte_iavf_stats_strings[] = { 142 {"rx_bytes", offsetof(struct iavf_eth_stats, rx_bytes)}, 143 {"rx_unicast_packets", offsetof(struct iavf_eth_stats, rx_unicast)}, 144 {"rx_multicast_packets", offsetof(struct iavf_eth_stats, rx_multicast)}, 145 {"rx_broadcast_packets", offsetof(struct iavf_eth_stats, rx_broadcast)}, 146 {"rx_dropped_packets", offsetof(struct iavf_eth_stats, rx_discards)}, 147 {"rx_unknown_protocol_packets", offsetof(struct iavf_eth_stats, 148 rx_unknown_protocol)}, 149 {"tx_bytes", offsetof(struct iavf_eth_stats, tx_bytes)}, 150 {"tx_unicast_packets", offsetof(struct iavf_eth_stats, tx_unicast)}, 151 {"tx_multicast_packets", offsetof(struct iavf_eth_stats, tx_multicast)}, 152 {"tx_broadcast_packets", offsetof(struct iavf_eth_stats, tx_broadcast)}, 153 {"tx_dropped_packets", offsetof(struct iavf_eth_stats, tx_discards)}, 154 {"tx_error_packets", offsetof(struct iavf_eth_stats, tx_errors)}, 155 }; 156 157 #define IAVF_NB_XSTATS (sizeof(rte_iavf_stats_strings) / \ 158 sizeof(rte_iavf_stats_strings[0])) 159 160 static const struct eth_dev_ops iavf_eth_dev_ops = { 161 .dev_configure = iavf_dev_configure, 162 .dev_start = iavf_dev_start, 163 .dev_stop = iavf_dev_stop, 164 .dev_close = iavf_dev_close, 165 .dev_reset = iavf_dev_reset, 166 .dev_infos_get = iavf_dev_info_get, 167 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 168 .link_update = iavf_dev_link_update, 169 .stats_get = iavf_dev_stats_get, 170 .stats_reset = iavf_dev_stats_reset, 171 .xstats_get = iavf_dev_xstats_get, 172 .xstats_get_names = iavf_dev_xstats_get_names, 173 .xstats_reset = iavf_dev_stats_reset, 174 .promiscuous_enable = iavf_dev_promiscuous_enable, 175 .promiscuous_disable = iavf_dev_promiscuous_disable, 176 .allmulticast_enable = iavf_dev_allmulticast_enable, 177 .allmulticast_disable = iavf_dev_allmulticast_disable, 178 .mac_addr_add = iavf_dev_add_mac_addr, 179 .mac_addr_remove = iavf_dev_del_mac_addr, 180 .set_mc_addr_list = iavf_set_mc_addr_list, 181 .vlan_filter_set = iavf_dev_vlan_filter_set, 182 .vlan_offload_set = iavf_dev_vlan_offload_set, 183 .rx_queue_start = iavf_dev_rx_queue_start, 184 .rx_queue_stop = iavf_dev_rx_queue_stop, 185 .tx_queue_start = iavf_dev_tx_queue_start, 186 .tx_queue_stop = iavf_dev_tx_queue_stop, 187 .rx_queue_setup = iavf_dev_rx_queue_setup, 188 .rx_queue_release = iavf_dev_rx_queue_release, 189 .tx_queue_setup = iavf_dev_tx_queue_setup, 190 .tx_queue_release = iavf_dev_tx_queue_release, 191 .mac_addr_set = iavf_dev_set_default_mac_addr, 192 .reta_update = iavf_dev_rss_reta_update, 193 .reta_query = iavf_dev_rss_reta_query, 194 .rss_hash_update = iavf_dev_rss_hash_update, 195 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 196 .rxq_info_get = iavf_dev_rxq_info_get, 197 .txq_info_get = iavf_dev_txq_info_get, 198 .mtu_set = iavf_dev_mtu_set, 199 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 200 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 201 .flow_ops_get = iavf_dev_flow_ops_get, 202 .tx_done_cleanup = iavf_dev_tx_done_cleanup, 203 .get_monitor_addr = iavf_get_monitor_addr, 204 .tm_ops_get = iavf_tm_ops_get, 205 }; 206 207 static int 208 iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused, 209 void *arg) 210 { 211 if (!arg) 212 return -EINVAL; 213 214 *(const void **)arg = &iavf_tm_ops; 215 216 return 0; 217 } 218 219 static int 220 iavf_set_mc_addr_list(struct rte_eth_dev *dev, 221 struct rte_ether_addr *mc_addrs, 222 uint32_t mc_addrs_num) 223 { 224 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 225 struct iavf_adapter *adapter = 226 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 227 int err, ret; 228 229 if (mc_addrs_num > IAVF_NUM_MACADDR_MAX) { 230 PMD_DRV_LOG(ERR, 231 "can't add more than a limited number (%u) of addresses.", 232 (uint32_t)IAVF_NUM_MACADDR_MAX); 233 return -EINVAL; 234 } 235 236 /* flush previous addresses */ 237 err = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 238 false); 239 if (err) 240 return err; 241 242 /* add new ones */ 243 err = iavf_add_del_mc_addr_list(adapter, mc_addrs, mc_addrs_num, true); 244 245 if (err) { 246 /* if adding mac address list fails, should add the previous 247 * addresses back. 248 */ 249 ret = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, 250 vf->mc_addrs_num, true); 251 if (ret) 252 return ret; 253 } else { 254 vf->mc_addrs_num = mc_addrs_num; 255 memcpy(vf->mc_addrs, 256 mc_addrs, mc_addrs_num * sizeof(*mc_addrs)); 257 } 258 259 return err; 260 } 261 262 static int 263 iavf_config_rss_hf(struct iavf_adapter *adapter, uint64_t rss_hf) 264 { 265 static const uint64_t map_hena_rss[] = { 266 /* IPv4 */ 267 [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] = 268 ETH_RSS_NONFRAG_IPV4_UDP, 269 [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP] = 270 ETH_RSS_NONFRAG_IPV4_UDP, 271 [IAVF_FILTER_PCTYPE_NONF_IPV4_UDP] = 272 ETH_RSS_NONFRAG_IPV4_UDP, 273 [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] = 274 ETH_RSS_NONFRAG_IPV4_TCP, 275 [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP] = 276 ETH_RSS_NONFRAG_IPV4_TCP, 277 [IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP] = 278 ETH_RSS_NONFRAG_IPV4_SCTP, 279 [IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER] = 280 ETH_RSS_NONFRAG_IPV4_OTHER, 281 [IAVF_FILTER_PCTYPE_FRAG_IPV4] = ETH_RSS_FRAG_IPV4, 282 283 /* IPv6 */ 284 [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] = 285 ETH_RSS_NONFRAG_IPV6_UDP, 286 [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP] = 287 ETH_RSS_NONFRAG_IPV6_UDP, 288 [IAVF_FILTER_PCTYPE_NONF_IPV6_UDP] = 289 ETH_RSS_NONFRAG_IPV6_UDP, 290 [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] = 291 ETH_RSS_NONFRAG_IPV6_TCP, 292 [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP] = 293 ETH_RSS_NONFRAG_IPV6_TCP, 294 [IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP] = 295 ETH_RSS_NONFRAG_IPV6_SCTP, 296 [IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER] = 297 ETH_RSS_NONFRAG_IPV6_OTHER, 298 [IAVF_FILTER_PCTYPE_FRAG_IPV6] = ETH_RSS_FRAG_IPV6, 299 300 /* L2 Payload */ 301 [IAVF_FILTER_PCTYPE_L2_PAYLOAD] = ETH_RSS_L2_PAYLOAD 302 }; 303 304 const uint64_t ipv4_rss = ETH_RSS_NONFRAG_IPV4_UDP | 305 ETH_RSS_NONFRAG_IPV4_TCP | 306 ETH_RSS_NONFRAG_IPV4_SCTP | 307 ETH_RSS_NONFRAG_IPV4_OTHER | 308 ETH_RSS_FRAG_IPV4; 309 310 const uint64_t ipv6_rss = ETH_RSS_NONFRAG_IPV6_UDP | 311 ETH_RSS_NONFRAG_IPV6_TCP | 312 ETH_RSS_NONFRAG_IPV6_SCTP | 313 ETH_RSS_NONFRAG_IPV6_OTHER | 314 ETH_RSS_FRAG_IPV6; 315 316 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 317 uint64_t caps = 0, hena = 0, valid_rss_hf = 0; 318 uint32_t i; 319 int ret; 320 321 ret = iavf_get_hena_caps(adapter, &caps); 322 if (ret) 323 return ret; 324 /** 325 * ETH_RSS_IPV4 and ETH_RSS_IPV6 can be considered as 2 326 * generalizations of all other IPv4 and IPv6 RSS types. 327 */ 328 if (rss_hf & ETH_RSS_IPV4) 329 rss_hf |= ipv4_rss; 330 331 if (rss_hf & ETH_RSS_IPV6) 332 rss_hf |= ipv6_rss; 333 334 RTE_BUILD_BUG_ON(RTE_DIM(map_hena_rss) > sizeof(uint64_t) * CHAR_BIT); 335 336 for (i = 0; i < RTE_DIM(map_hena_rss); i++) { 337 uint64_t bit = BIT_ULL(i); 338 339 if ((caps & bit) && (map_hena_rss[i] & rss_hf)) { 340 valid_rss_hf |= map_hena_rss[i]; 341 hena |= bit; 342 } 343 } 344 345 ret = iavf_set_hena(adapter, hena); 346 if (ret) 347 return ret; 348 349 if (valid_rss_hf & ipv4_rss) 350 valid_rss_hf |= rss_hf & ETH_RSS_IPV4; 351 352 if (valid_rss_hf & ipv6_rss) 353 valid_rss_hf |= rss_hf & ETH_RSS_IPV6; 354 355 if (rss_hf & ~valid_rss_hf) 356 PMD_DRV_LOG(WARNING, "Unsupported rss_hf 0x%" PRIx64, 357 rss_hf & ~valid_rss_hf); 358 359 vf->rss_hf = valid_rss_hf; 360 return 0; 361 } 362 363 static int 364 iavf_init_rss(struct iavf_adapter *adapter) 365 { 366 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 367 struct rte_eth_rss_conf *rss_conf; 368 uint16_t i, j, nb_q; 369 int ret; 370 371 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 372 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 373 vf->max_rss_qregion); 374 375 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 376 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 377 return -ENOTSUP; 378 } 379 380 /* configure RSS key */ 381 if (!rss_conf->rss_key) { 382 /* Calculate the default hash key */ 383 for (i = 0; i < vf->vf_res->rss_key_size; i++) 384 vf->rss_key[i] = (uint8_t)rte_rand(); 385 } else 386 rte_memcpy(vf->rss_key, rss_conf->rss_key, 387 RTE_MIN(rss_conf->rss_key_len, 388 vf->vf_res->rss_key_size)); 389 390 /* init RSS LUT table */ 391 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 392 if (j >= nb_q) 393 j = 0; 394 vf->rss_lut[i] = j; 395 } 396 /* send virtchnnl ops to configure rss*/ 397 ret = iavf_configure_rss_lut(adapter); 398 if (ret) 399 return ret; 400 ret = iavf_configure_rss_key(adapter); 401 if (ret) 402 return ret; 403 404 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) { 405 /* Set RSS hash configuration based on rss_conf->rss_hf. */ 406 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 407 if (ret) { 408 PMD_DRV_LOG(ERR, "fail to set default RSS"); 409 return ret; 410 } 411 } else { 412 ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf); 413 if (ret != -ENOTSUP) 414 return ret; 415 } 416 417 return 0; 418 } 419 420 static int 421 iavf_queues_req_reset(struct rte_eth_dev *dev, uint16_t num) 422 { 423 struct iavf_adapter *ad = 424 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 425 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 426 int ret; 427 428 ret = iavf_request_queues(ad, num); 429 if (ret) { 430 PMD_DRV_LOG(ERR, "request queues from PF failed"); 431 return ret; 432 } 433 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u", 434 vf->vsi_res->num_queue_pairs, num); 435 436 ret = iavf_dev_reset(dev); 437 if (ret) { 438 PMD_DRV_LOG(ERR, "vf reset failed"); 439 return ret; 440 } 441 442 return 0; 443 } 444 445 static int 446 iavf_dev_vlan_insert_set(struct rte_eth_dev *dev) 447 { 448 struct iavf_adapter *adapter = 449 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 450 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 451 bool enable; 452 453 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2)) 454 return 0; 455 456 enable = !!(dev->data->dev_conf.txmode.offloads & 457 DEV_TX_OFFLOAD_VLAN_INSERT); 458 iavf_config_vlan_insert_v2(adapter, enable); 459 460 return 0; 461 } 462 463 static int 464 iavf_dev_init_vlan(struct rte_eth_dev *dev) 465 { 466 int err; 467 468 err = iavf_dev_vlan_offload_set(dev, 469 ETH_VLAN_STRIP_MASK | 470 ETH_QINQ_STRIP_MASK | 471 ETH_VLAN_FILTER_MASK | 472 ETH_VLAN_EXTEND_MASK); 473 if (err) { 474 PMD_DRV_LOG(ERR, "Failed to update vlan offload"); 475 return err; 476 } 477 478 err = iavf_dev_vlan_insert_set(dev); 479 if (err) 480 PMD_DRV_LOG(ERR, "Failed to update vlan insertion"); 481 482 return err; 483 } 484 485 static int 486 iavf_dev_configure(struct rte_eth_dev *dev) 487 { 488 struct iavf_adapter *ad = 489 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 490 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 491 uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 492 dev->data->nb_tx_queues); 493 int ret; 494 495 ad->rx_bulk_alloc_allowed = true; 496 /* Initialize to TRUE. If any of Rx queues doesn't meet the 497 * vector Rx/Tx preconditions, it will be reset. 498 */ 499 ad->rx_vec_allowed = true; 500 ad->tx_vec_allowed = true; 501 502 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 503 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 504 505 /* Large VF setting */ 506 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_DFLT) { 507 if (!(vf->vf_res->vf_cap_flags & 508 VIRTCHNL_VF_LARGE_NUM_QPAIRS)) { 509 PMD_DRV_LOG(ERR, "large VF is not supported"); 510 return -1; 511 } 512 513 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_LV) { 514 PMD_DRV_LOG(ERR, "queue pairs number cannot be larger than %u", 515 IAVF_MAX_NUM_QUEUES_LV); 516 return -1; 517 } 518 519 ret = iavf_queues_req_reset(dev, num_queue_pairs); 520 if (ret) 521 return ret; 522 523 ret = iavf_get_max_rss_queue_region(ad); 524 if (ret) { 525 PMD_INIT_LOG(ERR, "get max rss queue region failed"); 526 return ret; 527 } 528 529 vf->lv_enabled = true; 530 } else { 531 /* Check if large VF is already enabled. If so, disable and 532 * release redundant queue resource. 533 * Or check if enough queue pairs. If not, request them from PF. 534 */ 535 if (vf->lv_enabled || 536 num_queue_pairs > vf->vsi_res->num_queue_pairs) { 537 ret = iavf_queues_req_reset(dev, num_queue_pairs); 538 if (ret) 539 return ret; 540 541 vf->lv_enabled = false; 542 } 543 /* if large VF is not required, use default rss queue region */ 544 vf->max_rss_qregion = IAVF_MAX_NUM_QUEUES_DFLT; 545 } 546 547 ret = iavf_dev_init_vlan(dev); 548 if (ret) 549 PMD_DRV_LOG(ERR, "configure VLAN failed: %d", ret); 550 551 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 552 if (iavf_init_rss(ad) != 0) { 553 PMD_DRV_LOG(ERR, "configure rss failed"); 554 return -1; 555 } 556 } 557 return 0; 558 } 559 560 static int 561 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 562 { 563 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 564 struct rte_eth_dev_data *dev_data = dev->data; 565 uint16_t buf_size, max_pkt_len, len; 566 567 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 568 569 /* Calculate the maximum packet length allowed */ 570 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 571 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 572 573 /* Check if the jumbo frame and maximum packet length are set 574 * correctly. 575 */ 576 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 577 if (max_pkt_len <= IAVF_ETH_MAX_LEN || 578 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 579 PMD_DRV_LOG(ERR, "maximum packet length must be " 580 "larger than %u and smaller than %u, " 581 "as jumbo frame is enabled", 582 (uint32_t)IAVF_ETH_MAX_LEN, 583 (uint32_t)IAVF_FRAME_SIZE_MAX); 584 return -EINVAL; 585 } 586 } else { 587 if (max_pkt_len < RTE_ETHER_MIN_LEN || 588 max_pkt_len > IAVF_ETH_MAX_LEN) { 589 PMD_DRV_LOG(ERR, "maximum packet length must be " 590 "larger than %u and smaller than %u, " 591 "as jumbo frame is disabled", 592 (uint32_t)RTE_ETHER_MIN_LEN, 593 (uint32_t)IAVF_ETH_MAX_LEN); 594 return -EINVAL; 595 } 596 } 597 598 rxq->max_pkt_len = max_pkt_len; 599 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 600 rxq->max_pkt_len > buf_size) { 601 dev_data->scattered_rx = 1; 602 } 603 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 604 IAVF_WRITE_FLUSH(hw); 605 606 return 0; 607 } 608 609 static int 610 iavf_init_queues(struct rte_eth_dev *dev) 611 { 612 struct iavf_rx_queue **rxq = 613 (struct iavf_rx_queue **)dev->data->rx_queues; 614 int i, ret = IAVF_SUCCESS; 615 616 for (i = 0; i < dev->data->nb_rx_queues; i++) { 617 if (!rxq[i] || !rxq[i]->q_set) 618 continue; 619 ret = iavf_init_rxq(dev, rxq[i]); 620 if (ret != IAVF_SUCCESS) 621 break; 622 } 623 /* set rx/tx function to vector/scatter/single-segment 624 * according to parameters 625 */ 626 iavf_set_rx_function(dev); 627 iavf_set_tx_function(dev); 628 629 return ret; 630 } 631 632 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 633 struct rte_intr_handle *intr_handle) 634 { 635 struct iavf_adapter *adapter = 636 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 637 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 638 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 639 struct iavf_qv_map *qv_map; 640 uint16_t interval, i; 641 int vec; 642 643 if (rte_intr_cap_multiple(intr_handle) && 644 dev->data->dev_conf.intr_conf.rxq) { 645 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 646 return -1; 647 } 648 649 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 650 intr_handle->intr_vec = 651 rte_zmalloc("intr_vec", 652 dev->data->nb_rx_queues * sizeof(int), 0); 653 if (!intr_handle->intr_vec) { 654 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 655 dev->data->nb_rx_queues); 656 return -1; 657 } 658 } 659 660 qv_map = rte_zmalloc("qv_map", 661 dev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0); 662 if (!qv_map) { 663 PMD_DRV_LOG(ERR, "Failed to allocate %d queue-vector map", 664 dev->data->nb_rx_queues); 665 return -1; 666 } 667 668 if (!dev->data->dev_conf.intr_conf.rxq || 669 !rte_intr_dp_is_en(intr_handle)) { 670 /* Rx interrupt disabled, Map interrupt only for writeback */ 671 vf->nb_msix = 1; 672 if (vf->vf_res->vf_cap_flags & 673 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 674 /* If WB_ON_ITR supports, enable it */ 675 vf->msix_base = IAVF_RX_VEC_START; 676 /* Set the ITR for index zero, to 2us to make sure that 677 * we leave time for aggregation to occur, but don't 678 * increase latency dramatically. 679 */ 680 IAVF_WRITE_REG(hw, 681 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 682 (0 << IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) | 683 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK | 684 (2UL << IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT)); 685 /* debug - check for success! the return value 686 * should be 2, offset is 0x2800 687 */ 688 /* IAVF_READ_REG(hw, IAVF_VFINT_ITRN1(0, 0)); */ 689 } else { 690 /* If no WB_ON_ITR offload flags, need to set 691 * interrupt for descriptor write back. 692 */ 693 vf->msix_base = IAVF_MISC_VEC_ID; 694 695 /* set ITR to max */ 696 interval = iavf_calc_itr_interval( 697 IAVF_QUEUE_ITR_INTERVAL_MAX); 698 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 699 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 700 (IAVF_ITR_INDEX_DEFAULT << 701 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 702 (interval << 703 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 704 } 705 IAVF_WRITE_FLUSH(hw); 706 /* map all queues to the same interrupt */ 707 for (i = 0; i < dev->data->nb_rx_queues; i++) { 708 qv_map[i].queue_id = i; 709 qv_map[i].vector_id = vf->msix_base; 710 } 711 vf->qv_map = qv_map; 712 } else { 713 if (!rte_intr_allow_others(intr_handle)) { 714 vf->nb_msix = 1; 715 vf->msix_base = IAVF_MISC_VEC_ID; 716 for (i = 0; i < dev->data->nb_rx_queues; i++) { 717 qv_map[i].queue_id = i; 718 qv_map[i].vector_id = vf->msix_base; 719 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 720 } 721 vf->qv_map = qv_map; 722 PMD_DRV_LOG(DEBUG, 723 "vector %u are mapping to all Rx queues", 724 vf->msix_base); 725 } else { 726 /* If Rx interrupt is reuquired, and we can use 727 * multi interrupts, then the vec is from 1 728 */ 729 vf->nb_msix = RTE_MIN(intr_handle->nb_efd, 730 (uint16_t)(vf->vf_res->max_vectors - 1)); 731 vf->msix_base = IAVF_RX_VEC_START; 732 vec = IAVF_RX_VEC_START; 733 for (i = 0; i < dev->data->nb_rx_queues; i++) { 734 qv_map[i].queue_id = i; 735 qv_map[i].vector_id = vec; 736 intr_handle->intr_vec[i] = vec++; 737 if (vec >= vf->nb_msix + IAVF_RX_VEC_START) 738 vec = IAVF_RX_VEC_START; 739 } 740 vf->qv_map = qv_map; 741 PMD_DRV_LOG(DEBUG, 742 "%u vectors are mapping to %u Rx queues", 743 vf->nb_msix, dev->data->nb_rx_queues); 744 } 745 } 746 747 if (!vf->lv_enabled) { 748 if (iavf_config_irq_map(adapter)) { 749 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 750 return -1; 751 } 752 } else { 753 uint16_t num_qv_maps = dev->data->nb_rx_queues; 754 uint16_t index = 0; 755 756 while (num_qv_maps > IAVF_IRQ_MAP_NUM_PER_BUF) { 757 if (iavf_config_irq_map_lv(adapter, 758 IAVF_IRQ_MAP_NUM_PER_BUF, index)) { 759 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 760 return -1; 761 } 762 num_qv_maps -= IAVF_IRQ_MAP_NUM_PER_BUF; 763 index += IAVF_IRQ_MAP_NUM_PER_BUF; 764 } 765 766 if (iavf_config_irq_map_lv(adapter, num_qv_maps, index)) { 767 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 768 return -1; 769 } 770 } 771 return 0; 772 } 773 774 static int 775 iavf_start_queues(struct rte_eth_dev *dev) 776 { 777 struct iavf_rx_queue *rxq; 778 struct iavf_tx_queue *txq; 779 int i; 780 781 for (i = 0; i < dev->data->nb_tx_queues; i++) { 782 txq = dev->data->tx_queues[i]; 783 if (txq->tx_deferred_start) 784 continue; 785 if (iavf_dev_tx_queue_start(dev, i) != 0) { 786 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 787 return -1; 788 } 789 } 790 791 for (i = 0; i < dev->data->nb_rx_queues; i++) { 792 rxq = dev->data->rx_queues[i]; 793 if (rxq->rx_deferred_start) 794 continue; 795 if (iavf_dev_rx_queue_start(dev, i) != 0) { 796 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 797 return -1; 798 } 799 } 800 801 return 0; 802 } 803 804 static int 805 iavf_dev_start(struct rte_eth_dev *dev) 806 { 807 struct iavf_adapter *adapter = 808 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 809 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 810 struct rte_intr_handle *intr_handle = dev->intr_handle; 811 uint16_t num_queue_pairs; 812 uint16_t index = 0; 813 814 PMD_INIT_FUNC_TRACE(); 815 816 adapter->stopped = 0; 817 818 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 819 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 820 dev->data->nb_tx_queues); 821 num_queue_pairs = vf->num_queue_pairs; 822 823 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) 824 if (iavf_get_qos_cap(adapter)) { 825 PMD_INIT_LOG(ERR, "Failed to get qos capability"); 826 return -1; 827 } 828 829 if (iavf_init_queues(dev) != 0) { 830 PMD_DRV_LOG(ERR, "failed to do Queue init"); 831 return -1; 832 } 833 834 /* If needed, send configure queues msg multiple times to make the 835 * adminq buffer length smaller than the 4K limitation. 836 */ 837 while (num_queue_pairs > IAVF_CFG_Q_NUM_PER_BUF) { 838 if (iavf_configure_queues(adapter, 839 IAVF_CFG_Q_NUM_PER_BUF, index) != 0) { 840 PMD_DRV_LOG(ERR, "configure queues failed"); 841 goto err_queue; 842 } 843 num_queue_pairs -= IAVF_CFG_Q_NUM_PER_BUF; 844 index += IAVF_CFG_Q_NUM_PER_BUF; 845 } 846 847 if (iavf_configure_queues(adapter, num_queue_pairs, index) != 0) { 848 PMD_DRV_LOG(ERR, "configure queues failed"); 849 goto err_queue; 850 } 851 852 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 853 PMD_DRV_LOG(ERR, "configure irq failed"); 854 goto err_queue; 855 } 856 /* re-enable intr again, because efd assign may change */ 857 if (dev->data->dev_conf.intr_conf.rxq != 0) { 858 rte_intr_disable(intr_handle); 859 rte_intr_enable(intr_handle); 860 } 861 862 /* Set all mac addrs */ 863 iavf_add_del_all_mac_addr(adapter, true); 864 865 /* Set all multicast addresses */ 866 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 867 true); 868 869 if (iavf_start_queues(dev) != 0) { 870 PMD_DRV_LOG(ERR, "enable queues failed"); 871 goto err_mac; 872 } 873 874 return 0; 875 876 err_mac: 877 iavf_add_del_all_mac_addr(adapter, false); 878 err_queue: 879 return -1; 880 } 881 882 static int 883 iavf_dev_stop(struct rte_eth_dev *dev) 884 { 885 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 886 struct iavf_adapter *adapter = 887 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 888 struct rte_intr_handle *intr_handle = dev->intr_handle; 889 890 PMD_INIT_FUNC_TRACE(); 891 892 if (adapter->stopped == 1) 893 return 0; 894 895 iavf_stop_queues(dev); 896 897 /* Disable the interrupt for Rx */ 898 rte_intr_efd_disable(intr_handle); 899 /* Rx interrupt vector mapping free */ 900 if (intr_handle->intr_vec) { 901 rte_free(intr_handle->intr_vec); 902 intr_handle->intr_vec = NULL; 903 } 904 905 /* remove all mac addrs */ 906 iavf_add_del_all_mac_addr(adapter, false); 907 908 /* remove all multicast addresses */ 909 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 910 false); 911 912 adapter->stopped = 1; 913 dev->data->dev_started = 0; 914 915 return 0; 916 } 917 918 static int 919 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 920 { 921 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 922 923 dev_info->max_rx_queues = IAVF_MAX_NUM_QUEUES_LV; 924 dev_info->max_tx_queues = IAVF_MAX_NUM_QUEUES_LV; 925 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 926 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 927 dev_info->max_mtu = dev_info->max_rx_pktlen - IAVF_ETH_OVERHEAD; 928 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 929 dev_info->hash_key_size = vf->vf_res->rss_key_size; 930 dev_info->reta_size = vf->vf_res->rss_lut_size; 931 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 932 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 933 dev_info->rx_offload_capa = 934 DEV_RX_OFFLOAD_VLAN_STRIP | 935 DEV_RX_OFFLOAD_QINQ_STRIP | 936 DEV_RX_OFFLOAD_IPV4_CKSUM | 937 DEV_RX_OFFLOAD_UDP_CKSUM | 938 DEV_RX_OFFLOAD_TCP_CKSUM | 939 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 940 DEV_RX_OFFLOAD_SCATTER | 941 DEV_RX_OFFLOAD_JUMBO_FRAME | 942 DEV_RX_OFFLOAD_VLAN_FILTER | 943 DEV_RX_OFFLOAD_RSS_HASH; 944 945 dev_info->tx_offload_capa = 946 DEV_TX_OFFLOAD_VLAN_INSERT | 947 DEV_TX_OFFLOAD_QINQ_INSERT | 948 DEV_TX_OFFLOAD_IPV4_CKSUM | 949 DEV_TX_OFFLOAD_UDP_CKSUM | 950 DEV_TX_OFFLOAD_TCP_CKSUM | 951 DEV_TX_OFFLOAD_SCTP_CKSUM | 952 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 953 DEV_TX_OFFLOAD_TCP_TSO | 954 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 955 DEV_TX_OFFLOAD_GRE_TNL_TSO | 956 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 957 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 958 DEV_TX_OFFLOAD_MULTI_SEGS | 959 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 960 961 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_CRC) 962 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_KEEP_CRC; 963 964 dev_info->default_rxconf = (struct rte_eth_rxconf) { 965 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 966 .rx_drop_en = 0, 967 .offloads = 0, 968 }; 969 970 dev_info->default_txconf = (struct rte_eth_txconf) { 971 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 972 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 973 .offloads = 0, 974 }; 975 976 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 977 .nb_max = IAVF_MAX_RING_DESC, 978 .nb_min = IAVF_MIN_RING_DESC, 979 .nb_align = IAVF_ALIGN_RING_DESC, 980 }; 981 982 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 983 .nb_max = IAVF_MAX_RING_DESC, 984 .nb_min = IAVF_MIN_RING_DESC, 985 .nb_align = IAVF_ALIGN_RING_DESC, 986 }; 987 988 return 0; 989 } 990 991 static const uint32_t * 992 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 993 { 994 static const uint32_t ptypes[] = { 995 RTE_PTYPE_L2_ETHER, 996 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 997 RTE_PTYPE_L4_FRAG, 998 RTE_PTYPE_L4_ICMP, 999 RTE_PTYPE_L4_NONFRAG, 1000 RTE_PTYPE_L4_SCTP, 1001 RTE_PTYPE_L4_TCP, 1002 RTE_PTYPE_L4_UDP, 1003 RTE_PTYPE_UNKNOWN 1004 }; 1005 return ptypes; 1006 } 1007 1008 int 1009 iavf_dev_link_update(struct rte_eth_dev *dev, 1010 __rte_unused int wait_to_complete) 1011 { 1012 struct rte_eth_link new_link; 1013 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1014 1015 memset(&new_link, 0, sizeof(new_link)); 1016 1017 /* Only read status info stored in VF, and the info is updated 1018 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 1019 */ 1020 switch (vf->link_speed) { 1021 case 10: 1022 new_link.link_speed = ETH_SPEED_NUM_10M; 1023 break; 1024 case 100: 1025 new_link.link_speed = ETH_SPEED_NUM_100M; 1026 break; 1027 case 1000: 1028 new_link.link_speed = ETH_SPEED_NUM_1G; 1029 break; 1030 case 10000: 1031 new_link.link_speed = ETH_SPEED_NUM_10G; 1032 break; 1033 case 20000: 1034 new_link.link_speed = ETH_SPEED_NUM_20G; 1035 break; 1036 case 25000: 1037 new_link.link_speed = ETH_SPEED_NUM_25G; 1038 break; 1039 case 40000: 1040 new_link.link_speed = ETH_SPEED_NUM_40G; 1041 break; 1042 case 50000: 1043 new_link.link_speed = ETH_SPEED_NUM_50G; 1044 break; 1045 case 100000: 1046 new_link.link_speed = ETH_SPEED_NUM_100G; 1047 break; 1048 default: 1049 new_link.link_speed = ETH_SPEED_NUM_NONE; 1050 break; 1051 } 1052 1053 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 1054 new_link.link_status = vf->link_up ? ETH_LINK_UP : 1055 ETH_LINK_DOWN; 1056 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 1057 ETH_LINK_SPEED_FIXED); 1058 1059 return rte_eth_linkstatus_set(dev, &new_link); 1060 } 1061 1062 static int 1063 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 1064 { 1065 struct iavf_adapter *adapter = 1066 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1067 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1068 1069 return iavf_config_promisc(adapter, 1070 true, vf->promisc_multicast_enabled); 1071 } 1072 1073 static int 1074 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 1075 { 1076 struct iavf_adapter *adapter = 1077 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1078 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1079 1080 return iavf_config_promisc(adapter, 1081 false, vf->promisc_multicast_enabled); 1082 } 1083 1084 static int 1085 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 1086 { 1087 struct iavf_adapter *adapter = 1088 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1089 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1090 1091 return iavf_config_promisc(adapter, 1092 vf->promisc_unicast_enabled, true); 1093 } 1094 1095 static int 1096 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 1097 { 1098 struct iavf_adapter *adapter = 1099 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1100 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1101 1102 return iavf_config_promisc(adapter, 1103 vf->promisc_unicast_enabled, false); 1104 } 1105 1106 static int 1107 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 1108 __rte_unused uint32_t index, 1109 __rte_unused uint32_t pool) 1110 { 1111 struct iavf_adapter *adapter = 1112 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1113 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1114 int err; 1115 1116 if (rte_is_zero_ether_addr(addr)) { 1117 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 1118 return -EINVAL; 1119 } 1120 1121 err = iavf_add_del_eth_addr(adapter, addr, true, VIRTCHNL_ETHER_ADDR_EXTRA); 1122 if (err) { 1123 PMD_DRV_LOG(ERR, "fail to add MAC address"); 1124 return -EIO; 1125 } 1126 1127 vf->mac_num++; 1128 1129 return 0; 1130 } 1131 1132 static void 1133 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 1134 { 1135 struct iavf_adapter *adapter = 1136 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1137 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1138 struct rte_ether_addr *addr; 1139 int err; 1140 1141 addr = &dev->data->mac_addrs[index]; 1142 1143 err = iavf_add_del_eth_addr(adapter, addr, false, VIRTCHNL_ETHER_ADDR_EXTRA); 1144 if (err) 1145 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 1146 1147 vf->mac_num--; 1148 } 1149 1150 static int 1151 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 1152 { 1153 struct iavf_adapter *adapter = 1154 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1155 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1156 int err; 1157 1158 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 1159 err = iavf_add_del_vlan_v2(adapter, vlan_id, on); 1160 if (err) 1161 return -EIO; 1162 return 0; 1163 } 1164 1165 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1166 return -ENOTSUP; 1167 1168 err = iavf_add_del_vlan(adapter, vlan_id, on); 1169 if (err) 1170 return -EIO; 1171 return 0; 1172 } 1173 1174 static void 1175 iavf_iterate_vlan_filters_v2(struct rte_eth_dev *dev, bool enable) 1176 { 1177 struct rte_vlan_filter_conf *vfc = &dev->data->vlan_filter_conf; 1178 struct iavf_adapter *adapter = 1179 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1180 uint32_t i, j; 1181 uint64_t ids; 1182 1183 for (i = 0; i < RTE_DIM(vfc->ids); i++) { 1184 if (vfc->ids[i] == 0) 1185 continue; 1186 1187 ids = vfc->ids[i]; 1188 for (j = 0; ids != 0 && j < 64; j++, ids >>= 1) { 1189 if (ids & 1) 1190 iavf_add_del_vlan_v2(adapter, 1191 64 * i + j, enable); 1192 } 1193 } 1194 } 1195 1196 static int 1197 iavf_dev_vlan_offload_set_v2(struct rte_eth_dev *dev, int mask) 1198 { 1199 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1200 struct iavf_adapter *adapter = 1201 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1202 bool enable; 1203 int err; 1204 1205 if (mask & ETH_VLAN_FILTER_MASK) { 1206 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER); 1207 1208 iavf_iterate_vlan_filters_v2(dev, enable); 1209 } 1210 1211 if (mask & ETH_VLAN_STRIP_MASK) { 1212 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 1213 1214 err = iavf_config_vlan_strip_v2(adapter, enable); 1215 /* If not support, the stripping is already disabled by PF */ 1216 if (err == -ENOTSUP && !enable) 1217 err = 0; 1218 if (err) 1219 return -EIO; 1220 } 1221 1222 return 0; 1223 } 1224 1225 static int 1226 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 1227 { 1228 struct iavf_adapter *adapter = 1229 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1230 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1231 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 1232 int err; 1233 1234 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) 1235 return iavf_dev_vlan_offload_set_v2(dev, mask); 1236 1237 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1238 return -ENOTSUP; 1239 1240 /* Vlan stripping setting */ 1241 if (mask & ETH_VLAN_STRIP_MASK) { 1242 /* Enable or disable VLAN stripping */ 1243 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 1244 err = iavf_enable_vlan_strip(adapter); 1245 else 1246 err = iavf_disable_vlan_strip(adapter); 1247 1248 if (err) 1249 return -EIO; 1250 } 1251 return 0; 1252 } 1253 1254 static int 1255 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 1256 struct rte_eth_rss_reta_entry64 *reta_conf, 1257 uint16_t reta_size) 1258 { 1259 struct iavf_adapter *adapter = 1260 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1261 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1262 uint8_t *lut; 1263 uint16_t i, idx, shift; 1264 int ret; 1265 1266 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1267 return -ENOTSUP; 1268 1269 if (reta_size != vf->vf_res->rss_lut_size) { 1270 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1271 "(%d) doesn't match the number of hardware can " 1272 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1273 return -EINVAL; 1274 } 1275 1276 lut = rte_zmalloc("rss_lut", reta_size, 0); 1277 if (!lut) { 1278 PMD_DRV_LOG(ERR, "No memory can be allocated"); 1279 return -ENOMEM; 1280 } 1281 /* store the old lut table temporarily */ 1282 rte_memcpy(lut, vf->rss_lut, reta_size); 1283 1284 for (i = 0; i < reta_size; i++) { 1285 idx = i / RTE_RETA_GROUP_SIZE; 1286 shift = i % RTE_RETA_GROUP_SIZE; 1287 if (reta_conf[idx].mask & (1ULL << shift)) 1288 lut[i] = reta_conf[idx].reta[shift]; 1289 } 1290 1291 rte_memcpy(vf->rss_lut, lut, reta_size); 1292 /* send virtchnnl ops to configure rss*/ 1293 ret = iavf_configure_rss_lut(adapter); 1294 if (ret) /* revert back */ 1295 rte_memcpy(vf->rss_lut, lut, reta_size); 1296 rte_free(lut); 1297 1298 return ret; 1299 } 1300 1301 static int 1302 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 1303 struct rte_eth_rss_reta_entry64 *reta_conf, 1304 uint16_t reta_size) 1305 { 1306 struct iavf_adapter *adapter = 1307 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1308 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1309 uint16_t i, idx, shift; 1310 1311 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1312 return -ENOTSUP; 1313 1314 if (reta_size != vf->vf_res->rss_lut_size) { 1315 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1316 "(%d) doesn't match the number of hardware can " 1317 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1318 return -EINVAL; 1319 } 1320 1321 for (i = 0; i < reta_size; i++) { 1322 idx = i / RTE_RETA_GROUP_SIZE; 1323 shift = i % RTE_RETA_GROUP_SIZE; 1324 if (reta_conf[idx].mask & (1ULL << shift)) 1325 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 1326 } 1327 1328 return 0; 1329 } 1330 1331 static int 1332 iavf_set_rss_key(struct iavf_adapter *adapter, uint8_t *key, uint8_t key_len) 1333 { 1334 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1335 1336 /* HENA setting, it is enabled by default, no change */ 1337 if (!key || key_len == 0) { 1338 PMD_DRV_LOG(DEBUG, "No key to be configured"); 1339 return 0; 1340 } else if (key_len != vf->vf_res->rss_key_size) { 1341 PMD_DRV_LOG(ERR, "The size of hash key configured " 1342 "(%d) doesn't match the size of hardware can " 1343 "support (%d)", key_len, 1344 vf->vf_res->rss_key_size); 1345 return -EINVAL; 1346 } 1347 1348 rte_memcpy(vf->rss_key, key, key_len); 1349 1350 return iavf_configure_rss_key(adapter); 1351 } 1352 1353 static int 1354 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 1355 struct rte_eth_rss_conf *rss_conf) 1356 { 1357 struct iavf_adapter *adapter = 1358 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1359 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1360 int ret; 1361 1362 adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf = *rss_conf; 1363 1364 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1365 return -ENOTSUP; 1366 1367 /* Set hash key. */ 1368 ret = iavf_set_rss_key(adapter, rss_conf->rss_key, 1369 rss_conf->rss_key_len); 1370 if (ret) 1371 return ret; 1372 1373 if (rss_conf->rss_hf == 0) { 1374 vf->rss_hf = 0; 1375 ret = iavf_set_hena(adapter, 0); 1376 1377 /* It is a workaround, temporarily allow error to be returned 1378 * due to possible lack of PF handling for hena = 0. 1379 */ 1380 if (ret) 1381 PMD_DRV_LOG(WARNING, "fail to clean existing RSS, lack PF support"); 1382 return 0; 1383 } 1384 1385 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) { 1386 /* Clear existing RSS. */ 1387 ret = iavf_set_hena(adapter, 0); 1388 1389 /* It is a workaround, temporarily allow error to be returned 1390 * due to possible lack of PF handling for hena = 0. 1391 */ 1392 if (ret) 1393 PMD_DRV_LOG(WARNING, "fail to clean existing RSS," 1394 "lack PF support"); 1395 1396 /* Set new RSS configuration. */ 1397 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 1398 if (ret) { 1399 PMD_DRV_LOG(ERR, "fail to set new RSS"); 1400 return ret; 1401 } 1402 } else { 1403 ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf); 1404 if (ret != -ENOTSUP) 1405 return ret; 1406 } 1407 1408 return 0; 1409 } 1410 1411 static int 1412 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1413 struct rte_eth_rss_conf *rss_conf) 1414 { 1415 struct iavf_adapter *adapter = 1416 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1417 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1418 1419 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1420 return -ENOTSUP; 1421 1422 rss_conf->rss_hf = vf->rss_hf; 1423 1424 if (!rss_conf->rss_key) 1425 return 0; 1426 1427 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 1428 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 1429 1430 return 0; 1431 } 1432 1433 static int 1434 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1435 { 1436 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 1437 int ret = 0; 1438 1439 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 1440 return -EINVAL; 1441 1442 /* mtu setting is forbidden if port is start */ 1443 if (dev->data->dev_started) { 1444 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 1445 return -EBUSY; 1446 } 1447 1448 if (frame_size > IAVF_ETH_MAX_LEN) 1449 dev->data->dev_conf.rxmode.offloads |= 1450 DEV_RX_OFFLOAD_JUMBO_FRAME; 1451 else 1452 dev->data->dev_conf.rxmode.offloads &= 1453 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1454 1455 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1456 1457 return ret; 1458 } 1459 1460 static int 1461 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 1462 struct rte_ether_addr *mac_addr) 1463 { 1464 struct iavf_adapter *adapter = 1465 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1466 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1467 struct rte_ether_addr *old_addr; 1468 int ret; 1469 1470 old_addr = (struct rte_ether_addr *)hw->mac.addr; 1471 1472 if (rte_is_same_ether_addr(old_addr, mac_addr)) 1473 return 0; 1474 1475 ret = iavf_add_del_eth_addr(adapter, old_addr, false, VIRTCHNL_ETHER_ADDR_PRIMARY); 1476 if (ret) 1477 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 1478 " %02X:%02X:%02X:%02X:%02X:%02X", 1479 old_addr->addr_bytes[0], 1480 old_addr->addr_bytes[1], 1481 old_addr->addr_bytes[2], 1482 old_addr->addr_bytes[3], 1483 old_addr->addr_bytes[4], 1484 old_addr->addr_bytes[5]); 1485 1486 ret = iavf_add_del_eth_addr(adapter, mac_addr, true, VIRTCHNL_ETHER_ADDR_PRIMARY); 1487 if (ret) 1488 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 1489 " %02X:%02X:%02X:%02X:%02X:%02X", 1490 mac_addr->addr_bytes[0], 1491 mac_addr->addr_bytes[1], 1492 mac_addr->addr_bytes[2], 1493 mac_addr->addr_bytes[3], 1494 mac_addr->addr_bytes[4], 1495 mac_addr->addr_bytes[5]); 1496 1497 if (ret) 1498 return -EIO; 1499 1500 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1501 return 0; 1502 } 1503 1504 static void 1505 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1506 { 1507 if (*stat >= *offset) 1508 *stat = *stat - *offset; 1509 else 1510 *stat = (uint64_t)((*stat + 1511 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1512 1513 *stat &= IAVF_48_BIT_MASK; 1514 } 1515 1516 static void 1517 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1518 { 1519 if (*stat >= *offset) 1520 *stat = (uint64_t)(*stat - *offset); 1521 else 1522 *stat = (uint64_t)((*stat + 1523 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1524 } 1525 1526 static void 1527 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1528 { 1529 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1530 1531 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1532 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1533 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1534 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1535 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1536 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1537 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1538 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1539 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1540 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1541 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1542 } 1543 1544 static int 1545 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1546 { 1547 struct iavf_adapter *adapter = 1548 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1549 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1550 struct iavf_vsi *vsi = &vf->vsi; 1551 struct virtchnl_eth_stats *pstats = NULL; 1552 int ret; 1553 1554 ret = iavf_query_stats(adapter, &pstats); 1555 if (ret == 0) { 1556 uint8_t crc_stats_len = (dev->data->dev_conf.rxmode.offloads & 1557 DEV_RX_OFFLOAD_KEEP_CRC) ? 0 : 1558 RTE_ETHER_CRC_LEN; 1559 iavf_update_stats(vsi, pstats); 1560 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1561 pstats->rx_broadcast - pstats->rx_discards; 1562 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1563 pstats->tx_unicast; 1564 stats->imissed = pstats->rx_discards; 1565 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1566 stats->ibytes = pstats->rx_bytes; 1567 stats->ibytes -= stats->ipackets * crc_stats_len; 1568 stats->obytes = pstats->tx_bytes; 1569 } else { 1570 PMD_DRV_LOG(ERR, "Get statistics failed"); 1571 } 1572 return ret; 1573 } 1574 1575 static int 1576 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1577 { 1578 int ret; 1579 struct iavf_adapter *adapter = 1580 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1581 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1582 struct iavf_vsi *vsi = &vf->vsi; 1583 struct virtchnl_eth_stats *pstats = NULL; 1584 1585 /* read stat values to clear hardware registers */ 1586 ret = iavf_query_stats(adapter, &pstats); 1587 if (ret != 0) 1588 return ret; 1589 1590 /* set stats offset base on current values */ 1591 vsi->eth_stats_offset = *pstats; 1592 1593 return 0; 1594 } 1595 1596 static int iavf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1597 struct rte_eth_xstat_name *xstats_names, 1598 __rte_unused unsigned int limit) 1599 { 1600 unsigned int i; 1601 1602 if (xstats_names != NULL) 1603 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1604 snprintf(xstats_names[i].name, 1605 sizeof(xstats_names[i].name), 1606 "%s", rte_iavf_stats_strings[i].name); 1607 } 1608 return IAVF_NB_XSTATS; 1609 } 1610 1611 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 1612 struct rte_eth_xstat *xstats, unsigned int n) 1613 { 1614 int ret; 1615 unsigned int i; 1616 struct iavf_adapter *adapter = 1617 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1618 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1619 struct iavf_vsi *vsi = &vf->vsi; 1620 struct virtchnl_eth_stats *pstats = NULL; 1621 1622 if (n < IAVF_NB_XSTATS) 1623 return IAVF_NB_XSTATS; 1624 1625 ret = iavf_query_stats(adapter, &pstats); 1626 if (ret != 0) 1627 return 0; 1628 1629 if (!xstats) 1630 return 0; 1631 1632 iavf_update_stats(vsi, pstats); 1633 1634 /* loop over xstats array and values from pstats */ 1635 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1636 xstats[i].id = i; 1637 xstats[i].value = *(uint64_t *)(((char *)pstats) + 1638 rte_iavf_stats_strings[i].offset); 1639 } 1640 1641 return IAVF_NB_XSTATS; 1642 } 1643 1644 1645 static int 1646 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1647 { 1648 struct iavf_adapter *adapter = 1649 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1650 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1651 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1652 uint16_t msix_intr; 1653 1654 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1655 if (msix_intr == IAVF_MISC_VEC_ID) { 1656 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1657 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1658 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1659 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1660 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1661 } else { 1662 IAVF_WRITE_REG(hw, 1663 IAVF_VFINT_DYN_CTLN1 1664 (msix_intr - IAVF_RX_VEC_START), 1665 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1666 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1667 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1668 } 1669 1670 IAVF_WRITE_FLUSH(hw); 1671 1672 rte_intr_ack(&pci_dev->intr_handle); 1673 1674 return 0; 1675 } 1676 1677 static int 1678 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1679 { 1680 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1681 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1682 uint16_t msix_intr; 1683 1684 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1685 if (msix_intr == IAVF_MISC_VEC_ID) { 1686 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1687 return -EIO; 1688 } 1689 1690 IAVF_WRITE_REG(hw, 1691 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1692 0); 1693 1694 IAVF_WRITE_FLUSH(hw); 1695 return 0; 1696 } 1697 1698 static int 1699 iavf_check_vf_reset_done(struct iavf_hw *hw) 1700 { 1701 int i, reset; 1702 1703 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1704 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1705 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1706 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1707 if (reset == VIRTCHNL_VFR_VFACTIVE || 1708 reset == VIRTCHNL_VFR_COMPLETED) 1709 break; 1710 rte_delay_ms(20); 1711 } 1712 1713 if (i >= IAVF_RESET_WAIT_CNT) 1714 return -1; 1715 1716 return 0; 1717 } 1718 1719 static int 1720 iavf_lookup_proto_xtr_type(const char *flex_name) 1721 { 1722 static struct { 1723 const char *name; 1724 enum iavf_proto_xtr_type type; 1725 } xtr_type_map[] = { 1726 { "vlan", IAVF_PROTO_XTR_VLAN }, 1727 { "ipv4", IAVF_PROTO_XTR_IPV4 }, 1728 { "ipv6", IAVF_PROTO_XTR_IPV6 }, 1729 { "ipv6_flow", IAVF_PROTO_XTR_IPV6_FLOW }, 1730 { "tcp", IAVF_PROTO_XTR_TCP }, 1731 { "ip_offset", IAVF_PROTO_XTR_IP_OFFSET }, 1732 }; 1733 uint32_t i; 1734 1735 for (i = 0; i < RTE_DIM(xtr_type_map); i++) { 1736 if (strcmp(flex_name, xtr_type_map[i].name) == 0) 1737 return xtr_type_map[i].type; 1738 } 1739 1740 PMD_DRV_LOG(ERR, "wrong proto_xtr type, " 1741 "it should be: vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset"); 1742 1743 return -1; 1744 } 1745 1746 /** 1747 * Parse elem, the elem could be single number/range or '(' ')' group 1748 * 1) A single number elem, it's just a simple digit. e.g. 9 1749 * 2) A single range elem, two digits with a '-' between. e.g. 2-6 1750 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6) 1751 * Within group elem, '-' used for a range separator; 1752 * ',' used for a single number. 1753 */ 1754 static int 1755 iavf_parse_queue_set(const char *input, int xtr_type, 1756 struct iavf_devargs *devargs) 1757 { 1758 const char *str = input; 1759 char *end = NULL; 1760 uint32_t min, max; 1761 uint32_t idx; 1762 1763 while (isblank(*str)) 1764 str++; 1765 1766 if (!isdigit(*str) && *str != '(') 1767 return -1; 1768 1769 /* process single number or single range of number */ 1770 if (*str != '(') { 1771 errno = 0; 1772 idx = strtoul(str, &end, 10); 1773 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1774 return -1; 1775 1776 while (isblank(*end)) 1777 end++; 1778 1779 min = idx; 1780 max = idx; 1781 1782 /* process single <number>-<number> */ 1783 if (*end == '-') { 1784 end++; 1785 while (isblank(*end)) 1786 end++; 1787 if (!isdigit(*end)) 1788 return -1; 1789 1790 errno = 0; 1791 idx = strtoul(end, &end, 10); 1792 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1793 return -1; 1794 1795 max = idx; 1796 while (isblank(*end)) 1797 end++; 1798 } 1799 1800 if (*end != ':') 1801 return -1; 1802 1803 for (idx = RTE_MIN(min, max); 1804 idx <= RTE_MAX(min, max); idx++) 1805 devargs->proto_xtr[idx] = xtr_type; 1806 1807 return 0; 1808 } 1809 1810 /* process set within bracket */ 1811 str++; 1812 while (isblank(*str)) 1813 str++; 1814 if (*str == '\0') 1815 return -1; 1816 1817 min = IAVF_MAX_QUEUE_NUM; 1818 do { 1819 /* go ahead to the first digit */ 1820 while (isblank(*str)) 1821 str++; 1822 if (!isdigit(*str)) 1823 return -1; 1824 1825 /* get the digit value */ 1826 errno = 0; 1827 idx = strtoul(str, &end, 10); 1828 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1829 return -1; 1830 1831 /* go ahead to separator '-',',' and ')' */ 1832 while (isblank(*end)) 1833 end++; 1834 if (*end == '-') { 1835 if (min == IAVF_MAX_QUEUE_NUM) 1836 min = idx; 1837 else /* avoid continuous '-' */ 1838 return -1; 1839 } else if (*end == ',' || *end == ')') { 1840 max = idx; 1841 if (min == IAVF_MAX_QUEUE_NUM) 1842 min = idx; 1843 1844 for (idx = RTE_MIN(min, max); 1845 idx <= RTE_MAX(min, max); idx++) 1846 devargs->proto_xtr[idx] = xtr_type; 1847 1848 min = IAVF_MAX_QUEUE_NUM; 1849 } else { 1850 return -1; 1851 } 1852 1853 str = end + 1; 1854 } while (*end != ')' && *end != '\0'); 1855 1856 return 0; 1857 } 1858 1859 static int 1860 iavf_parse_queue_proto_xtr(const char *queues, struct iavf_devargs *devargs) 1861 { 1862 const char *queue_start; 1863 uint32_t idx; 1864 int xtr_type; 1865 char flex_name[32]; 1866 1867 while (isblank(*queues)) 1868 queues++; 1869 1870 if (*queues != '[') { 1871 xtr_type = iavf_lookup_proto_xtr_type(queues); 1872 if (xtr_type < 0) 1873 return -1; 1874 1875 devargs->proto_xtr_dflt = xtr_type; 1876 1877 return 0; 1878 } 1879 1880 queues++; 1881 do { 1882 while (isblank(*queues)) 1883 queues++; 1884 if (*queues == '\0') 1885 return -1; 1886 1887 queue_start = queues; 1888 1889 /* go across a complete bracket */ 1890 if (*queue_start == '(') { 1891 queues += strcspn(queues, ")"); 1892 if (*queues != ')') 1893 return -1; 1894 } 1895 1896 /* scan the separator ':' */ 1897 queues += strcspn(queues, ":"); 1898 if (*queues++ != ':') 1899 return -1; 1900 while (isblank(*queues)) 1901 queues++; 1902 1903 for (idx = 0; ; idx++) { 1904 if (isblank(queues[idx]) || 1905 queues[idx] == ',' || 1906 queues[idx] == ']' || 1907 queues[idx] == '\0') 1908 break; 1909 1910 if (idx > sizeof(flex_name) - 2) 1911 return -1; 1912 1913 flex_name[idx] = queues[idx]; 1914 } 1915 flex_name[idx] = '\0'; 1916 xtr_type = iavf_lookup_proto_xtr_type(flex_name); 1917 if (xtr_type < 0) 1918 return -1; 1919 1920 queues += idx; 1921 1922 while (isblank(*queues) || *queues == ',' || *queues == ']') 1923 queues++; 1924 1925 if (iavf_parse_queue_set(queue_start, xtr_type, devargs) < 0) 1926 return -1; 1927 } while (*queues != '\0'); 1928 1929 return 0; 1930 } 1931 1932 static int 1933 iavf_handle_proto_xtr_arg(__rte_unused const char *key, const char *value, 1934 void *extra_args) 1935 { 1936 struct iavf_devargs *devargs = extra_args; 1937 1938 if (!value || !extra_args) 1939 return -EINVAL; 1940 1941 if (iavf_parse_queue_proto_xtr(value, devargs) < 0) { 1942 PMD_DRV_LOG(ERR, "the proto_xtr's parameter is wrong : '%s'", 1943 value); 1944 return -1; 1945 } 1946 1947 return 0; 1948 } 1949 1950 static int iavf_parse_devargs(struct rte_eth_dev *dev) 1951 { 1952 struct iavf_adapter *ad = 1953 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1954 struct rte_devargs *devargs = dev->device->devargs; 1955 struct rte_kvargs *kvlist; 1956 int ret; 1957 1958 if (!devargs) 1959 return 0; 1960 1961 kvlist = rte_kvargs_parse(devargs->args, iavf_valid_args); 1962 if (!kvlist) { 1963 PMD_INIT_LOG(ERR, "invalid kvargs key\n"); 1964 return -EINVAL; 1965 } 1966 1967 ad->devargs.proto_xtr_dflt = IAVF_PROTO_XTR_NONE; 1968 memset(ad->devargs.proto_xtr, IAVF_PROTO_XTR_NONE, 1969 sizeof(ad->devargs.proto_xtr)); 1970 1971 ret = rte_kvargs_process(kvlist, IAVF_PROTO_XTR_ARG, 1972 &iavf_handle_proto_xtr_arg, &ad->devargs); 1973 if (ret) 1974 goto bail; 1975 1976 bail: 1977 rte_kvargs_free(kvlist); 1978 return ret; 1979 } 1980 1981 static void 1982 iavf_init_proto_xtr(struct rte_eth_dev *dev) 1983 { 1984 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1985 struct iavf_adapter *ad = 1986 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1987 const struct iavf_proto_xtr_ol *xtr_ol; 1988 bool proto_xtr_enable = false; 1989 int offset; 1990 uint16_t i; 1991 1992 vf->proto_xtr = rte_zmalloc("vf proto xtr", 1993 vf->vsi_res->num_queue_pairs, 0); 1994 if (unlikely(!(vf->proto_xtr))) { 1995 PMD_DRV_LOG(ERR, "no memory for setting up proto_xtr's table"); 1996 return; 1997 } 1998 1999 for (i = 0; i < vf->vsi_res->num_queue_pairs; i++) { 2000 vf->proto_xtr[i] = ad->devargs.proto_xtr[i] != 2001 IAVF_PROTO_XTR_NONE ? 2002 ad->devargs.proto_xtr[i] : 2003 ad->devargs.proto_xtr_dflt; 2004 2005 if (vf->proto_xtr[i] != IAVF_PROTO_XTR_NONE) { 2006 uint8_t type = vf->proto_xtr[i]; 2007 2008 iavf_proto_xtr_params[type].required = true; 2009 proto_xtr_enable = true; 2010 } 2011 } 2012 2013 if (likely(!proto_xtr_enable)) 2014 return; 2015 2016 offset = rte_mbuf_dynfield_register(&iavf_proto_xtr_metadata_param); 2017 if (unlikely(offset == -1)) { 2018 PMD_DRV_LOG(ERR, 2019 "failed to extract protocol metadata, error %d", 2020 -rte_errno); 2021 return; 2022 } 2023 2024 PMD_DRV_LOG(DEBUG, 2025 "proto_xtr metadata offset in mbuf is : %d", 2026 offset); 2027 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = offset; 2028 2029 for (i = 0; i < RTE_DIM(iavf_proto_xtr_params); i++) { 2030 xtr_ol = &iavf_proto_xtr_params[i]; 2031 2032 uint8_t rxdid = iavf_proto_xtr_type_to_rxdid((uint8_t)i); 2033 2034 if (!xtr_ol->required) 2035 continue; 2036 2037 if (!(vf->supported_rxdid & BIT(rxdid))) { 2038 PMD_DRV_LOG(ERR, 2039 "rxdid[%u] is not supported in hardware", 2040 rxdid); 2041 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 2042 break; 2043 } 2044 2045 offset = rte_mbuf_dynflag_register(&xtr_ol->param); 2046 if (unlikely(offset == -1)) { 2047 PMD_DRV_LOG(ERR, 2048 "failed to register proto_xtr offload '%s', error %d", 2049 xtr_ol->param.name, -rte_errno); 2050 2051 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 2052 break; 2053 } 2054 2055 PMD_DRV_LOG(DEBUG, 2056 "proto_xtr offload '%s' offset in mbuf is : %d", 2057 xtr_ol->param.name, offset); 2058 *xtr_ol->ol_flag = 1ULL << offset; 2059 } 2060 } 2061 2062 static int 2063 iavf_init_vf(struct rte_eth_dev *dev) 2064 { 2065 int err, bufsz; 2066 struct iavf_adapter *adapter = 2067 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2068 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2069 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2070 2071 err = iavf_parse_devargs(dev); 2072 if (err) { 2073 PMD_INIT_LOG(ERR, "Failed to parse devargs"); 2074 goto err; 2075 } 2076 2077 err = iavf_set_mac_type(hw); 2078 if (err) { 2079 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 2080 goto err; 2081 } 2082 2083 err = iavf_check_vf_reset_done(hw); 2084 if (err) { 2085 PMD_INIT_LOG(ERR, "VF is still resetting"); 2086 goto err; 2087 } 2088 2089 iavf_init_adminq_parameter(hw); 2090 err = iavf_init_adminq(hw); 2091 if (err) { 2092 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 2093 goto err; 2094 } 2095 2096 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 2097 if (!vf->aq_resp) { 2098 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 2099 goto err_aq; 2100 } 2101 if (iavf_check_api_version(adapter) != 0) { 2102 PMD_INIT_LOG(ERR, "check_api version failed"); 2103 goto err_api; 2104 } 2105 2106 bufsz = sizeof(struct virtchnl_vf_resource) + 2107 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 2108 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 2109 if (!vf->vf_res) { 2110 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 2111 goto err_api; 2112 } 2113 2114 if (iavf_get_vf_resource(adapter) != 0) { 2115 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 2116 goto err_alloc; 2117 } 2118 /* Allocate memort for RSS info */ 2119 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2120 vf->rss_key = rte_zmalloc("rss_key", 2121 vf->vf_res->rss_key_size, 0); 2122 if (!vf->rss_key) { 2123 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 2124 goto err_rss; 2125 } 2126 vf->rss_lut = rte_zmalloc("rss_lut", 2127 vf->vf_res->rss_lut_size, 0); 2128 if (!vf->rss_lut) { 2129 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 2130 goto err_rss; 2131 } 2132 } 2133 2134 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 2135 if (iavf_get_supported_rxdid(adapter) != 0) { 2136 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 2137 goto err_rss; 2138 } 2139 } 2140 2141 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 2142 if (iavf_get_vlan_offload_caps_v2(adapter) != 0) { 2143 PMD_INIT_LOG(ERR, "failed to do get VLAN offload v2 capabilities"); 2144 goto err_rss; 2145 } 2146 } 2147 2148 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) { 2149 bufsz = sizeof(struct virtchnl_qos_cap_list) + 2150 IAVF_MAX_TRAFFIC_CLASS * 2151 sizeof(struct virtchnl_qos_cap_elem); 2152 vf->qos_cap = rte_zmalloc("qos_cap", bufsz, 0); 2153 if (!vf->qos_cap) { 2154 PMD_INIT_LOG(ERR, "unable to allocate qos_cap memory"); 2155 goto err_rss; 2156 } 2157 iavf_tm_conf_init(dev); 2158 } 2159 2160 iavf_init_proto_xtr(dev); 2161 2162 return 0; 2163 err_rss: 2164 rte_free(vf->rss_key); 2165 rte_free(vf->rss_lut); 2166 err_alloc: 2167 rte_free(vf->qos_cap); 2168 rte_free(vf->vf_res); 2169 vf->vsi_res = NULL; 2170 err_api: 2171 rte_free(vf->aq_resp); 2172 err_aq: 2173 iavf_shutdown_adminq(hw); 2174 err: 2175 return -1; 2176 } 2177 2178 /* Enable default admin queue interrupt setting */ 2179 static inline void 2180 iavf_enable_irq0(struct iavf_hw *hw) 2181 { 2182 /* Enable admin queue interrupt trigger */ 2183 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 2184 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 2185 2186 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2187 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 2188 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 2189 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2190 2191 IAVF_WRITE_FLUSH(hw); 2192 } 2193 2194 static inline void 2195 iavf_disable_irq0(struct iavf_hw *hw) 2196 { 2197 /* Disable all interrupt types */ 2198 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 2199 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2200 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2201 IAVF_WRITE_FLUSH(hw); 2202 } 2203 2204 static void 2205 iavf_dev_interrupt_handler(void *param) 2206 { 2207 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 2208 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2209 2210 iavf_disable_irq0(hw); 2211 2212 iavf_handle_virtchnl_msg(dev); 2213 2214 iavf_enable_irq0(hw); 2215 } 2216 2217 static int 2218 iavf_dev_flow_ops_get(struct rte_eth_dev *dev, 2219 const struct rte_flow_ops **ops) 2220 { 2221 if (!dev) 2222 return -EINVAL; 2223 2224 *ops = &iavf_flow_ops; 2225 return 0; 2226 } 2227 2228 static void 2229 iavf_default_rss_disable(struct iavf_adapter *adapter) 2230 { 2231 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 2232 int ret = 0; 2233 2234 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2235 /* Set hena = 0 to ask PF to cleanup all existing RSS. */ 2236 ret = iavf_set_hena(adapter, 0); 2237 if (ret) 2238 /* It is a workaround, temporarily allow error to be 2239 * returned due to possible lack of PF handling for 2240 * hena = 0. 2241 */ 2242 PMD_INIT_LOG(WARNING, "fail to disable default RSS," 2243 "lack PF support"); 2244 } 2245 } 2246 2247 static int 2248 iavf_dev_init(struct rte_eth_dev *eth_dev) 2249 { 2250 struct iavf_adapter *adapter = 2251 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2252 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 2253 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 2254 int ret = 0; 2255 2256 PMD_INIT_FUNC_TRACE(); 2257 2258 /* assign ops func pointer */ 2259 eth_dev->dev_ops = &iavf_eth_dev_ops; 2260 eth_dev->rx_queue_count = iavf_dev_rxq_count; 2261 eth_dev->rx_descriptor_status = iavf_dev_rx_desc_status; 2262 eth_dev->tx_descriptor_status = iavf_dev_tx_desc_status; 2263 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 2264 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 2265 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 2266 2267 /* For secondary processes, we don't initialise any further as primary 2268 * has already done this work. Only check if we need a different RX 2269 * and TX function. 2270 */ 2271 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2272 iavf_set_rx_function(eth_dev); 2273 iavf_set_tx_function(eth_dev); 2274 return 0; 2275 } 2276 rte_eth_copy_pci_info(eth_dev, pci_dev); 2277 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2278 2279 hw->vendor_id = pci_dev->id.vendor_id; 2280 hw->device_id = pci_dev->id.device_id; 2281 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 2282 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 2283 hw->bus.bus_id = pci_dev->addr.bus; 2284 hw->bus.device = pci_dev->addr.devid; 2285 hw->bus.func = pci_dev->addr.function; 2286 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 2287 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2288 adapter->eth_dev = eth_dev; 2289 adapter->stopped = 1; 2290 2291 if (iavf_init_vf(eth_dev) != 0) { 2292 PMD_INIT_LOG(ERR, "Init vf failed"); 2293 return -1; 2294 } 2295 2296 /* set default ptype table */ 2297 adapter->ptype_tbl = iavf_get_default_ptype_table(); 2298 2299 /* copy mac addr */ 2300 eth_dev->data->mac_addrs = rte_zmalloc( 2301 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 2302 if (!eth_dev->data->mac_addrs) { 2303 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 2304 " store MAC addresses", 2305 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 2306 return -ENOMEM; 2307 } 2308 /* If the MAC address is not configured by host, 2309 * generate a random one. 2310 */ 2311 if (!rte_is_valid_assigned_ether_addr( 2312 (struct rte_ether_addr *)hw->mac.addr)) 2313 rte_eth_random_addr(hw->mac.addr); 2314 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 2315 ð_dev->data->mac_addrs[0]); 2316 2317 /* register callback func to eal lib */ 2318 rte_intr_callback_register(&pci_dev->intr_handle, 2319 iavf_dev_interrupt_handler, 2320 (void *)eth_dev); 2321 2322 /* enable uio intr after callback register */ 2323 rte_intr_enable(&pci_dev->intr_handle); 2324 2325 /* configure and enable device interrupt */ 2326 iavf_enable_irq0(hw); 2327 2328 ret = iavf_flow_init(adapter); 2329 if (ret) { 2330 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 2331 return ret; 2332 } 2333 2334 iavf_default_rss_disable(adapter); 2335 2336 return 0; 2337 } 2338 2339 static int 2340 iavf_dev_close(struct rte_eth_dev *dev) 2341 { 2342 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2343 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2344 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 2345 struct iavf_adapter *adapter = 2346 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2347 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2348 int ret; 2349 2350 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2351 return 0; 2352 2353 ret = iavf_dev_stop(dev); 2354 2355 iavf_flow_flush(dev, NULL); 2356 iavf_flow_uninit(adapter); 2357 2358 /* 2359 * disable promiscuous mode before reset vf 2360 * it is a workaround solution when work with kernel driver 2361 * and it is not the normal way 2362 */ 2363 if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled) 2364 iavf_config_promisc(adapter, false, false); 2365 2366 iavf_shutdown_adminq(hw); 2367 /* disable uio intr before callback unregister */ 2368 rte_intr_disable(intr_handle); 2369 2370 /* unregister callback func from eal lib */ 2371 rte_intr_callback_unregister(intr_handle, 2372 iavf_dev_interrupt_handler, dev); 2373 iavf_disable_irq0(hw); 2374 2375 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) 2376 iavf_tm_conf_uninit(dev); 2377 2378 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2379 if (vf->rss_lut) { 2380 rte_free(vf->rss_lut); 2381 vf->rss_lut = NULL; 2382 } 2383 if (vf->rss_key) { 2384 rte_free(vf->rss_key); 2385 vf->rss_key = NULL; 2386 } 2387 } 2388 2389 rte_free(vf->vf_res); 2390 vf->vsi_res = NULL; 2391 vf->vf_res = NULL; 2392 2393 rte_free(vf->aq_resp); 2394 vf->aq_resp = NULL; 2395 2396 /* 2397 * If the VF is reset via VFLR, the device will be knocked out of bus 2398 * master mode, and the driver will fail to recover from the reset. Fix 2399 * this by enabling bus mastering after every reset. In a non-VFLR case, 2400 * the bus master bit will not be disabled, and this call will have no 2401 * effect. 2402 */ 2403 if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true)) 2404 vf->vf_reset = false; 2405 2406 return ret; 2407 } 2408 2409 static int 2410 iavf_dev_uninit(struct rte_eth_dev *dev) 2411 { 2412 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2413 return -EPERM; 2414 2415 iavf_dev_close(dev); 2416 2417 return 0; 2418 } 2419 2420 /* 2421 * Reset VF device only to re-initialize resources in PMD layer 2422 */ 2423 static int 2424 iavf_dev_reset(struct rte_eth_dev *dev) 2425 { 2426 int ret; 2427 2428 ret = iavf_dev_uninit(dev); 2429 if (ret) 2430 return ret; 2431 2432 return iavf_dev_init(dev); 2433 } 2434 2435 static int 2436 iavf_dcf_cap_check_handler(__rte_unused const char *key, 2437 const char *value, __rte_unused void *opaque) 2438 { 2439 if (strcmp(value, "dcf")) 2440 return -1; 2441 2442 return 0; 2443 } 2444 2445 static int 2446 iavf_dcf_cap_selected(struct rte_devargs *devargs) 2447 { 2448 struct rte_kvargs *kvlist; 2449 const char *key = "cap"; 2450 int ret = 0; 2451 2452 if (devargs == NULL) 2453 return 0; 2454 2455 kvlist = rte_kvargs_parse(devargs->args, NULL); 2456 if (kvlist == NULL) 2457 return 0; 2458 2459 if (!rte_kvargs_count(kvlist, key)) 2460 goto exit; 2461 2462 /* dcf capability selected when there's a key-value pair: cap=dcf */ 2463 if (rte_kvargs_process(kvlist, key, 2464 iavf_dcf_cap_check_handler, NULL) < 0) 2465 goto exit; 2466 2467 ret = 1; 2468 2469 exit: 2470 rte_kvargs_free(kvlist); 2471 return ret; 2472 } 2473 2474 static int 2475 iavf_drv_i40evf_check_handler(__rte_unused const char *key, 2476 const char *value, __rte_unused void *opaque) 2477 { 2478 if (strcmp(value, "i40evf")) 2479 return -1; 2480 2481 return 0; 2482 } 2483 2484 static int 2485 iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id) 2486 { 2487 struct rte_kvargs *kvlist; 2488 int ret = 0; 2489 2490 if (device_id != IAVF_DEV_ID_VF && 2491 device_id != IAVF_DEV_ID_VF_HV && 2492 device_id != IAVF_DEV_ID_X722_VF && 2493 device_id != IAVF_DEV_ID_X722_A0_VF) 2494 return 0; 2495 2496 if (devargs == NULL) 2497 return 0; 2498 2499 kvlist = rte_kvargs_parse(devargs->args, NULL); 2500 if (kvlist == NULL) 2501 return 0; 2502 2503 if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER)) 2504 goto exit; 2505 2506 /* i40evf driver selected when there's a key-value pair: 2507 * driver=i40evf 2508 */ 2509 if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER, 2510 iavf_drv_i40evf_check_handler, NULL) < 0) 2511 goto exit; 2512 2513 ret = 1; 2514 2515 exit: 2516 rte_kvargs_free(kvlist); 2517 return ret; 2518 } 2519 2520 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2521 struct rte_pci_device *pci_dev) 2522 { 2523 if (iavf_dcf_cap_selected(pci_dev->device.devargs) || 2524 iavf_drv_i40evf_selected(pci_dev->device.devargs, 2525 pci_dev->id.device_id)) 2526 return 1; 2527 2528 return rte_eth_dev_pci_generic_probe(pci_dev, 2529 sizeof(struct iavf_adapter), iavf_dev_init); 2530 } 2531 2532 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 2533 { 2534 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 2535 } 2536 2537 /* Adaptive virtual function driver struct */ 2538 static struct rte_pci_driver rte_iavf_pmd = { 2539 .id_table = pci_id_iavf_map, 2540 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 2541 .probe = eth_iavf_pci_probe, 2542 .remove = eth_iavf_pci_remove, 2543 }; 2544 2545 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 2546 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 2547 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 2548 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf driver=i40evf"); 2549 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_init, init, NOTICE); 2550 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_driver, driver, NOTICE); 2551 #ifdef RTE_ETHDEV_DEBUG_RX 2552 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_rx, rx, DEBUG); 2553 #endif 2554 #ifdef RTE_ETHDEV_DEBUG_TX 2555 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_tx, tx, DEBUG); 2556 #endif 2557