1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 #include "iavf_generic_flow.h" 31 32 static int iavf_dev_configure(struct rte_eth_dev *dev); 33 static int iavf_dev_start(struct rte_eth_dev *dev); 34 static void iavf_dev_stop(struct rte_eth_dev *dev); 35 static void iavf_dev_close(struct rte_eth_dev *dev); 36 static int iavf_dev_reset(struct rte_eth_dev *dev); 37 static int iavf_dev_info_get(struct rte_eth_dev *dev, 38 struct rte_eth_dev_info *dev_info); 39 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 40 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 41 struct rte_eth_stats *stats); 42 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 43 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 44 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 45 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 46 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 47 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 48 struct rte_ether_addr *addr, 49 uint32_t index, 50 uint32_t pool); 51 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 52 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 53 uint16_t vlan_id, int on); 54 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 55 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 56 struct rte_eth_rss_reta_entry64 *reta_conf, 57 uint16_t reta_size); 58 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 59 struct rte_eth_rss_reta_entry64 *reta_conf, 60 uint16_t reta_size); 61 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 62 struct rte_eth_rss_conf *rss_conf); 63 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 64 struct rte_eth_rss_conf *rss_conf); 65 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 66 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 67 struct rte_ether_addr *mac_addr); 68 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 69 uint16_t queue_id); 70 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 71 uint16_t queue_id); 72 static int iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 73 enum rte_filter_type filter_type, 74 enum rte_filter_op filter_op, 75 void *arg); 76 77 78 int iavf_logtype_init; 79 int iavf_logtype_driver; 80 81 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 82 int iavf_logtype_rx; 83 #endif 84 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 85 int iavf_logtype_tx; 86 #endif 87 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 88 int iavf_logtype_tx_free; 89 #endif 90 91 static const struct rte_pci_id pci_id_iavf_map[] = { 92 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 93 { .vendor_id = 0, /* sentinel */ }, 94 }; 95 96 static const struct eth_dev_ops iavf_eth_dev_ops = { 97 .dev_configure = iavf_dev_configure, 98 .dev_start = iavf_dev_start, 99 .dev_stop = iavf_dev_stop, 100 .dev_close = iavf_dev_close, 101 .dev_reset = iavf_dev_reset, 102 .dev_infos_get = iavf_dev_info_get, 103 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 104 .link_update = iavf_dev_link_update, 105 .stats_get = iavf_dev_stats_get, 106 .stats_reset = iavf_dev_stats_reset, 107 .promiscuous_enable = iavf_dev_promiscuous_enable, 108 .promiscuous_disable = iavf_dev_promiscuous_disable, 109 .allmulticast_enable = iavf_dev_allmulticast_enable, 110 .allmulticast_disable = iavf_dev_allmulticast_disable, 111 .mac_addr_add = iavf_dev_add_mac_addr, 112 .mac_addr_remove = iavf_dev_del_mac_addr, 113 .vlan_filter_set = iavf_dev_vlan_filter_set, 114 .vlan_offload_set = iavf_dev_vlan_offload_set, 115 .rx_queue_start = iavf_dev_rx_queue_start, 116 .rx_queue_stop = iavf_dev_rx_queue_stop, 117 .tx_queue_start = iavf_dev_tx_queue_start, 118 .tx_queue_stop = iavf_dev_tx_queue_stop, 119 .rx_queue_setup = iavf_dev_rx_queue_setup, 120 .rx_queue_release = iavf_dev_rx_queue_release, 121 .tx_queue_setup = iavf_dev_tx_queue_setup, 122 .tx_queue_release = iavf_dev_tx_queue_release, 123 .mac_addr_set = iavf_dev_set_default_mac_addr, 124 .reta_update = iavf_dev_rss_reta_update, 125 .reta_query = iavf_dev_rss_reta_query, 126 .rss_hash_update = iavf_dev_rss_hash_update, 127 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 128 .rxq_info_get = iavf_dev_rxq_info_get, 129 .txq_info_get = iavf_dev_txq_info_get, 130 .rx_queue_count = iavf_dev_rxq_count, 131 .rx_descriptor_status = iavf_dev_rx_desc_status, 132 .tx_descriptor_status = iavf_dev_tx_desc_status, 133 .mtu_set = iavf_dev_mtu_set, 134 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 135 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 136 .filter_ctrl = iavf_dev_filter_ctrl, 137 }; 138 139 static int 140 iavf_dev_configure(struct rte_eth_dev *dev) 141 { 142 struct iavf_adapter *ad = 143 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 144 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 145 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 146 147 ad->rx_bulk_alloc_allowed = true; 148 /* Initialize to TRUE. If any of Rx queues doesn't meet the 149 * vector Rx/Tx preconditions, it will be reset. 150 */ 151 ad->rx_vec_allowed = true; 152 ad->tx_vec_allowed = true; 153 154 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 155 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 156 157 /* Vlan stripping setting */ 158 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { 159 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 160 iavf_enable_vlan_strip(ad); 161 else 162 iavf_disable_vlan_strip(ad); 163 } 164 return 0; 165 } 166 167 static int 168 iavf_init_rss(struct iavf_adapter *adapter) 169 { 170 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 171 struct rte_eth_rss_conf *rss_conf; 172 uint8_t i, j, nb_q; 173 int ret; 174 175 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 176 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 177 IAVF_MAX_NUM_QUEUES); 178 179 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 180 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 181 return -ENOTSUP; 182 } 183 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 184 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 185 /* set all lut items to default queue */ 186 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 187 vf->rss_lut[i] = 0; 188 ret = iavf_configure_rss_lut(adapter); 189 return ret; 190 } 191 192 /* In IAVF, RSS enablement is set by PF driver. It is not supported 193 * to set based on rss_conf->rss_hf. 194 */ 195 196 /* configure RSS key */ 197 if (!rss_conf->rss_key) { 198 /* Calculate the default hash key */ 199 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 200 vf->rss_key[i] = (uint8_t)rte_rand(); 201 } else 202 rte_memcpy(vf->rss_key, rss_conf->rss_key, 203 RTE_MIN(rss_conf->rss_key_len, 204 vf->vf_res->rss_key_size)); 205 206 /* init RSS LUT table */ 207 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 208 if (j >= nb_q) 209 j = 0; 210 vf->rss_lut[i] = j; 211 } 212 /* send virtchnnl ops to configure rss*/ 213 ret = iavf_configure_rss_lut(adapter); 214 if (ret) 215 return ret; 216 ret = iavf_configure_rss_key(adapter); 217 if (ret) 218 return ret; 219 220 return 0; 221 } 222 223 static int 224 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 225 { 226 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 227 struct rte_eth_dev_data *dev_data = dev->data; 228 uint16_t buf_size, max_pkt_len, len; 229 230 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 231 232 /* Calculate the maximum packet length allowed */ 233 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 234 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 235 236 /* Check if the jumbo frame and maximum packet length are set 237 * correctly. 238 */ 239 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 240 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 241 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 242 PMD_DRV_LOG(ERR, "maximum packet length must be " 243 "larger than %u and smaller than %u, " 244 "as jumbo frame is enabled", 245 (uint32_t)RTE_ETHER_MAX_LEN, 246 (uint32_t)IAVF_FRAME_SIZE_MAX); 247 return -EINVAL; 248 } 249 } else { 250 if (max_pkt_len < RTE_ETHER_MIN_LEN || 251 max_pkt_len > RTE_ETHER_MAX_LEN) { 252 PMD_DRV_LOG(ERR, "maximum packet length must be " 253 "larger than %u and smaller than %u, " 254 "as jumbo frame is disabled", 255 (uint32_t)RTE_ETHER_MIN_LEN, 256 (uint32_t)RTE_ETHER_MAX_LEN); 257 return -EINVAL; 258 } 259 } 260 261 rxq->max_pkt_len = max_pkt_len; 262 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 263 (rxq->max_pkt_len + 2 * IAVF_VLAN_TAG_SIZE) > buf_size) { 264 dev_data->scattered_rx = 1; 265 } 266 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 267 IAVF_WRITE_FLUSH(hw); 268 269 return 0; 270 } 271 272 static int 273 iavf_init_queues(struct rte_eth_dev *dev) 274 { 275 struct iavf_rx_queue **rxq = 276 (struct iavf_rx_queue **)dev->data->rx_queues; 277 int i, ret = IAVF_SUCCESS; 278 279 for (i = 0; i < dev->data->nb_rx_queues; i++) { 280 if (!rxq[i] || !rxq[i]->q_set) 281 continue; 282 ret = iavf_init_rxq(dev, rxq[i]); 283 if (ret != IAVF_SUCCESS) 284 break; 285 } 286 /* set rx/tx function to vector/scatter/single-segment 287 * according to parameters 288 */ 289 iavf_set_rx_function(dev); 290 iavf_set_tx_function(dev); 291 292 return ret; 293 } 294 295 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 296 struct rte_intr_handle *intr_handle) 297 { 298 struct iavf_adapter *adapter = 299 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 300 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 301 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 302 uint16_t interval, i; 303 int vec; 304 305 if (rte_intr_cap_multiple(intr_handle) && 306 dev->data->dev_conf.intr_conf.rxq) { 307 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 308 return -1; 309 } 310 311 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 312 intr_handle->intr_vec = 313 rte_zmalloc("intr_vec", 314 dev->data->nb_rx_queues * sizeof(int), 0); 315 if (!intr_handle->intr_vec) { 316 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 317 dev->data->nb_rx_queues); 318 return -1; 319 } 320 } 321 322 if (!dev->data->dev_conf.intr_conf.rxq || 323 !rte_intr_dp_is_en(intr_handle)) { 324 /* Rx interrupt disabled, Map interrupt only for writeback */ 325 vf->nb_msix = 1; 326 if (vf->vf_res->vf_cap_flags & 327 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 328 /* If WB_ON_ITR supports, enable it */ 329 vf->msix_base = IAVF_RX_VEC_START; 330 IAVF_WRITE_REG(hw, 331 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 332 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK | 333 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK); 334 } else { 335 /* If no WB_ON_ITR offload flags, need to set 336 * interrupt for descriptor write back. 337 */ 338 vf->msix_base = IAVF_MISC_VEC_ID; 339 340 /* set ITR to max */ 341 interval = iavf_calc_itr_interval( 342 IAVF_QUEUE_ITR_INTERVAL_MAX); 343 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 344 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 345 (IAVF_ITR_INDEX_DEFAULT << 346 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 347 (interval << 348 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 349 } 350 IAVF_WRITE_FLUSH(hw); 351 /* map all queues to the same interrupt */ 352 for (i = 0; i < dev->data->nb_rx_queues; i++) 353 vf->rxq_map[vf->msix_base] |= 1 << i; 354 } else { 355 if (!rte_intr_allow_others(intr_handle)) { 356 vf->nb_msix = 1; 357 vf->msix_base = IAVF_MISC_VEC_ID; 358 for (i = 0; i < dev->data->nb_rx_queues; i++) { 359 vf->rxq_map[vf->msix_base] |= 1 << i; 360 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 361 } 362 PMD_DRV_LOG(DEBUG, 363 "vector %u are mapping to all Rx queues", 364 vf->msix_base); 365 } else { 366 /* If Rx interrupt is reuquired, and we can use 367 * multi interrupts, then the vec is from 1 368 */ 369 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 370 intr_handle->nb_efd); 371 vf->msix_base = IAVF_RX_VEC_START; 372 vec = IAVF_RX_VEC_START; 373 for (i = 0; i < dev->data->nb_rx_queues; i++) { 374 vf->rxq_map[vec] |= 1 << i; 375 intr_handle->intr_vec[i] = vec++; 376 if (vec >= vf->nb_msix) 377 vec = IAVF_RX_VEC_START; 378 } 379 PMD_DRV_LOG(DEBUG, 380 "%u vectors are mapping to %u Rx queues", 381 vf->nb_msix, dev->data->nb_rx_queues); 382 } 383 } 384 385 if (iavf_config_irq_map(adapter)) { 386 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 387 return -1; 388 } 389 return 0; 390 } 391 392 static int 393 iavf_start_queues(struct rte_eth_dev *dev) 394 { 395 struct iavf_rx_queue *rxq; 396 struct iavf_tx_queue *txq; 397 int i; 398 399 for (i = 0; i < dev->data->nb_tx_queues; i++) { 400 txq = dev->data->tx_queues[i]; 401 if (txq->tx_deferred_start) 402 continue; 403 if (iavf_dev_tx_queue_start(dev, i) != 0) { 404 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 405 return -1; 406 } 407 } 408 409 for (i = 0; i < dev->data->nb_rx_queues; i++) { 410 rxq = dev->data->rx_queues[i]; 411 if (rxq->rx_deferred_start) 412 continue; 413 if (iavf_dev_rx_queue_start(dev, i) != 0) { 414 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 415 return -1; 416 } 417 } 418 419 return 0; 420 } 421 422 static int 423 iavf_dev_start(struct rte_eth_dev *dev) 424 { 425 struct iavf_adapter *adapter = 426 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 427 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 428 struct rte_intr_handle *intr_handle = dev->intr_handle; 429 430 PMD_INIT_FUNC_TRACE(); 431 432 adapter->stopped = 0; 433 434 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 435 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 436 dev->data->nb_tx_queues); 437 438 if (iavf_init_queues(dev) != 0) { 439 PMD_DRV_LOG(ERR, "failed to do Queue init"); 440 return -1; 441 } 442 443 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 444 if (iavf_init_rss(adapter) != 0) { 445 PMD_DRV_LOG(ERR, "configure rss failed"); 446 goto err_rss; 447 } 448 } 449 450 if (iavf_configure_queues(adapter) != 0) { 451 PMD_DRV_LOG(ERR, "configure queues failed"); 452 goto err_queue; 453 } 454 455 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 456 PMD_DRV_LOG(ERR, "configure irq failed"); 457 goto err_queue; 458 } 459 /* re-enable intr again, because efd assign may change */ 460 if (dev->data->dev_conf.intr_conf.rxq != 0) { 461 rte_intr_disable(intr_handle); 462 rte_intr_enable(intr_handle); 463 } 464 465 /* Set all mac addrs */ 466 iavf_add_del_all_mac_addr(adapter, true); 467 468 if (iavf_start_queues(dev) != 0) { 469 PMD_DRV_LOG(ERR, "enable queues failed"); 470 goto err_mac; 471 } 472 473 return 0; 474 475 err_mac: 476 iavf_add_del_all_mac_addr(adapter, false); 477 err_queue: 478 err_rss: 479 return -1; 480 } 481 482 static void 483 iavf_dev_stop(struct rte_eth_dev *dev) 484 { 485 struct iavf_adapter *adapter = 486 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 487 struct rte_intr_handle *intr_handle = dev->intr_handle; 488 489 PMD_INIT_FUNC_TRACE(); 490 491 if (adapter->stopped == 1) 492 return; 493 494 iavf_stop_queues(dev); 495 496 /* Disable the interrupt for Rx */ 497 rte_intr_efd_disable(intr_handle); 498 /* Rx interrupt vector mapping free */ 499 if (intr_handle->intr_vec) { 500 rte_free(intr_handle->intr_vec); 501 intr_handle->intr_vec = NULL; 502 } 503 504 /* remove all mac addrs */ 505 iavf_add_del_all_mac_addr(adapter, false); 506 adapter->stopped = 1; 507 } 508 509 static int 510 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 511 { 512 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 513 514 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs; 515 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs; 516 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 517 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 518 dev_info->hash_key_size = vf->vf_res->rss_key_size; 519 dev_info->reta_size = vf->vf_res->rss_lut_size; 520 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 521 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 522 dev_info->rx_offload_capa = 523 DEV_RX_OFFLOAD_VLAN_STRIP | 524 DEV_RX_OFFLOAD_QINQ_STRIP | 525 DEV_RX_OFFLOAD_IPV4_CKSUM | 526 DEV_RX_OFFLOAD_UDP_CKSUM | 527 DEV_RX_OFFLOAD_TCP_CKSUM | 528 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 529 DEV_RX_OFFLOAD_SCATTER | 530 DEV_RX_OFFLOAD_JUMBO_FRAME | 531 DEV_RX_OFFLOAD_VLAN_FILTER | 532 DEV_RX_OFFLOAD_RSS_HASH; 533 dev_info->tx_offload_capa = 534 DEV_TX_OFFLOAD_VLAN_INSERT | 535 DEV_TX_OFFLOAD_QINQ_INSERT | 536 DEV_TX_OFFLOAD_IPV4_CKSUM | 537 DEV_TX_OFFLOAD_UDP_CKSUM | 538 DEV_TX_OFFLOAD_TCP_CKSUM | 539 DEV_TX_OFFLOAD_SCTP_CKSUM | 540 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 541 DEV_TX_OFFLOAD_TCP_TSO | 542 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 543 DEV_TX_OFFLOAD_GRE_TNL_TSO | 544 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 545 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 546 DEV_TX_OFFLOAD_MULTI_SEGS; 547 548 dev_info->default_rxconf = (struct rte_eth_rxconf) { 549 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 550 .rx_drop_en = 0, 551 .offloads = 0, 552 }; 553 554 dev_info->default_txconf = (struct rte_eth_txconf) { 555 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 556 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 557 .offloads = 0, 558 }; 559 560 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 561 .nb_max = IAVF_MAX_RING_DESC, 562 .nb_min = IAVF_MIN_RING_DESC, 563 .nb_align = IAVF_ALIGN_RING_DESC, 564 }; 565 566 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 567 .nb_max = IAVF_MAX_RING_DESC, 568 .nb_min = IAVF_MIN_RING_DESC, 569 .nb_align = IAVF_ALIGN_RING_DESC, 570 }; 571 572 return 0; 573 } 574 575 static const uint32_t * 576 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 577 { 578 static const uint32_t ptypes[] = { 579 RTE_PTYPE_L2_ETHER, 580 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 581 RTE_PTYPE_L4_FRAG, 582 RTE_PTYPE_L4_ICMP, 583 RTE_PTYPE_L4_NONFRAG, 584 RTE_PTYPE_L4_SCTP, 585 RTE_PTYPE_L4_TCP, 586 RTE_PTYPE_L4_UDP, 587 RTE_PTYPE_UNKNOWN 588 }; 589 return ptypes; 590 } 591 592 int 593 iavf_dev_link_update(struct rte_eth_dev *dev, 594 __rte_unused int wait_to_complete) 595 { 596 struct rte_eth_link new_link; 597 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 598 599 /* Only read status info stored in VF, and the info is updated 600 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 601 */ 602 switch (vf->link_speed) { 603 case 10: 604 new_link.link_speed = ETH_SPEED_NUM_10M; 605 break; 606 case 100: 607 new_link.link_speed = ETH_SPEED_NUM_100M; 608 break; 609 case 1000: 610 new_link.link_speed = ETH_SPEED_NUM_1G; 611 break; 612 case 10000: 613 new_link.link_speed = ETH_SPEED_NUM_10G; 614 break; 615 case 20000: 616 new_link.link_speed = ETH_SPEED_NUM_20G; 617 break; 618 case 25000: 619 new_link.link_speed = ETH_SPEED_NUM_25G; 620 break; 621 case 40000: 622 new_link.link_speed = ETH_SPEED_NUM_40G; 623 break; 624 case 50000: 625 new_link.link_speed = ETH_SPEED_NUM_50G; 626 break; 627 case 100000: 628 new_link.link_speed = ETH_SPEED_NUM_100G; 629 break; 630 default: 631 new_link.link_speed = ETH_SPEED_NUM_NONE; 632 break; 633 } 634 635 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 636 new_link.link_status = vf->link_up ? ETH_LINK_UP : 637 ETH_LINK_DOWN; 638 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 639 ETH_LINK_SPEED_FIXED); 640 641 if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link, 642 *(uint64_t *)&dev->data->dev_link, 643 *(uint64_t *)&new_link) == 0) 644 return -1; 645 646 return 0; 647 } 648 649 static int 650 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 651 { 652 struct iavf_adapter *adapter = 653 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 654 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 655 int ret; 656 657 if (vf->promisc_unicast_enabled) 658 return 0; 659 660 ret = iavf_config_promisc(adapter, true, vf->promisc_multicast_enabled); 661 if (!ret) 662 vf->promisc_unicast_enabled = true; 663 else 664 ret = -EAGAIN; 665 666 return ret; 667 } 668 669 static int 670 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 671 { 672 struct iavf_adapter *adapter = 673 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 674 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 675 int ret; 676 677 if (!vf->promisc_unicast_enabled) 678 return 0; 679 680 ret = iavf_config_promisc(adapter, false, 681 vf->promisc_multicast_enabled); 682 if (!ret) 683 vf->promisc_unicast_enabled = false; 684 else 685 ret = -EAGAIN; 686 687 return ret; 688 } 689 690 static int 691 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 692 { 693 struct iavf_adapter *adapter = 694 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 695 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 696 int ret; 697 698 if (vf->promisc_multicast_enabled) 699 return 0; 700 701 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, true); 702 if (!ret) 703 vf->promisc_multicast_enabled = true; 704 else 705 ret = -EAGAIN; 706 707 return ret; 708 } 709 710 static int 711 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 712 { 713 struct iavf_adapter *adapter = 714 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 715 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 716 int ret; 717 718 if (!vf->promisc_multicast_enabled) 719 return 0; 720 721 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, false); 722 if (!ret) 723 vf->promisc_multicast_enabled = false; 724 else 725 ret = -EAGAIN; 726 727 return ret; 728 } 729 730 static int 731 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 732 __rte_unused uint32_t index, 733 __rte_unused uint32_t pool) 734 { 735 struct iavf_adapter *adapter = 736 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 737 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 738 int err; 739 740 if (rte_is_zero_ether_addr(addr)) { 741 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 742 return -EINVAL; 743 } 744 745 err = iavf_add_del_eth_addr(adapter, addr, true); 746 if (err) { 747 PMD_DRV_LOG(ERR, "fail to add MAC address"); 748 return -EIO; 749 } 750 751 vf->mac_num++; 752 753 return 0; 754 } 755 756 static void 757 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 758 { 759 struct iavf_adapter *adapter = 760 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 761 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 762 struct rte_ether_addr *addr; 763 int err; 764 765 addr = &dev->data->mac_addrs[index]; 766 767 err = iavf_add_del_eth_addr(adapter, addr, false); 768 if (err) 769 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 770 771 vf->mac_num--; 772 } 773 774 static int 775 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 776 { 777 struct iavf_adapter *adapter = 778 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 779 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 780 int err; 781 782 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 783 return -ENOTSUP; 784 785 err = iavf_add_del_vlan(adapter, vlan_id, on); 786 if (err) 787 return -EIO; 788 return 0; 789 } 790 791 static int 792 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 793 { 794 struct iavf_adapter *adapter = 795 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 796 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 797 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 798 int err; 799 800 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 801 return -ENOTSUP; 802 803 /* Vlan stripping setting */ 804 if (mask & ETH_VLAN_STRIP_MASK) { 805 /* Enable or disable VLAN stripping */ 806 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 807 err = iavf_enable_vlan_strip(adapter); 808 else 809 err = iavf_disable_vlan_strip(adapter); 810 811 if (err) 812 return -EIO; 813 } 814 return 0; 815 } 816 817 static int 818 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 819 struct rte_eth_rss_reta_entry64 *reta_conf, 820 uint16_t reta_size) 821 { 822 struct iavf_adapter *adapter = 823 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 824 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 825 uint8_t *lut; 826 uint16_t i, idx, shift; 827 int ret; 828 829 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 830 return -ENOTSUP; 831 832 if (reta_size != vf->vf_res->rss_lut_size) { 833 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 834 "(%d) doesn't match the number of hardware can " 835 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 836 return -EINVAL; 837 } 838 839 lut = rte_zmalloc("rss_lut", reta_size, 0); 840 if (!lut) { 841 PMD_DRV_LOG(ERR, "No memory can be allocated"); 842 return -ENOMEM; 843 } 844 /* store the old lut table temporarily */ 845 rte_memcpy(lut, vf->rss_lut, reta_size); 846 847 for (i = 0; i < reta_size; i++) { 848 idx = i / RTE_RETA_GROUP_SIZE; 849 shift = i % RTE_RETA_GROUP_SIZE; 850 if (reta_conf[idx].mask & (1ULL << shift)) 851 lut[i] = reta_conf[idx].reta[shift]; 852 } 853 854 rte_memcpy(vf->rss_lut, lut, reta_size); 855 /* send virtchnnl ops to configure rss*/ 856 ret = iavf_configure_rss_lut(adapter); 857 if (ret) /* revert back */ 858 rte_memcpy(vf->rss_lut, lut, reta_size); 859 rte_free(lut); 860 861 return ret; 862 } 863 864 static int 865 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 866 struct rte_eth_rss_reta_entry64 *reta_conf, 867 uint16_t reta_size) 868 { 869 struct iavf_adapter *adapter = 870 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 871 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 872 uint16_t i, idx, shift; 873 874 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 875 return -ENOTSUP; 876 877 if (reta_size != vf->vf_res->rss_lut_size) { 878 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 879 "(%d) doesn't match the number of hardware can " 880 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 881 return -EINVAL; 882 } 883 884 for (i = 0; i < reta_size; i++) { 885 idx = i / RTE_RETA_GROUP_SIZE; 886 shift = i % RTE_RETA_GROUP_SIZE; 887 if (reta_conf[idx].mask & (1ULL << shift)) 888 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 889 } 890 891 return 0; 892 } 893 894 static int 895 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 896 struct rte_eth_rss_conf *rss_conf) 897 { 898 struct iavf_adapter *adapter = 899 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 900 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 901 902 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 903 return -ENOTSUP; 904 905 /* HENA setting, it is enabled by default, no change */ 906 if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) { 907 PMD_DRV_LOG(DEBUG, "No key to be configured"); 908 return 0; 909 } else if (rss_conf->rss_key_len != vf->vf_res->rss_key_size) { 910 PMD_DRV_LOG(ERR, "The size of hash key configured " 911 "(%d) doesn't match the size of hardware can " 912 "support (%d)", rss_conf->rss_key_len, 913 vf->vf_res->rss_key_size); 914 return -EINVAL; 915 } 916 917 rte_memcpy(vf->rss_key, rss_conf->rss_key, rss_conf->rss_key_len); 918 919 return iavf_configure_rss_key(adapter); 920 } 921 922 static int 923 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 924 struct rte_eth_rss_conf *rss_conf) 925 { 926 struct iavf_adapter *adapter = 927 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 928 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 929 930 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 931 return -ENOTSUP; 932 933 /* Just set it to default value now. */ 934 rss_conf->rss_hf = IAVF_RSS_OFFLOAD_ALL; 935 936 if (!rss_conf->rss_key) 937 return 0; 938 939 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 940 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 941 942 return 0; 943 } 944 945 static int 946 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 947 { 948 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 949 int ret = 0; 950 951 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 952 return -EINVAL; 953 954 /* mtu setting is forbidden if port is start */ 955 if (dev->data->dev_started) { 956 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 957 return -EBUSY; 958 } 959 960 if (frame_size > RTE_ETHER_MAX_LEN) 961 dev->data->dev_conf.rxmode.offloads |= 962 DEV_RX_OFFLOAD_JUMBO_FRAME; 963 else 964 dev->data->dev_conf.rxmode.offloads &= 965 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 966 967 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 968 969 return ret; 970 } 971 972 static int 973 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 974 struct rte_ether_addr *mac_addr) 975 { 976 struct iavf_adapter *adapter = 977 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 978 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 979 struct rte_ether_addr *perm_addr, *old_addr; 980 int ret; 981 982 old_addr = (struct rte_ether_addr *)hw->mac.addr; 983 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 984 985 if (rte_is_same_ether_addr(mac_addr, old_addr)) 986 return 0; 987 988 /* If the MAC address is configured by host, skip the setting */ 989 if (rte_is_valid_assigned_ether_addr(perm_addr)) 990 return -EPERM; 991 992 ret = iavf_add_del_eth_addr(adapter, old_addr, false); 993 if (ret) 994 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 995 " %02X:%02X:%02X:%02X:%02X:%02X", 996 old_addr->addr_bytes[0], 997 old_addr->addr_bytes[1], 998 old_addr->addr_bytes[2], 999 old_addr->addr_bytes[3], 1000 old_addr->addr_bytes[4], 1001 old_addr->addr_bytes[5]); 1002 1003 ret = iavf_add_del_eth_addr(adapter, mac_addr, true); 1004 if (ret) 1005 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 1006 " %02X:%02X:%02X:%02X:%02X:%02X", 1007 mac_addr->addr_bytes[0], 1008 mac_addr->addr_bytes[1], 1009 mac_addr->addr_bytes[2], 1010 mac_addr->addr_bytes[3], 1011 mac_addr->addr_bytes[4], 1012 mac_addr->addr_bytes[5]); 1013 1014 if (ret) 1015 return -EIO; 1016 1017 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1018 return 0; 1019 } 1020 1021 static void 1022 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1023 { 1024 if (*stat >= *offset) 1025 *stat = *stat - *offset; 1026 else 1027 *stat = (uint64_t)((*stat + 1028 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1029 1030 *stat &= IAVF_48_BIT_MASK; 1031 } 1032 1033 static void 1034 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1035 { 1036 if (*stat >= *offset) 1037 *stat = (uint64_t)(*stat - *offset); 1038 else 1039 *stat = (uint64_t)((*stat + 1040 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1041 } 1042 1043 static void 1044 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1045 { 1046 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1047 1048 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1049 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1050 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1051 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1052 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1053 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1054 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1055 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1056 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1057 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1058 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1059 } 1060 1061 static int 1062 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1063 { 1064 struct iavf_adapter *adapter = 1065 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1066 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1067 struct iavf_vsi *vsi = &vf->vsi; 1068 struct virtchnl_eth_stats *pstats = NULL; 1069 int ret; 1070 1071 ret = iavf_query_stats(adapter, &pstats); 1072 if (ret == 0) { 1073 iavf_update_stats(vsi, pstats); 1074 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1075 pstats->rx_broadcast - pstats->rx_discards; 1076 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1077 pstats->tx_unicast; 1078 stats->imissed = pstats->rx_discards; 1079 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1080 stats->ibytes = pstats->rx_bytes; 1081 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 1082 stats->obytes = pstats->tx_bytes; 1083 } else { 1084 PMD_DRV_LOG(ERR, "Get statistics failed"); 1085 } 1086 return ret; 1087 } 1088 1089 static int 1090 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1091 { 1092 int ret; 1093 struct iavf_adapter *adapter = 1094 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1095 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1096 struct iavf_vsi *vsi = &vf->vsi; 1097 struct virtchnl_eth_stats *pstats = NULL; 1098 1099 /* read stat values to clear hardware registers */ 1100 ret = iavf_query_stats(adapter, &pstats); 1101 if (ret != 0) 1102 return ret; 1103 1104 /* set stats offset base on current values */ 1105 vsi->eth_stats_offset = *pstats; 1106 1107 return 0; 1108 } 1109 1110 static int 1111 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1112 { 1113 struct iavf_adapter *adapter = 1114 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1115 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1116 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1117 uint16_t msix_intr; 1118 1119 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1120 if (msix_intr == IAVF_MISC_VEC_ID) { 1121 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1122 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1123 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1124 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1125 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1126 } else { 1127 IAVF_WRITE_REG(hw, 1128 IAVF_VFINT_DYN_CTLN1 1129 (msix_intr - IAVF_RX_VEC_START), 1130 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1131 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1132 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1133 } 1134 1135 IAVF_WRITE_FLUSH(hw); 1136 1137 rte_intr_ack(&pci_dev->intr_handle); 1138 1139 return 0; 1140 } 1141 1142 static int 1143 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1144 { 1145 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1146 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1147 uint16_t msix_intr; 1148 1149 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1150 if (msix_intr == IAVF_MISC_VEC_ID) { 1151 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1152 return -EIO; 1153 } 1154 1155 IAVF_WRITE_REG(hw, 1156 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1157 0); 1158 1159 IAVF_WRITE_FLUSH(hw); 1160 return 0; 1161 } 1162 1163 static int 1164 iavf_check_vf_reset_done(struct iavf_hw *hw) 1165 { 1166 int i, reset; 1167 1168 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1169 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1170 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1171 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1172 if (reset == VIRTCHNL_VFR_VFACTIVE || 1173 reset == VIRTCHNL_VFR_COMPLETED) 1174 break; 1175 rte_delay_ms(20); 1176 } 1177 1178 if (i >= IAVF_RESET_WAIT_CNT) 1179 return -1; 1180 1181 return 0; 1182 } 1183 1184 static int 1185 iavf_init_vf(struct rte_eth_dev *dev) 1186 { 1187 int err, bufsz; 1188 struct iavf_adapter *adapter = 1189 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1190 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1191 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1192 1193 err = iavf_set_mac_type(hw); 1194 if (err) { 1195 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1196 goto err; 1197 } 1198 1199 err = iavf_check_vf_reset_done(hw); 1200 if (err) { 1201 PMD_INIT_LOG(ERR, "VF is still resetting"); 1202 goto err; 1203 } 1204 1205 iavf_init_adminq_parameter(hw); 1206 err = iavf_init_adminq(hw); 1207 if (err) { 1208 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1209 goto err; 1210 } 1211 1212 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1213 if (!vf->aq_resp) { 1214 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1215 goto err_aq; 1216 } 1217 if (iavf_check_api_version(adapter) != 0) { 1218 PMD_INIT_LOG(ERR, "check_api version failed"); 1219 goto err_api; 1220 } 1221 1222 bufsz = sizeof(struct virtchnl_vf_resource) + 1223 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1224 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1225 if (!vf->vf_res) { 1226 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1227 goto err_api; 1228 } 1229 if (iavf_get_vf_resource(adapter) != 0) { 1230 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1231 goto err_alloc; 1232 } 1233 /* Allocate memort for RSS info */ 1234 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1235 vf->rss_key = rte_zmalloc("rss_key", 1236 vf->vf_res->rss_key_size, 0); 1237 if (!vf->rss_key) { 1238 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1239 goto err_rss; 1240 } 1241 vf->rss_lut = rte_zmalloc("rss_lut", 1242 vf->vf_res->rss_lut_size, 0); 1243 if (!vf->rss_lut) { 1244 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1245 goto err_rss; 1246 } 1247 } 1248 1249 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 1250 if (iavf_get_supported_rxdid(adapter) != 0) { 1251 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 1252 goto err_rss; 1253 } 1254 } 1255 1256 return 0; 1257 err_rss: 1258 rte_free(vf->rss_key); 1259 rte_free(vf->rss_lut); 1260 err_alloc: 1261 rte_free(vf->vf_res); 1262 vf->vsi_res = NULL; 1263 err_api: 1264 rte_free(vf->aq_resp); 1265 err_aq: 1266 iavf_shutdown_adminq(hw); 1267 err: 1268 return -1; 1269 } 1270 1271 /* Enable default admin queue interrupt setting */ 1272 static inline void 1273 iavf_enable_irq0(struct iavf_hw *hw) 1274 { 1275 /* Enable admin queue interrupt trigger */ 1276 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 1277 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 1278 1279 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1280 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1281 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1282 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1283 1284 IAVF_WRITE_FLUSH(hw); 1285 } 1286 1287 static inline void 1288 iavf_disable_irq0(struct iavf_hw *hw) 1289 { 1290 /* Disable all interrupt types */ 1291 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 1292 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1293 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1294 IAVF_WRITE_FLUSH(hw); 1295 } 1296 1297 static void 1298 iavf_dev_interrupt_handler(void *param) 1299 { 1300 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1301 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1302 1303 iavf_disable_irq0(hw); 1304 1305 iavf_handle_virtchnl_msg(dev); 1306 1307 iavf_enable_irq0(hw); 1308 } 1309 1310 static int 1311 iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 1312 enum rte_filter_type filter_type, 1313 enum rte_filter_op filter_op, 1314 void *arg) 1315 { 1316 int ret = 0; 1317 1318 if (!dev) 1319 return -EINVAL; 1320 1321 switch (filter_type) { 1322 case RTE_ETH_FILTER_GENERIC: 1323 if (filter_op != RTE_ETH_FILTER_GET) 1324 return -EINVAL; 1325 *(const void **)arg = &iavf_flow_ops; 1326 break; 1327 default: 1328 PMD_DRV_LOG(WARNING, "Filter type (%d) not supported", 1329 filter_type); 1330 ret = -EINVAL; 1331 break; 1332 } 1333 1334 return ret; 1335 } 1336 1337 1338 static int 1339 iavf_dev_init(struct rte_eth_dev *eth_dev) 1340 { 1341 struct iavf_adapter *adapter = 1342 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1343 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1344 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1345 int ret = 0; 1346 1347 PMD_INIT_FUNC_TRACE(); 1348 1349 /* assign ops func pointer */ 1350 eth_dev->dev_ops = &iavf_eth_dev_ops; 1351 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 1352 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 1353 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 1354 1355 /* For secondary processes, we don't initialise any further as primary 1356 * has already done this work. Only check if we need a different RX 1357 * and TX function. 1358 */ 1359 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1360 iavf_set_rx_function(eth_dev); 1361 iavf_set_tx_function(eth_dev); 1362 return 0; 1363 } 1364 rte_eth_copy_pci_info(eth_dev, pci_dev); 1365 1366 hw->vendor_id = pci_dev->id.vendor_id; 1367 hw->device_id = pci_dev->id.device_id; 1368 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 1369 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 1370 hw->bus.bus_id = pci_dev->addr.bus; 1371 hw->bus.device = pci_dev->addr.devid; 1372 hw->bus.func = pci_dev->addr.function; 1373 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 1374 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1375 adapter->eth_dev = eth_dev; 1376 adapter->stopped = 1; 1377 1378 if (iavf_init_vf(eth_dev) != 0) { 1379 PMD_INIT_LOG(ERR, "Init vf failed"); 1380 return -1; 1381 } 1382 1383 /* set default ptype table */ 1384 adapter->ptype_tbl = iavf_get_default_ptype_table(); 1385 1386 /* copy mac addr */ 1387 eth_dev->data->mac_addrs = rte_zmalloc( 1388 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 1389 if (!eth_dev->data->mac_addrs) { 1390 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 1391 " store MAC addresses", 1392 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 1393 return -ENOMEM; 1394 } 1395 /* If the MAC address is not configured by host, 1396 * generate a random one. 1397 */ 1398 if (!rte_is_valid_assigned_ether_addr( 1399 (struct rte_ether_addr *)hw->mac.addr)) 1400 rte_eth_random_addr(hw->mac.addr); 1401 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 1402 ð_dev->data->mac_addrs[0]); 1403 1404 /* register callback func to eal lib */ 1405 rte_intr_callback_register(&pci_dev->intr_handle, 1406 iavf_dev_interrupt_handler, 1407 (void *)eth_dev); 1408 1409 /* enable uio intr after callback register */ 1410 rte_intr_enable(&pci_dev->intr_handle); 1411 1412 /* configure and enable device interrupt */ 1413 iavf_enable_irq0(hw); 1414 1415 ret = iavf_flow_init(adapter); 1416 if (ret) { 1417 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 1418 return ret; 1419 } 1420 1421 return 0; 1422 } 1423 1424 static void 1425 iavf_dev_close(struct rte_eth_dev *dev) 1426 { 1427 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1428 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1429 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 1430 struct iavf_adapter *adapter = 1431 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1432 1433 iavf_dev_stop(dev); 1434 iavf_flow_flush(dev, NULL); 1435 iavf_flow_uninit(adapter); 1436 iavf_shutdown_adminq(hw); 1437 /* disable uio intr before callback unregister */ 1438 rte_intr_disable(intr_handle); 1439 1440 /* unregister callback func from eal lib */ 1441 rte_intr_callback_unregister(intr_handle, 1442 iavf_dev_interrupt_handler, dev); 1443 iavf_disable_irq0(hw); 1444 } 1445 1446 static int 1447 iavf_dev_uninit(struct rte_eth_dev *dev) 1448 { 1449 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1450 1451 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1452 return -EPERM; 1453 1454 dev->dev_ops = NULL; 1455 dev->rx_pkt_burst = NULL; 1456 dev->tx_pkt_burst = NULL; 1457 iavf_dev_close(dev); 1458 1459 rte_free(vf->vf_res); 1460 vf->vsi_res = NULL; 1461 vf->vf_res = NULL; 1462 1463 rte_free(vf->aq_resp); 1464 vf->aq_resp = NULL; 1465 1466 if (vf->rss_lut) { 1467 rte_free(vf->rss_lut); 1468 vf->rss_lut = NULL; 1469 } 1470 if (vf->rss_key) { 1471 rte_free(vf->rss_key); 1472 vf->rss_key = NULL; 1473 } 1474 1475 return 0; 1476 } 1477 1478 /* 1479 * Reset VF device only to re-initialize resources in PMD layer 1480 */ 1481 static int 1482 iavf_dev_reset(struct rte_eth_dev *dev) 1483 { 1484 int ret; 1485 1486 ret = iavf_dev_uninit(dev); 1487 if (ret) 1488 return ret; 1489 1490 return iavf_dev_init(dev); 1491 } 1492 1493 static int 1494 iavf_dcf_cap_check_handler(__rte_unused const char *key, 1495 const char *value, __rte_unused void *opaque) 1496 { 1497 if (strcmp(value, "dcf")) 1498 return -1; 1499 1500 return 0; 1501 } 1502 1503 static int 1504 iavf_dcf_cap_selected(struct rte_devargs *devargs) 1505 { 1506 struct rte_kvargs *kvlist; 1507 const char *key = "cap"; 1508 int ret = 0; 1509 1510 if (devargs == NULL) 1511 return 0; 1512 1513 kvlist = rte_kvargs_parse(devargs->args, NULL); 1514 if (kvlist == NULL) 1515 return 0; 1516 1517 if (!rte_kvargs_count(kvlist, key)) 1518 goto exit; 1519 1520 /* dcf capability selected when there's a key-value pair: cap=dcf */ 1521 if (rte_kvargs_process(kvlist, key, 1522 iavf_dcf_cap_check_handler, NULL) < 0) 1523 goto exit; 1524 1525 ret = 1; 1526 1527 exit: 1528 rte_kvargs_free(kvlist); 1529 return ret; 1530 } 1531 1532 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1533 struct rte_pci_device *pci_dev) 1534 { 1535 if (iavf_dcf_cap_selected(pci_dev->device.devargs)) 1536 return 1; 1537 1538 return rte_eth_dev_pci_generic_probe(pci_dev, 1539 sizeof(struct iavf_adapter), iavf_dev_init); 1540 } 1541 1542 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 1543 { 1544 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 1545 } 1546 1547 /* Adaptive virtual function driver struct */ 1548 static struct rte_pci_driver rte_iavf_pmd = { 1549 .id_table = pci_id_iavf_map, 1550 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 1551 .probe = eth_iavf_pci_probe, 1552 .remove = eth_iavf_pci_remove, 1553 }; 1554 1555 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 1556 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 1557 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 1558 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf"); 1559 RTE_INIT(iavf_init_log) 1560 { 1561 iavf_logtype_init = rte_log_register("pmd.net.iavf.init"); 1562 if (iavf_logtype_init >= 0) 1563 rte_log_set_level(iavf_logtype_init, RTE_LOG_NOTICE); 1564 iavf_logtype_driver = rte_log_register("pmd.net.iavf.driver"); 1565 if (iavf_logtype_driver >= 0) 1566 rte_log_set_level(iavf_logtype_driver, RTE_LOG_NOTICE); 1567 1568 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 1569 iavf_logtype_rx = rte_log_register("pmd.net.iavf.rx"); 1570 if (iavf_logtype_rx >= 0) 1571 rte_log_set_level(iavf_logtype_rx, RTE_LOG_DEBUG); 1572 #endif 1573 1574 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 1575 iavf_logtype_tx = rte_log_register("pmd.net.iavf.tx"); 1576 if (iavf_logtype_tx >= 0) 1577 rte_log_set_level(iavf_logtype_tx, RTE_LOG_DEBUG); 1578 #endif 1579 1580 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 1581 iavf_logtype_tx_free = rte_log_register("pmd.net.iavf.tx_free"); 1582 if (iavf_logtype_tx_free >= 0) 1583 rte_log_set_level(iavf_logtype_tx_free, RTE_LOG_DEBUG); 1584 #endif 1585 } 1586