1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf_log.h" 29 #include "base/iavf_prototype.h" 30 #include "base/iavf_adminq_cmd.h" 31 #include "base/iavf_type.h" 32 33 #include "iavf.h" 34 #include "iavf_rxtx.h" 35 36 static int iavf_dev_configure(struct rte_eth_dev *dev); 37 static int iavf_dev_start(struct rte_eth_dev *dev); 38 static void iavf_dev_stop(struct rte_eth_dev *dev); 39 static void iavf_dev_close(struct rte_eth_dev *dev); 40 static int iavf_dev_info_get(struct rte_eth_dev *dev, 41 struct rte_eth_dev_info *dev_info); 42 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 43 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 44 struct rte_eth_stats *stats); 45 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 46 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 47 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 48 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 49 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 50 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 51 struct rte_ether_addr *addr, 52 uint32_t index, 53 uint32_t pool); 54 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 55 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 56 uint16_t vlan_id, int on); 57 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 58 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 59 struct rte_eth_rss_reta_entry64 *reta_conf, 60 uint16_t reta_size); 61 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 62 struct rte_eth_rss_reta_entry64 *reta_conf, 63 uint16_t reta_size); 64 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 65 struct rte_eth_rss_conf *rss_conf); 66 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 67 struct rte_eth_rss_conf *rss_conf); 68 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 69 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 70 struct rte_ether_addr *mac_addr); 71 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 72 uint16_t queue_id); 73 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 74 uint16_t queue_id); 75 76 int iavf_logtype_init; 77 int iavf_logtype_driver; 78 79 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 80 int iavf_logtype_rx; 81 #endif 82 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 83 int iavf_logtype_tx; 84 #endif 85 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 86 int iavf_logtype_tx_free; 87 #endif 88 89 static const struct rte_pci_id pci_id_iavf_map[] = { 90 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 91 { .vendor_id = 0, /* sentinel */ }, 92 }; 93 94 static const struct eth_dev_ops iavf_eth_dev_ops = { 95 .dev_configure = iavf_dev_configure, 96 .dev_start = iavf_dev_start, 97 .dev_stop = iavf_dev_stop, 98 .dev_close = iavf_dev_close, 99 .dev_infos_get = iavf_dev_info_get, 100 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 101 .link_update = iavf_dev_link_update, 102 .stats_get = iavf_dev_stats_get, 103 .stats_reset = iavf_dev_stats_reset, 104 .promiscuous_enable = iavf_dev_promiscuous_enable, 105 .promiscuous_disable = iavf_dev_promiscuous_disable, 106 .allmulticast_enable = iavf_dev_allmulticast_enable, 107 .allmulticast_disable = iavf_dev_allmulticast_disable, 108 .mac_addr_add = iavf_dev_add_mac_addr, 109 .mac_addr_remove = iavf_dev_del_mac_addr, 110 .vlan_filter_set = iavf_dev_vlan_filter_set, 111 .vlan_offload_set = iavf_dev_vlan_offload_set, 112 .rx_queue_start = iavf_dev_rx_queue_start, 113 .rx_queue_stop = iavf_dev_rx_queue_stop, 114 .tx_queue_start = iavf_dev_tx_queue_start, 115 .tx_queue_stop = iavf_dev_tx_queue_stop, 116 .rx_queue_setup = iavf_dev_rx_queue_setup, 117 .rx_queue_release = iavf_dev_rx_queue_release, 118 .tx_queue_setup = iavf_dev_tx_queue_setup, 119 .tx_queue_release = iavf_dev_tx_queue_release, 120 .mac_addr_set = iavf_dev_set_default_mac_addr, 121 .reta_update = iavf_dev_rss_reta_update, 122 .reta_query = iavf_dev_rss_reta_query, 123 .rss_hash_update = iavf_dev_rss_hash_update, 124 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 125 .rxq_info_get = iavf_dev_rxq_info_get, 126 .txq_info_get = iavf_dev_txq_info_get, 127 .rx_queue_count = iavf_dev_rxq_count, 128 .rx_descriptor_status = iavf_dev_rx_desc_status, 129 .tx_descriptor_status = iavf_dev_tx_desc_status, 130 .mtu_set = iavf_dev_mtu_set, 131 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 132 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 133 }; 134 135 static int 136 iavf_dev_configure(struct rte_eth_dev *dev) 137 { 138 struct iavf_adapter *ad = 139 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 140 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 141 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 142 143 ad->rx_bulk_alloc_allowed = true; 144 #ifdef RTE_LIBRTE_IAVF_INC_VECTOR 145 /* Initialize to TRUE. If any of Rx queues doesn't meet the 146 * vector Rx/Tx preconditions, it will be reset. 147 */ 148 ad->rx_vec_allowed = true; 149 ad->tx_vec_allowed = true; 150 #else 151 ad->rx_vec_allowed = false; 152 ad->tx_vec_allowed = false; 153 #endif 154 155 /* Vlan stripping setting */ 156 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { 157 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 158 iavf_enable_vlan_strip(ad); 159 else 160 iavf_disable_vlan_strip(ad); 161 } 162 return 0; 163 } 164 165 static int 166 iavf_init_rss(struct iavf_adapter *adapter) 167 { 168 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 169 struct rte_eth_rss_conf *rss_conf; 170 uint8_t i, j, nb_q; 171 int ret; 172 173 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 174 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 175 IAVF_MAX_NUM_QUEUES); 176 177 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 178 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 179 return -ENOTSUP; 180 } 181 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 182 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 183 /* set all lut items to default queue */ 184 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 185 vf->rss_lut[i] = 0; 186 ret = iavf_configure_rss_lut(adapter); 187 return ret; 188 } 189 190 /* In IAVF, RSS enablement is set by PF driver. It is not supported 191 * to set based on rss_conf->rss_hf. 192 */ 193 194 /* configure RSS key */ 195 if (!rss_conf->rss_key) { 196 /* Calculate the default hash key */ 197 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 198 vf->rss_key[i] = (uint8_t)rte_rand(); 199 } else 200 rte_memcpy(vf->rss_key, rss_conf->rss_key, 201 RTE_MIN(rss_conf->rss_key_len, 202 vf->vf_res->rss_key_size)); 203 204 /* init RSS LUT table */ 205 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 206 if (j >= nb_q) 207 j = 0; 208 vf->rss_lut[i] = j; 209 } 210 /* send virtchnnl ops to configure rss*/ 211 ret = iavf_configure_rss_lut(adapter); 212 if (ret) 213 return ret; 214 ret = iavf_configure_rss_key(adapter); 215 if (ret) 216 return ret; 217 218 return 0; 219 } 220 221 static int 222 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 223 { 224 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 225 struct rte_eth_dev_data *dev_data = dev->data; 226 uint16_t buf_size, max_pkt_len, len; 227 228 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 229 230 /* Calculate the maximum packet length allowed */ 231 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 232 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 233 234 /* Check if the jumbo frame and maximum packet length are set 235 * correctly. 236 */ 237 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 238 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 239 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 240 PMD_DRV_LOG(ERR, "maximum packet length must be " 241 "larger than %u and smaller than %u, " 242 "as jumbo frame is enabled", 243 (uint32_t)RTE_ETHER_MAX_LEN, 244 (uint32_t)IAVF_FRAME_SIZE_MAX); 245 return -EINVAL; 246 } 247 } else { 248 if (max_pkt_len < RTE_ETHER_MIN_LEN || 249 max_pkt_len > RTE_ETHER_MAX_LEN) { 250 PMD_DRV_LOG(ERR, "maximum packet length must be " 251 "larger than %u and smaller than %u, " 252 "as jumbo frame is disabled", 253 (uint32_t)RTE_ETHER_MIN_LEN, 254 (uint32_t)RTE_ETHER_MAX_LEN); 255 return -EINVAL; 256 } 257 } 258 259 rxq->max_pkt_len = max_pkt_len; 260 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 261 (rxq->max_pkt_len + 2 * IAVF_VLAN_TAG_SIZE) > buf_size) { 262 dev_data->scattered_rx = 1; 263 } 264 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 265 IAVF_WRITE_FLUSH(hw); 266 267 return 0; 268 } 269 270 static int 271 iavf_init_queues(struct rte_eth_dev *dev) 272 { 273 struct iavf_rx_queue **rxq = 274 (struct iavf_rx_queue **)dev->data->rx_queues; 275 int i, ret = IAVF_SUCCESS; 276 277 for (i = 0; i < dev->data->nb_rx_queues; i++) { 278 if (!rxq[i] || !rxq[i]->q_set) 279 continue; 280 ret = iavf_init_rxq(dev, rxq[i]); 281 if (ret != IAVF_SUCCESS) 282 break; 283 } 284 /* set rx/tx function to vector/scatter/single-segment 285 * according to parameters 286 */ 287 iavf_set_rx_function(dev); 288 iavf_set_tx_function(dev); 289 290 return ret; 291 } 292 293 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 294 struct rte_intr_handle *intr_handle) 295 { 296 struct iavf_adapter *adapter = 297 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 298 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 299 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 300 uint16_t interval, i; 301 int vec; 302 303 if (rte_intr_cap_multiple(intr_handle) && 304 dev->data->dev_conf.intr_conf.rxq) { 305 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 306 return -1; 307 } 308 309 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 310 intr_handle->intr_vec = 311 rte_zmalloc("intr_vec", 312 dev->data->nb_rx_queues * sizeof(int), 0); 313 if (!intr_handle->intr_vec) { 314 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 315 dev->data->nb_rx_queues); 316 return -1; 317 } 318 } 319 320 if (!dev->data->dev_conf.intr_conf.rxq || 321 !rte_intr_dp_is_en(intr_handle)) { 322 /* Rx interrupt disabled, Map interrupt only for writeback */ 323 vf->nb_msix = 1; 324 if (vf->vf_res->vf_cap_flags & 325 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 326 /* If WB_ON_ITR supports, enable it */ 327 vf->msix_base = IAVF_RX_VEC_START; 328 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTLN1(vf->msix_base - 1), 329 IAVFINT_DYN_CTLN1_ITR_INDX_MASK | 330 IAVFINT_DYN_CTLN1_WB_ON_ITR_MASK); 331 } else { 332 /* If no WB_ON_ITR offload flags, need to set 333 * interrupt for descriptor write back. 334 */ 335 vf->msix_base = IAVF_MISC_VEC_ID; 336 337 /* set ITR to max */ 338 interval = iavf_calc_itr_interval( 339 IAVF_QUEUE_ITR_INTERVAL_MAX); 340 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, 341 IAVFINT_DYN_CTL01_INTENA_MASK | 342 (IAVF_ITR_INDEX_DEFAULT << 343 IAVFINT_DYN_CTL01_ITR_INDX_SHIFT) | 344 (interval << 345 IAVFINT_DYN_CTL01_INTERVAL_SHIFT)); 346 } 347 IAVF_WRITE_FLUSH(hw); 348 /* map all queues to the same interrupt */ 349 for (i = 0; i < dev->data->nb_rx_queues; i++) 350 vf->rxq_map[vf->msix_base] |= 1 << i; 351 } else { 352 if (!rte_intr_allow_others(intr_handle)) { 353 vf->nb_msix = 1; 354 vf->msix_base = IAVF_MISC_VEC_ID; 355 for (i = 0; i < dev->data->nb_rx_queues; i++) { 356 vf->rxq_map[vf->msix_base] |= 1 << i; 357 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 358 } 359 PMD_DRV_LOG(DEBUG, 360 "vector %u are mapping to all Rx queues", 361 vf->msix_base); 362 } else { 363 /* If Rx interrupt is reuquired, and we can use 364 * multi interrupts, then the vec is from 1 365 */ 366 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 367 intr_handle->nb_efd); 368 vf->msix_base = IAVF_RX_VEC_START; 369 vec = IAVF_RX_VEC_START; 370 for (i = 0; i < dev->data->nb_rx_queues; i++) { 371 vf->rxq_map[vec] |= 1 << i; 372 intr_handle->intr_vec[i] = vec++; 373 if (vec >= vf->nb_msix) 374 vec = IAVF_RX_VEC_START; 375 } 376 PMD_DRV_LOG(DEBUG, 377 "%u vectors are mapping to %u Rx queues", 378 vf->nb_msix, dev->data->nb_rx_queues); 379 } 380 } 381 382 if (iavf_config_irq_map(adapter)) { 383 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 384 return -1; 385 } 386 return 0; 387 } 388 389 static int 390 iavf_start_queues(struct rte_eth_dev *dev) 391 { 392 struct iavf_rx_queue *rxq; 393 struct iavf_tx_queue *txq; 394 int i; 395 396 for (i = 0; i < dev->data->nb_tx_queues; i++) { 397 txq = dev->data->tx_queues[i]; 398 if (txq->tx_deferred_start) 399 continue; 400 if (iavf_dev_tx_queue_start(dev, i) != 0) { 401 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 402 return -1; 403 } 404 } 405 406 for (i = 0; i < dev->data->nb_rx_queues; i++) { 407 rxq = dev->data->rx_queues[i]; 408 if (rxq->rx_deferred_start) 409 continue; 410 if (iavf_dev_rx_queue_start(dev, i) != 0) { 411 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 412 return -1; 413 } 414 } 415 416 return 0; 417 } 418 419 static int 420 iavf_dev_start(struct rte_eth_dev *dev) 421 { 422 struct iavf_adapter *adapter = 423 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 424 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 425 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 426 struct rte_intr_handle *intr_handle = dev->intr_handle; 427 428 PMD_INIT_FUNC_TRACE(); 429 430 hw->adapter_stopped = 0; 431 432 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 433 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 434 dev->data->nb_tx_queues); 435 436 if (iavf_init_queues(dev) != 0) { 437 PMD_DRV_LOG(ERR, "failed to do Queue init"); 438 return -1; 439 } 440 441 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 442 if (iavf_init_rss(adapter) != 0) { 443 PMD_DRV_LOG(ERR, "configure rss failed"); 444 goto err_rss; 445 } 446 } 447 448 if (iavf_configure_queues(adapter) != 0) { 449 PMD_DRV_LOG(ERR, "configure queues failed"); 450 goto err_queue; 451 } 452 453 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 454 PMD_DRV_LOG(ERR, "configure irq failed"); 455 goto err_queue; 456 } 457 /* re-enable intr again, because efd assign may change */ 458 if (dev->data->dev_conf.intr_conf.rxq != 0) { 459 rte_intr_disable(intr_handle); 460 rte_intr_enable(intr_handle); 461 } 462 463 /* Set all mac addrs */ 464 iavf_add_del_all_mac_addr(adapter, TRUE); 465 466 if (iavf_start_queues(dev) != 0) { 467 PMD_DRV_LOG(ERR, "enable queues failed"); 468 goto err_mac; 469 } 470 471 return 0; 472 473 err_mac: 474 iavf_add_del_all_mac_addr(adapter, FALSE); 475 err_queue: 476 err_rss: 477 return -1; 478 } 479 480 static void 481 iavf_dev_stop(struct rte_eth_dev *dev) 482 { 483 struct iavf_adapter *adapter = 484 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 485 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 486 struct rte_intr_handle *intr_handle = dev->intr_handle; 487 488 PMD_INIT_FUNC_TRACE(); 489 490 if (hw->adapter_stopped == 1) 491 return; 492 493 iavf_stop_queues(dev); 494 495 /* Disable the interrupt for Rx */ 496 rte_intr_efd_disable(intr_handle); 497 /* Rx interrupt vector mapping free */ 498 if (intr_handle->intr_vec) { 499 rte_free(intr_handle->intr_vec); 500 intr_handle->intr_vec = NULL; 501 } 502 503 /* remove all mac addrs */ 504 iavf_add_del_all_mac_addr(adapter, FALSE); 505 hw->adapter_stopped = 1; 506 } 507 508 static int 509 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 510 { 511 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 512 513 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs; 514 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs; 515 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 516 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 517 dev_info->hash_key_size = vf->vf_res->rss_key_size; 518 dev_info->reta_size = vf->vf_res->rss_lut_size; 519 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 520 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 521 dev_info->rx_offload_capa = 522 DEV_RX_OFFLOAD_VLAN_STRIP | 523 DEV_RX_OFFLOAD_QINQ_STRIP | 524 DEV_RX_OFFLOAD_IPV4_CKSUM | 525 DEV_RX_OFFLOAD_UDP_CKSUM | 526 DEV_RX_OFFLOAD_TCP_CKSUM | 527 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 528 DEV_RX_OFFLOAD_SCATTER | 529 DEV_RX_OFFLOAD_JUMBO_FRAME | 530 DEV_RX_OFFLOAD_VLAN_FILTER; 531 dev_info->tx_offload_capa = 532 DEV_TX_OFFLOAD_VLAN_INSERT | 533 DEV_TX_OFFLOAD_QINQ_INSERT | 534 DEV_TX_OFFLOAD_IPV4_CKSUM | 535 DEV_TX_OFFLOAD_UDP_CKSUM | 536 DEV_TX_OFFLOAD_TCP_CKSUM | 537 DEV_TX_OFFLOAD_SCTP_CKSUM | 538 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 539 DEV_TX_OFFLOAD_TCP_TSO | 540 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 541 DEV_TX_OFFLOAD_GRE_TNL_TSO | 542 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 543 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 544 DEV_TX_OFFLOAD_MULTI_SEGS; 545 546 dev_info->default_rxconf = (struct rte_eth_rxconf) { 547 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 548 .rx_drop_en = 0, 549 .offloads = 0, 550 }; 551 552 dev_info->default_txconf = (struct rte_eth_txconf) { 553 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 554 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 555 .offloads = 0, 556 }; 557 558 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 559 .nb_max = IAVF_MAX_RING_DESC, 560 .nb_min = IAVF_MIN_RING_DESC, 561 .nb_align = IAVF_ALIGN_RING_DESC, 562 }; 563 564 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 565 .nb_max = IAVF_MAX_RING_DESC, 566 .nb_min = IAVF_MIN_RING_DESC, 567 .nb_align = IAVF_ALIGN_RING_DESC, 568 }; 569 570 return 0; 571 } 572 573 static const uint32_t * 574 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 575 { 576 static const uint32_t ptypes[] = { 577 RTE_PTYPE_L2_ETHER, 578 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 579 RTE_PTYPE_L4_FRAG, 580 RTE_PTYPE_L4_ICMP, 581 RTE_PTYPE_L4_NONFRAG, 582 RTE_PTYPE_L4_SCTP, 583 RTE_PTYPE_L4_TCP, 584 RTE_PTYPE_L4_UDP, 585 RTE_PTYPE_UNKNOWN 586 }; 587 return ptypes; 588 } 589 590 int 591 iavf_dev_link_update(struct rte_eth_dev *dev, 592 __rte_unused int wait_to_complete) 593 { 594 struct rte_eth_link new_link; 595 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 596 597 /* Only read status info stored in VF, and the info is updated 598 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 599 */ 600 switch (vf->link_speed) { 601 case 10: 602 new_link.link_speed = ETH_SPEED_NUM_10M; 603 break; 604 case 100: 605 new_link.link_speed = ETH_SPEED_NUM_100M; 606 break; 607 case 1000: 608 new_link.link_speed = ETH_SPEED_NUM_1G; 609 break; 610 case 10000: 611 new_link.link_speed = ETH_SPEED_NUM_10G; 612 break; 613 case 20000: 614 new_link.link_speed = ETH_SPEED_NUM_20G; 615 break; 616 case 25000: 617 new_link.link_speed = ETH_SPEED_NUM_25G; 618 break; 619 case 40000: 620 new_link.link_speed = ETH_SPEED_NUM_40G; 621 break; 622 case 50000: 623 new_link.link_speed = ETH_SPEED_NUM_50G; 624 break; 625 case 100000: 626 new_link.link_speed = ETH_SPEED_NUM_100G; 627 break; 628 default: 629 new_link.link_speed = ETH_SPEED_NUM_NONE; 630 break; 631 } 632 633 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 634 new_link.link_status = vf->link_up ? ETH_LINK_UP : 635 ETH_LINK_DOWN; 636 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 637 ETH_LINK_SPEED_FIXED); 638 639 if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link, 640 *(uint64_t *)&dev->data->dev_link, 641 *(uint64_t *)&new_link) == 0) 642 return -1; 643 644 return 0; 645 } 646 647 static int 648 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 649 { 650 struct iavf_adapter *adapter = 651 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 652 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 653 int ret; 654 655 if (vf->promisc_unicast_enabled) 656 return 0; 657 658 ret = iavf_config_promisc(adapter, TRUE, vf->promisc_multicast_enabled); 659 if (!ret) 660 vf->promisc_unicast_enabled = TRUE; 661 else 662 ret = -EAGAIN; 663 664 return ret; 665 } 666 667 static int 668 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 669 { 670 struct iavf_adapter *adapter = 671 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 672 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 673 int ret; 674 675 if (!vf->promisc_unicast_enabled) 676 return 0; 677 678 ret = iavf_config_promisc(adapter, FALSE, vf->promisc_multicast_enabled); 679 if (!ret) 680 vf->promisc_unicast_enabled = FALSE; 681 else 682 ret = -EAGAIN; 683 684 return ret; 685 } 686 687 static int 688 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 689 { 690 struct iavf_adapter *adapter = 691 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 692 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 693 int ret; 694 695 if (vf->promisc_multicast_enabled) 696 return 0; 697 698 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, TRUE); 699 if (!ret) 700 vf->promisc_multicast_enabled = TRUE; 701 else 702 ret = -EAGAIN; 703 704 return ret; 705 } 706 707 static int 708 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 709 { 710 struct iavf_adapter *adapter = 711 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 712 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 713 int ret; 714 715 if (!vf->promisc_multicast_enabled) 716 return 0; 717 718 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, FALSE); 719 if (!ret) 720 vf->promisc_multicast_enabled = FALSE; 721 else 722 ret = -EAGAIN; 723 724 return ret; 725 } 726 727 static int 728 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 729 __rte_unused uint32_t index, 730 __rte_unused uint32_t pool) 731 { 732 struct iavf_adapter *adapter = 733 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 734 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 735 int err; 736 737 if (rte_is_zero_ether_addr(addr)) { 738 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 739 return -EINVAL; 740 } 741 742 err = iavf_add_del_eth_addr(adapter, addr, TRUE); 743 if (err) { 744 PMD_DRV_LOG(ERR, "fail to add MAC address"); 745 return -EIO; 746 } 747 748 vf->mac_num++; 749 750 return 0; 751 } 752 753 static void 754 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 755 { 756 struct iavf_adapter *adapter = 757 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 758 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 759 struct rte_ether_addr *addr; 760 int err; 761 762 addr = &dev->data->mac_addrs[index]; 763 764 err = iavf_add_del_eth_addr(adapter, addr, FALSE); 765 if (err) 766 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 767 768 vf->mac_num--; 769 } 770 771 static int 772 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 773 { 774 struct iavf_adapter *adapter = 775 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 776 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 777 int err; 778 779 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 780 return -ENOTSUP; 781 782 err = iavf_add_del_vlan(adapter, vlan_id, on); 783 if (err) 784 return -EIO; 785 return 0; 786 } 787 788 static int 789 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 790 { 791 struct iavf_adapter *adapter = 792 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 793 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 794 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 795 int err; 796 797 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 798 return -ENOTSUP; 799 800 /* Vlan stripping setting */ 801 if (mask & ETH_VLAN_STRIP_MASK) { 802 /* Enable or disable VLAN stripping */ 803 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 804 err = iavf_enable_vlan_strip(adapter); 805 else 806 err = iavf_disable_vlan_strip(adapter); 807 808 if (err) 809 return -EIO; 810 } 811 return 0; 812 } 813 814 static int 815 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 816 struct rte_eth_rss_reta_entry64 *reta_conf, 817 uint16_t reta_size) 818 { 819 struct iavf_adapter *adapter = 820 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 821 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 822 uint8_t *lut; 823 uint16_t i, idx, shift; 824 int ret; 825 826 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 827 return -ENOTSUP; 828 829 if (reta_size != vf->vf_res->rss_lut_size) { 830 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 831 "(%d) doesn't match the number of hardware can " 832 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 833 return -EINVAL; 834 } 835 836 lut = rte_zmalloc("rss_lut", reta_size, 0); 837 if (!lut) { 838 PMD_DRV_LOG(ERR, "No memory can be allocated"); 839 return -ENOMEM; 840 } 841 /* store the old lut table temporarily */ 842 rte_memcpy(lut, vf->rss_lut, reta_size); 843 844 for (i = 0; i < reta_size; i++) { 845 idx = i / RTE_RETA_GROUP_SIZE; 846 shift = i % RTE_RETA_GROUP_SIZE; 847 if (reta_conf[idx].mask & (1ULL << shift)) 848 lut[i] = reta_conf[idx].reta[shift]; 849 } 850 851 rte_memcpy(vf->rss_lut, lut, reta_size); 852 /* send virtchnnl ops to configure rss*/ 853 ret = iavf_configure_rss_lut(adapter); 854 if (ret) /* revert back */ 855 rte_memcpy(vf->rss_lut, lut, reta_size); 856 rte_free(lut); 857 858 return ret; 859 } 860 861 static int 862 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 863 struct rte_eth_rss_reta_entry64 *reta_conf, 864 uint16_t reta_size) 865 { 866 struct iavf_adapter *adapter = 867 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 868 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 869 uint16_t i, idx, shift; 870 871 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 872 return -ENOTSUP; 873 874 if (reta_size != vf->vf_res->rss_lut_size) { 875 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 876 "(%d) doesn't match the number of hardware can " 877 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 878 return -EINVAL; 879 } 880 881 for (i = 0; i < reta_size; i++) { 882 idx = i / RTE_RETA_GROUP_SIZE; 883 shift = i % RTE_RETA_GROUP_SIZE; 884 if (reta_conf[idx].mask & (1ULL << shift)) 885 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 886 } 887 888 return 0; 889 } 890 891 static int 892 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 893 struct rte_eth_rss_conf *rss_conf) 894 { 895 struct iavf_adapter *adapter = 896 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 897 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 898 899 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 900 return -ENOTSUP; 901 902 /* HENA setting, it is enabled by default, no change */ 903 if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) { 904 PMD_DRV_LOG(DEBUG, "No key to be configured"); 905 return 0; 906 } else if (rss_conf->rss_key_len != vf->vf_res->rss_key_size) { 907 PMD_DRV_LOG(ERR, "The size of hash key configured " 908 "(%d) doesn't match the size of hardware can " 909 "support (%d)", rss_conf->rss_key_len, 910 vf->vf_res->rss_key_size); 911 return -EINVAL; 912 } 913 914 rte_memcpy(vf->rss_key, rss_conf->rss_key, rss_conf->rss_key_len); 915 916 return iavf_configure_rss_key(adapter); 917 } 918 919 static int 920 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 921 struct rte_eth_rss_conf *rss_conf) 922 { 923 struct iavf_adapter *adapter = 924 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 925 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 926 927 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 928 return -ENOTSUP; 929 930 /* Just set it to default value now. */ 931 rss_conf->rss_hf = IAVF_RSS_OFFLOAD_ALL; 932 933 if (!rss_conf->rss_key) 934 return 0; 935 936 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 937 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 938 939 return 0; 940 } 941 942 static int 943 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 944 { 945 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 946 int ret = 0; 947 948 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 949 return -EINVAL; 950 951 /* mtu setting is forbidden if port is start */ 952 if (dev->data->dev_started) { 953 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 954 return -EBUSY; 955 } 956 957 if (frame_size > RTE_ETHER_MAX_LEN) 958 dev->data->dev_conf.rxmode.offloads |= 959 DEV_RX_OFFLOAD_JUMBO_FRAME; 960 else 961 dev->data->dev_conf.rxmode.offloads &= 962 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 963 964 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 965 966 return ret; 967 } 968 969 static int 970 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 971 struct rte_ether_addr *mac_addr) 972 { 973 struct iavf_adapter *adapter = 974 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 975 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 976 struct rte_ether_addr *perm_addr, *old_addr; 977 int ret; 978 979 old_addr = (struct rte_ether_addr *)hw->mac.addr; 980 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 981 982 if (rte_is_same_ether_addr(mac_addr, old_addr)) 983 return 0; 984 985 /* If the MAC address is configured by host, skip the setting */ 986 if (rte_is_valid_assigned_ether_addr(perm_addr)) 987 return -EPERM; 988 989 ret = iavf_add_del_eth_addr(adapter, old_addr, FALSE); 990 if (ret) 991 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 992 " %02X:%02X:%02X:%02X:%02X:%02X", 993 old_addr->addr_bytes[0], 994 old_addr->addr_bytes[1], 995 old_addr->addr_bytes[2], 996 old_addr->addr_bytes[3], 997 old_addr->addr_bytes[4], 998 old_addr->addr_bytes[5]); 999 1000 ret = iavf_add_del_eth_addr(adapter, mac_addr, TRUE); 1001 if (ret) 1002 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 1003 " %02X:%02X:%02X:%02X:%02X:%02X", 1004 mac_addr->addr_bytes[0], 1005 mac_addr->addr_bytes[1], 1006 mac_addr->addr_bytes[2], 1007 mac_addr->addr_bytes[3], 1008 mac_addr->addr_bytes[4], 1009 mac_addr->addr_bytes[5]); 1010 1011 if (ret) 1012 return -EIO; 1013 1014 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1015 return 0; 1016 } 1017 1018 static void 1019 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1020 { 1021 if (*stat >= *offset) 1022 *stat = *stat - *offset; 1023 else 1024 *stat = (uint64_t)((*stat + 1025 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1026 1027 *stat &= IAVF_48_BIT_MASK; 1028 } 1029 1030 static void 1031 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1032 { 1033 if (*stat >= *offset) 1034 *stat = (uint64_t)(*stat - *offset); 1035 else 1036 *stat = (uint64_t)((*stat + 1037 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1038 } 1039 1040 static void 1041 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1042 { 1043 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1044 1045 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1046 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1047 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1048 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1049 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1050 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1051 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1052 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1053 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1054 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1055 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1056 } 1057 1058 static int 1059 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1060 { 1061 struct iavf_adapter *adapter = 1062 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1063 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1064 struct iavf_vsi *vsi = &vf->vsi; 1065 struct virtchnl_eth_stats *pstats = NULL; 1066 int ret; 1067 1068 ret = iavf_query_stats(adapter, &pstats); 1069 if (ret == 0) { 1070 iavf_update_stats(vsi, pstats); 1071 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1072 pstats->rx_broadcast; 1073 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1074 pstats->tx_unicast; 1075 stats->imissed = pstats->rx_discards; 1076 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1077 stats->ibytes = pstats->rx_bytes; 1078 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 1079 stats->obytes = pstats->tx_bytes; 1080 } else { 1081 PMD_DRV_LOG(ERR, "Get statistics failed"); 1082 } 1083 return -EIO; 1084 } 1085 1086 static int 1087 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1088 { 1089 int ret; 1090 struct iavf_adapter *adapter = 1091 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1092 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1093 struct iavf_vsi *vsi = &vf->vsi; 1094 struct virtchnl_eth_stats *pstats = NULL; 1095 1096 /* read stat values to clear hardware registers */ 1097 ret = iavf_query_stats(adapter, &pstats); 1098 if (ret != 0) 1099 return ret; 1100 1101 /* set stats offset base on current values */ 1102 vsi->eth_stats_offset = *pstats; 1103 1104 return 0; 1105 } 1106 1107 static int 1108 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1109 { 1110 struct iavf_adapter *adapter = 1111 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1112 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1113 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1114 uint16_t msix_intr; 1115 1116 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1117 if (msix_intr == IAVF_MISC_VEC_ID) { 1118 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1119 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, 1120 IAVFINT_DYN_CTL01_INTENA_MASK | 1121 IAVFINT_DYN_CTL01_CLEARPBA_MASK | 1122 IAVFINT_DYN_CTL01_ITR_INDX_MASK); 1123 } else { 1124 IAVF_WRITE_REG(hw, 1125 IAVFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1126 IAVFINT_DYN_CTLN1_INTENA_MASK | 1127 IAVFINT_DYN_CTL01_CLEARPBA_MASK | 1128 IAVFINT_DYN_CTLN1_ITR_INDX_MASK); 1129 } 1130 1131 IAVF_WRITE_FLUSH(hw); 1132 1133 rte_intr_ack(&pci_dev->intr_handle); 1134 1135 return 0; 1136 } 1137 1138 static int 1139 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1140 { 1141 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1142 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1143 uint16_t msix_intr; 1144 1145 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1146 if (msix_intr == IAVF_MISC_VEC_ID) { 1147 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1148 return -EIO; 1149 } 1150 1151 IAVF_WRITE_REG(hw, 1152 IAVFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1153 0); 1154 1155 IAVF_WRITE_FLUSH(hw); 1156 return 0; 1157 } 1158 1159 static int 1160 iavf_check_vf_reset_done(struct iavf_hw *hw) 1161 { 1162 int i, reset; 1163 1164 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1165 reset = IAVF_READ_REG(hw, IAVFGEN_RSTAT) & 1166 IAVFGEN_RSTAT_VFR_STATE_MASK; 1167 reset = reset >> IAVFGEN_RSTAT_VFR_STATE_SHIFT; 1168 if (reset == VIRTCHNL_VFR_VFACTIVE || 1169 reset == VIRTCHNL_VFR_COMPLETED) 1170 break; 1171 rte_delay_ms(20); 1172 } 1173 1174 if (i >= IAVF_RESET_WAIT_CNT) 1175 return -1; 1176 1177 return 0; 1178 } 1179 1180 static int 1181 iavf_init_vf(struct rte_eth_dev *dev) 1182 { 1183 int err, bufsz; 1184 struct iavf_adapter *adapter = 1185 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1186 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1187 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1188 1189 err = iavf_set_mac_type(hw); 1190 if (err) { 1191 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1192 goto err; 1193 } 1194 1195 err = iavf_check_vf_reset_done(hw); 1196 if (err) { 1197 PMD_INIT_LOG(ERR, "VF is still resetting"); 1198 goto err; 1199 } 1200 1201 iavf_init_adminq_parameter(hw); 1202 err = iavf_init_adminq(hw); 1203 if (err) { 1204 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1205 goto err; 1206 } 1207 1208 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1209 if (!vf->aq_resp) { 1210 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1211 goto err_aq; 1212 } 1213 if (iavf_check_api_version(adapter) != 0) { 1214 PMD_INIT_LOG(ERR, "check_api version failed"); 1215 goto err_api; 1216 } 1217 1218 bufsz = sizeof(struct virtchnl_vf_resource) + 1219 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1220 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1221 if (!vf->vf_res) { 1222 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1223 goto err_api; 1224 } 1225 if (iavf_get_vf_resource(adapter) != 0) { 1226 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1227 goto err_alloc; 1228 } 1229 /* Allocate memort for RSS info */ 1230 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1231 vf->rss_key = rte_zmalloc("rss_key", 1232 vf->vf_res->rss_key_size, 0); 1233 if (!vf->rss_key) { 1234 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1235 goto err_rss; 1236 } 1237 vf->rss_lut = rte_zmalloc("rss_lut", 1238 vf->vf_res->rss_lut_size, 0); 1239 if (!vf->rss_lut) { 1240 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1241 goto err_rss; 1242 } 1243 } 1244 return 0; 1245 err_rss: 1246 rte_free(vf->rss_key); 1247 rte_free(vf->rss_lut); 1248 err_alloc: 1249 rte_free(vf->vf_res); 1250 vf->vsi_res = NULL; 1251 err_api: 1252 rte_free(vf->aq_resp); 1253 err_aq: 1254 iavf_shutdown_adminq(hw); 1255 err: 1256 return -1; 1257 } 1258 1259 /* Enable default admin queue interrupt setting */ 1260 static inline void 1261 iavf_enable_irq0(struct iavf_hw *hw) 1262 { 1263 /* Enable admin queue interrupt trigger */ 1264 IAVF_WRITE_REG(hw, IAVFINT_ICR0_ENA1, IAVFINT_ICR0_ENA1_ADMINQ_MASK); 1265 1266 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, IAVFINT_DYN_CTL01_INTENA_MASK | 1267 IAVFINT_DYN_CTL01_CLEARPBA_MASK | IAVFINT_DYN_CTL01_ITR_INDX_MASK); 1268 1269 IAVF_WRITE_FLUSH(hw); 1270 } 1271 1272 static inline void 1273 iavf_disable_irq0(struct iavf_hw *hw) 1274 { 1275 /* Disable all interrupt types */ 1276 IAVF_WRITE_REG(hw, IAVFINT_ICR0_ENA1, 0); 1277 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, 1278 IAVFINT_DYN_CTL01_ITR_INDX_MASK); 1279 IAVF_WRITE_FLUSH(hw); 1280 } 1281 1282 static void 1283 iavf_dev_interrupt_handler(void *param) 1284 { 1285 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1286 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1287 1288 iavf_disable_irq0(hw); 1289 1290 iavf_handle_virtchnl_msg(dev); 1291 1292 iavf_enable_irq0(hw); 1293 } 1294 1295 static int 1296 iavf_dev_init(struct rte_eth_dev *eth_dev) 1297 { 1298 struct iavf_adapter *adapter = 1299 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1300 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1301 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1302 1303 PMD_INIT_FUNC_TRACE(); 1304 1305 /* assign ops func pointer */ 1306 eth_dev->dev_ops = &iavf_eth_dev_ops; 1307 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 1308 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 1309 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 1310 1311 /* For secondary processes, we don't initialise any further as primary 1312 * has already done this work. Only check if we need a different RX 1313 * and TX function. 1314 */ 1315 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1316 iavf_set_rx_function(eth_dev); 1317 iavf_set_tx_function(eth_dev); 1318 return 0; 1319 } 1320 rte_eth_copy_pci_info(eth_dev, pci_dev); 1321 1322 hw->vendor_id = pci_dev->id.vendor_id; 1323 hw->device_id = pci_dev->id.device_id; 1324 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 1325 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 1326 hw->bus.bus_id = pci_dev->addr.bus; 1327 hw->bus.device = pci_dev->addr.devid; 1328 hw->bus.func = pci_dev->addr.function; 1329 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 1330 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1331 adapter->eth_dev = eth_dev; 1332 1333 if (iavf_init_vf(eth_dev) != 0) { 1334 PMD_INIT_LOG(ERR, "Init vf failed"); 1335 return -1; 1336 } 1337 1338 /* copy mac addr */ 1339 eth_dev->data->mac_addrs = rte_zmalloc( 1340 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 1341 if (!eth_dev->data->mac_addrs) { 1342 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 1343 " store MAC addresses", 1344 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 1345 return -ENOMEM; 1346 } 1347 /* If the MAC address is not configured by host, 1348 * generate a random one. 1349 */ 1350 if (!rte_is_valid_assigned_ether_addr( 1351 (struct rte_ether_addr *)hw->mac.addr)) 1352 rte_eth_random_addr(hw->mac.addr); 1353 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 1354 ð_dev->data->mac_addrs[0]); 1355 1356 /* register callback func to eal lib */ 1357 rte_intr_callback_register(&pci_dev->intr_handle, 1358 iavf_dev_interrupt_handler, 1359 (void *)eth_dev); 1360 1361 /* enable uio intr after callback register */ 1362 rte_intr_enable(&pci_dev->intr_handle); 1363 1364 /* configure and enable device interrupt */ 1365 iavf_enable_irq0(hw); 1366 1367 return 0; 1368 } 1369 1370 static void 1371 iavf_dev_close(struct rte_eth_dev *dev) 1372 { 1373 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1374 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1375 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 1376 1377 iavf_dev_stop(dev); 1378 iavf_shutdown_adminq(hw); 1379 /* disable uio intr before callback unregister */ 1380 rte_intr_disable(intr_handle); 1381 1382 /* unregister callback func from eal lib */ 1383 rte_intr_callback_unregister(intr_handle, 1384 iavf_dev_interrupt_handler, dev); 1385 iavf_disable_irq0(hw); 1386 } 1387 1388 static int 1389 iavf_dev_uninit(struct rte_eth_dev *dev) 1390 { 1391 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1392 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1393 1394 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1395 return -EPERM; 1396 1397 dev->dev_ops = NULL; 1398 dev->rx_pkt_burst = NULL; 1399 dev->tx_pkt_burst = NULL; 1400 if (hw->adapter_stopped == 0) 1401 iavf_dev_close(dev); 1402 1403 rte_free(vf->vf_res); 1404 vf->vsi_res = NULL; 1405 vf->vf_res = NULL; 1406 1407 rte_free(vf->aq_resp); 1408 vf->aq_resp = NULL; 1409 1410 if (vf->rss_lut) { 1411 rte_free(vf->rss_lut); 1412 vf->rss_lut = NULL; 1413 } 1414 if (vf->rss_key) { 1415 rte_free(vf->rss_key); 1416 vf->rss_key = NULL; 1417 } 1418 1419 return 0; 1420 } 1421 1422 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1423 struct rte_pci_device *pci_dev) 1424 { 1425 return rte_eth_dev_pci_generic_probe(pci_dev, 1426 sizeof(struct iavf_adapter), iavf_dev_init); 1427 } 1428 1429 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 1430 { 1431 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 1432 } 1433 1434 /* Adaptive virtual function driver struct */ 1435 static struct rte_pci_driver rte_iavf_pmd = { 1436 .id_table = pci_id_iavf_map, 1437 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 1438 .probe = eth_iavf_pci_probe, 1439 .remove = eth_iavf_pci_remove, 1440 }; 1441 1442 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 1443 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 1444 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 1445 RTE_INIT(iavf_init_log) 1446 { 1447 iavf_logtype_init = rte_log_register("pmd.net.iavf.init"); 1448 if (iavf_logtype_init >= 0) 1449 rte_log_set_level(iavf_logtype_init, RTE_LOG_NOTICE); 1450 iavf_logtype_driver = rte_log_register("pmd.net.iavf.driver"); 1451 if (iavf_logtype_driver >= 0) 1452 rte_log_set_level(iavf_logtype_driver, RTE_LOG_NOTICE); 1453 1454 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 1455 iavf_logtype_rx = rte_log_register("pmd.net.iavf.rx"); 1456 if (iavf_logtype_rx >= 0) 1457 rte_log_set_level(iavf_logtype_rx, RTE_LOG_DEBUG); 1458 #endif 1459 1460 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 1461 iavf_logtype_tx = rte_log_register("pmd.net.iavf.tx"); 1462 if (iavf_logtype_tx >= 0) 1463 rte_log_set_level(iavf_logtype_tx, RTE_LOG_DEBUG); 1464 #endif 1465 1466 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 1467 iavf_logtype_tx_free = rte_log_register("pmd.net.iavf.tx_free"); 1468 if (iavf_logtype_tx_free >= 0) 1469 rte_log_set_level(iavf_logtype_tx_free, RTE_LOG_DEBUG); 1470 #endif 1471 } 1472 1473 /* memory func for base code */ 1474 enum iavf_status_code 1475 iavf_allocate_dma_mem_d(__rte_unused struct iavf_hw *hw, 1476 struct iavf_dma_mem *mem, 1477 u64 size, 1478 u32 alignment) 1479 { 1480 const struct rte_memzone *mz = NULL; 1481 char z_name[RTE_MEMZONE_NAMESIZE]; 1482 1483 if (!mem) 1484 return IAVF_ERR_PARAM; 1485 1486 snprintf(z_name, sizeof(z_name), "iavf_dma_%"PRIu64, rte_rand()); 1487 mz = rte_memzone_reserve_bounded(z_name, size, SOCKET_ID_ANY, 1488 RTE_MEMZONE_IOVA_CONTIG, alignment, RTE_PGSIZE_2M); 1489 if (!mz) 1490 return IAVF_ERR_NO_MEMORY; 1491 1492 mem->size = size; 1493 mem->va = mz->addr; 1494 mem->pa = mz->phys_addr; 1495 mem->zone = (const void *)mz; 1496 PMD_DRV_LOG(DEBUG, 1497 "memzone %s allocated with physical address: %"PRIu64, 1498 mz->name, mem->pa); 1499 1500 return IAVF_SUCCESS; 1501 } 1502 1503 enum iavf_status_code 1504 iavf_free_dma_mem_d(__rte_unused struct iavf_hw *hw, 1505 struct iavf_dma_mem *mem) 1506 { 1507 if (!mem) 1508 return IAVF_ERR_PARAM; 1509 1510 PMD_DRV_LOG(DEBUG, 1511 "memzone %s to be freed with physical address: %"PRIu64, 1512 ((const struct rte_memzone *)mem->zone)->name, mem->pa); 1513 rte_memzone_free((const struct rte_memzone *)mem->zone); 1514 mem->zone = NULL; 1515 mem->va = NULL; 1516 mem->pa = (u64)0; 1517 1518 return IAVF_SUCCESS; 1519 } 1520 1521 enum iavf_status_code 1522 iavf_allocate_virt_mem_d(__rte_unused struct iavf_hw *hw, 1523 struct iavf_virt_mem *mem, 1524 u32 size) 1525 { 1526 if (!mem) 1527 return IAVF_ERR_PARAM; 1528 1529 mem->size = size; 1530 mem->va = rte_zmalloc("iavf", size, 0); 1531 1532 if (mem->va) 1533 return IAVF_SUCCESS; 1534 else 1535 return IAVF_ERR_NO_MEMORY; 1536 } 1537 1538 enum iavf_status_code 1539 iavf_free_virt_mem_d(__rte_unused struct iavf_hw *hw, 1540 struct iavf_virt_mem *mem) 1541 { 1542 if (!mem) 1543 return IAVF_ERR_PARAM; 1544 1545 rte_free(mem->va); 1546 mem->va = NULL; 1547 1548 return IAVF_SUCCESS; 1549 } 1550