1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 13 #include <rte_debug.h> 14 #include <rte_ether.h> 15 #include <ethdev_driver.h> 16 #include <rte_log.h> 17 #include <rte_malloc.h> 18 #include <rte_tailq.h> 19 #include <rte_flow_driver.h> 20 #include <rte_bitmap.h> 21 22 #include "i40e_logs.h" 23 #include "base/i40e_type.h" 24 #include "base/i40e_prototype.h" 25 #include "i40e_ethdev.h" 26 #include "i40e_hash.h" 27 28 #define I40E_IPV6_TC_MASK (0xFF << I40E_FDIR_IPv6_TC_OFFSET) 29 #define I40E_IPV6_FRAG_HEADER 44 30 #define I40E_TENANT_ARRAY_NUM 3 31 #define I40E_VLAN_TCI_MASK 0xFFFF 32 #define I40E_VLAN_PRI_MASK 0xE000 33 #define I40E_VLAN_CFI_MASK 0x1000 34 #define I40E_VLAN_VID_MASK 0x0FFF 35 36 static int i40e_flow_validate(struct rte_eth_dev *dev, 37 const struct rte_flow_attr *attr, 38 const struct rte_flow_item pattern[], 39 const struct rte_flow_action actions[], 40 struct rte_flow_error *error); 41 static struct rte_flow *i40e_flow_create(struct rte_eth_dev *dev, 42 const struct rte_flow_attr *attr, 43 const struct rte_flow_item pattern[], 44 const struct rte_flow_action actions[], 45 struct rte_flow_error *error); 46 static int i40e_flow_destroy(struct rte_eth_dev *dev, 47 struct rte_flow *flow, 48 struct rte_flow_error *error); 49 static int i40e_flow_flush(struct rte_eth_dev *dev, 50 struct rte_flow_error *error); 51 static int i40e_flow_query(struct rte_eth_dev *dev, 52 struct rte_flow *flow, 53 const struct rte_flow_action *actions, 54 void *data, struct rte_flow_error *error); 55 static int 56 i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, 57 const struct rte_flow_item *pattern, 58 struct rte_flow_error *error, 59 struct rte_eth_ethertype_filter *filter); 60 static int i40e_flow_parse_ethertype_action(struct rte_eth_dev *dev, 61 const struct rte_flow_action *actions, 62 struct rte_flow_error *error, 63 struct rte_eth_ethertype_filter *filter); 64 static int i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, 65 const struct rte_flow_attr *attr, 66 const struct rte_flow_item *pattern, 67 struct rte_flow_error *error, 68 struct i40e_fdir_filter_conf *filter); 69 static int i40e_flow_parse_fdir_action(struct rte_eth_dev *dev, 70 const struct rte_flow_action *actions, 71 struct rte_flow_error *error, 72 struct i40e_fdir_filter_conf *filter); 73 static int i40e_flow_parse_tunnel_action(struct rte_eth_dev *dev, 74 const struct rte_flow_action *actions, 75 struct rte_flow_error *error, 76 struct i40e_tunnel_filter_conf *filter); 77 static int i40e_flow_parse_attr(const struct rte_flow_attr *attr, 78 struct rte_flow_error *error); 79 static int i40e_flow_parse_ethertype_filter(struct rte_eth_dev *dev, 80 const struct rte_flow_attr *attr, 81 const struct rte_flow_item pattern[], 82 const struct rte_flow_action actions[], 83 struct rte_flow_error *error, 84 union i40e_filter_t *filter); 85 static int i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev, 86 const struct rte_flow_attr *attr, 87 const struct rte_flow_item pattern[], 88 const struct rte_flow_action actions[], 89 struct rte_flow_error *error, 90 union i40e_filter_t *filter); 91 static int i40e_flow_parse_vxlan_filter(struct rte_eth_dev *dev, 92 const struct rte_flow_attr *attr, 93 const struct rte_flow_item pattern[], 94 const struct rte_flow_action actions[], 95 struct rte_flow_error *error, 96 union i40e_filter_t *filter); 97 static int i40e_flow_parse_nvgre_filter(struct rte_eth_dev *dev, 98 const struct rte_flow_attr *attr, 99 const struct rte_flow_item pattern[], 100 const struct rte_flow_action actions[], 101 struct rte_flow_error *error, 102 union i40e_filter_t *filter); 103 static int i40e_flow_parse_mpls_filter(struct rte_eth_dev *dev, 104 const struct rte_flow_attr *attr, 105 const struct rte_flow_item pattern[], 106 const struct rte_flow_action actions[], 107 struct rte_flow_error *error, 108 union i40e_filter_t *filter); 109 static int i40e_flow_parse_gtp_filter(struct rte_eth_dev *dev, 110 const struct rte_flow_attr *attr, 111 const struct rte_flow_item pattern[], 112 const struct rte_flow_action actions[], 113 struct rte_flow_error *error, 114 union i40e_filter_t *filter); 115 static int i40e_flow_destroy_ethertype_filter(struct i40e_pf *pf, 116 struct i40e_ethertype_filter *filter); 117 static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, 118 struct i40e_tunnel_filter *filter); 119 static int i40e_flow_flush_fdir_filter(struct i40e_pf *pf); 120 static int i40e_flow_flush_ethertype_filter(struct i40e_pf *pf); 121 static int i40e_flow_flush_tunnel_filter(struct i40e_pf *pf); 122 static int 123 i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev, 124 const struct rte_flow_attr *attr, 125 const struct rte_flow_item pattern[], 126 const struct rte_flow_action actions[], 127 struct rte_flow_error *error, 128 union i40e_filter_t *filter); 129 static int 130 i40e_flow_parse_qinq_pattern(struct rte_eth_dev *dev, 131 const struct rte_flow_item *pattern, 132 struct rte_flow_error *error, 133 struct i40e_tunnel_filter_conf *filter); 134 135 static int i40e_flow_parse_l4_cloud_filter(struct rte_eth_dev *dev, 136 const struct rte_flow_attr *attr, 137 const struct rte_flow_item pattern[], 138 const struct rte_flow_action actions[], 139 struct rte_flow_error *error, 140 union i40e_filter_t *filter); 141 const struct rte_flow_ops i40e_flow_ops = { 142 .validate = i40e_flow_validate, 143 .create = i40e_flow_create, 144 .destroy = i40e_flow_destroy, 145 .flush = i40e_flow_flush, 146 .query = i40e_flow_query, 147 }; 148 149 static union i40e_filter_t cons_filter; 150 static enum rte_filter_type cons_filter_type = RTE_ETH_FILTER_NONE; 151 /* internal pattern w/o VOID items */ 152 struct rte_flow_item g_items[32]; 153 154 /* Pattern matched ethertype filter */ 155 static enum rte_flow_item_type pattern_ethertype[] = { 156 RTE_FLOW_ITEM_TYPE_ETH, 157 RTE_FLOW_ITEM_TYPE_END, 158 }; 159 160 /* Pattern matched flow director filter */ 161 static enum rte_flow_item_type pattern_fdir_ipv4[] = { 162 RTE_FLOW_ITEM_TYPE_ETH, 163 RTE_FLOW_ITEM_TYPE_IPV4, 164 RTE_FLOW_ITEM_TYPE_END, 165 }; 166 167 static enum rte_flow_item_type pattern_fdir_ipv4_udp[] = { 168 RTE_FLOW_ITEM_TYPE_ETH, 169 RTE_FLOW_ITEM_TYPE_IPV4, 170 RTE_FLOW_ITEM_TYPE_UDP, 171 RTE_FLOW_ITEM_TYPE_END, 172 }; 173 174 static enum rte_flow_item_type pattern_fdir_ipv4_tcp[] = { 175 RTE_FLOW_ITEM_TYPE_ETH, 176 RTE_FLOW_ITEM_TYPE_IPV4, 177 RTE_FLOW_ITEM_TYPE_TCP, 178 RTE_FLOW_ITEM_TYPE_END, 179 }; 180 181 static enum rte_flow_item_type pattern_fdir_ipv4_sctp[] = { 182 RTE_FLOW_ITEM_TYPE_ETH, 183 RTE_FLOW_ITEM_TYPE_IPV4, 184 RTE_FLOW_ITEM_TYPE_SCTP, 185 RTE_FLOW_ITEM_TYPE_END, 186 }; 187 188 static enum rte_flow_item_type pattern_fdir_ipv4_gtpc[] = { 189 RTE_FLOW_ITEM_TYPE_ETH, 190 RTE_FLOW_ITEM_TYPE_IPV4, 191 RTE_FLOW_ITEM_TYPE_UDP, 192 RTE_FLOW_ITEM_TYPE_GTPC, 193 RTE_FLOW_ITEM_TYPE_END, 194 }; 195 196 static enum rte_flow_item_type pattern_fdir_ipv4_gtpu[] = { 197 RTE_FLOW_ITEM_TYPE_ETH, 198 RTE_FLOW_ITEM_TYPE_IPV4, 199 RTE_FLOW_ITEM_TYPE_UDP, 200 RTE_FLOW_ITEM_TYPE_GTPU, 201 RTE_FLOW_ITEM_TYPE_END, 202 }; 203 204 static enum rte_flow_item_type pattern_fdir_ipv4_gtpu_ipv4[] = { 205 RTE_FLOW_ITEM_TYPE_ETH, 206 RTE_FLOW_ITEM_TYPE_IPV4, 207 RTE_FLOW_ITEM_TYPE_UDP, 208 RTE_FLOW_ITEM_TYPE_GTPU, 209 RTE_FLOW_ITEM_TYPE_IPV4, 210 RTE_FLOW_ITEM_TYPE_END, 211 }; 212 213 static enum rte_flow_item_type pattern_fdir_ipv4_gtpu_ipv6[] = { 214 RTE_FLOW_ITEM_TYPE_ETH, 215 RTE_FLOW_ITEM_TYPE_IPV4, 216 RTE_FLOW_ITEM_TYPE_UDP, 217 RTE_FLOW_ITEM_TYPE_GTPU, 218 RTE_FLOW_ITEM_TYPE_IPV6, 219 RTE_FLOW_ITEM_TYPE_END, 220 }; 221 222 static enum rte_flow_item_type pattern_fdir_ipv6[] = { 223 RTE_FLOW_ITEM_TYPE_ETH, 224 RTE_FLOW_ITEM_TYPE_IPV6, 225 RTE_FLOW_ITEM_TYPE_END, 226 }; 227 228 static enum rte_flow_item_type pattern_fdir_ipv6_udp[] = { 229 RTE_FLOW_ITEM_TYPE_ETH, 230 RTE_FLOW_ITEM_TYPE_IPV6, 231 RTE_FLOW_ITEM_TYPE_UDP, 232 RTE_FLOW_ITEM_TYPE_END, 233 }; 234 235 static enum rte_flow_item_type pattern_fdir_ipv6_tcp[] = { 236 RTE_FLOW_ITEM_TYPE_ETH, 237 RTE_FLOW_ITEM_TYPE_IPV6, 238 RTE_FLOW_ITEM_TYPE_TCP, 239 RTE_FLOW_ITEM_TYPE_END, 240 }; 241 242 static enum rte_flow_item_type pattern_fdir_ipv6_sctp[] = { 243 RTE_FLOW_ITEM_TYPE_ETH, 244 RTE_FLOW_ITEM_TYPE_IPV6, 245 RTE_FLOW_ITEM_TYPE_SCTP, 246 RTE_FLOW_ITEM_TYPE_END, 247 }; 248 249 static enum rte_flow_item_type pattern_fdir_ipv6_gtpc[] = { 250 RTE_FLOW_ITEM_TYPE_ETH, 251 RTE_FLOW_ITEM_TYPE_IPV6, 252 RTE_FLOW_ITEM_TYPE_UDP, 253 RTE_FLOW_ITEM_TYPE_GTPC, 254 RTE_FLOW_ITEM_TYPE_END, 255 }; 256 257 static enum rte_flow_item_type pattern_fdir_ipv6_gtpu[] = { 258 RTE_FLOW_ITEM_TYPE_ETH, 259 RTE_FLOW_ITEM_TYPE_IPV6, 260 RTE_FLOW_ITEM_TYPE_UDP, 261 RTE_FLOW_ITEM_TYPE_GTPU, 262 RTE_FLOW_ITEM_TYPE_END, 263 }; 264 265 static enum rte_flow_item_type pattern_fdir_ipv6_gtpu_ipv4[] = { 266 RTE_FLOW_ITEM_TYPE_ETH, 267 RTE_FLOW_ITEM_TYPE_IPV6, 268 RTE_FLOW_ITEM_TYPE_UDP, 269 RTE_FLOW_ITEM_TYPE_GTPU, 270 RTE_FLOW_ITEM_TYPE_IPV4, 271 RTE_FLOW_ITEM_TYPE_END, 272 }; 273 274 static enum rte_flow_item_type pattern_fdir_ipv6_gtpu_ipv6[] = { 275 RTE_FLOW_ITEM_TYPE_ETH, 276 RTE_FLOW_ITEM_TYPE_IPV6, 277 RTE_FLOW_ITEM_TYPE_UDP, 278 RTE_FLOW_ITEM_TYPE_GTPU, 279 RTE_FLOW_ITEM_TYPE_IPV6, 280 RTE_FLOW_ITEM_TYPE_END, 281 }; 282 283 static enum rte_flow_item_type pattern_fdir_ethertype_raw_1[] = { 284 RTE_FLOW_ITEM_TYPE_ETH, 285 RTE_FLOW_ITEM_TYPE_RAW, 286 RTE_FLOW_ITEM_TYPE_END, 287 }; 288 289 static enum rte_flow_item_type pattern_fdir_ethertype_raw_2[] = { 290 RTE_FLOW_ITEM_TYPE_ETH, 291 RTE_FLOW_ITEM_TYPE_RAW, 292 RTE_FLOW_ITEM_TYPE_RAW, 293 RTE_FLOW_ITEM_TYPE_END, 294 }; 295 296 static enum rte_flow_item_type pattern_fdir_ethertype_raw_3[] = { 297 RTE_FLOW_ITEM_TYPE_ETH, 298 RTE_FLOW_ITEM_TYPE_RAW, 299 RTE_FLOW_ITEM_TYPE_RAW, 300 RTE_FLOW_ITEM_TYPE_RAW, 301 RTE_FLOW_ITEM_TYPE_END, 302 }; 303 304 static enum rte_flow_item_type pattern_fdir_ipv4_raw_1[] = { 305 RTE_FLOW_ITEM_TYPE_ETH, 306 RTE_FLOW_ITEM_TYPE_IPV4, 307 RTE_FLOW_ITEM_TYPE_RAW, 308 RTE_FLOW_ITEM_TYPE_END, 309 }; 310 311 static enum rte_flow_item_type pattern_fdir_ipv4_raw_2[] = { 312 RTE_FLOW_ITEM_TYPE_ETH, 313 RTE_FLOW_ITEM_TYPE_IPV4, 314 RTE_FLOW_ITEM_TYPE_RAW, 315 RTE_FLOW_ITEM_TYPE_RAW, 316 RTE_FLOW_ITEM_TYPE_END, 317 }; 318 319 static enum rte_flow_item_type pattern_fdir_ipv4_raw_3[] = { 320 RTE_FLOW_ITEM_TYPE_ETH, 321 RTE_FLOW_ITEM_TYPE_IPV4, 322 RTE_FLOW_ITEM_TYPE_RAW, 323 RTE_FLOW_ITEM_TYPE_RAW, 324 RTE_FLOW_ITEM_TYPE_RAW, 325 RTE_FLOW_ITEM_TYPE_END, 326 }; 327 328 static enum rte_flow_item_type pattern_fdir_ipv4_udp_raw_1[] = { 329 RTE_FLOW_ITEM_TYPE_ETH, 330 RTE_FLOW_ITEM_TYPE_IPV4, 331 RTE_FLOW_ITEM_TYPE_UDP, 332 RTE_FLOW_ITEM_TYPE_RAW, 333 RTE_FLOW_ITEM_TYPE_END, 334 }; 335 336 static enum rte_flow_item_type pattern_fdir_ipv4_udp_raw_2[] = { 337 RTE_FLOW_ITEM_TYPE_ETH, 338 RTE_FLOW_ITEM_TYPE_IPV4, 339 RTE_FLOW_ITEM_TYPE_UDP, 340 RTE_FLOW_ITEM_TYPE_RAW, 341 RTE_FLOW_ITEM_TYPE_RAW, 342 RTE_FLOW_ITEM_TYPE_END, 343 }; 344 345 static enum rte_flow_item_type pattern_fdir_ipv4_udp_raw_3[] = { 346 RTE_FLOW_ITEM_TYPE_ETH, 347 RTE_FLOW_ITEM_TYPE_IPV4, 348 RTE_FLOW_ITEM_TYPE_UDP, 349 RTE_FLOW_ITEM_TYPE_RAW, 350 RTE_FLOW_ITEM_TYPE_RAW, 351 RTE_FLOW_ITEM_TYPE_RAW, 352 RTE_FLOW_ITEM_TYPE_END, 353 }; 354 355 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_raw_1[] = { 356 RTE_FLOW_ITEM_TYPE_ETH, 357 RTE_FLOW_ITEM_TYPE_IPV4, 358 RTE_FLOW_ITEM_TYPE_TCP, 359 RTE_FLOW_ITEM_TYPE_RAW, 360 RTE_FLOW_ITEM_TYPE_END, 361 }; 362 363 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_raw_2[] = { 364 RTE_FLOW_ITEM_TYPE_ETH, 365 RTE_FLOW_ITEM_TYPE_IPV4, 366 RTE_FLOW_ITEM_TYPE_TCP, 367 RTE_FLOW_ITEM_TYPE_RAW, 368 RTE_FLOW_ITEM_TYPE_RAW, 369 RTE_FLOW_ITEM_TYPE_END, 370 }; 371 372 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_raw_3[] = { 373 RTE_FLOW_ITEM_TYPE_ETH, 374 RTE_FLOW_ITEM_TYPE_IPV4, 375 RTE_FLOW_ITEM_TYPE_TCP, 376 RTE_FLOW_ITEM_TYPE_RAW, 377 RTE_FLOW_ITEM_TYPE_RAW, 378 RTE_FLOW_ITEM_TYPE_RAW, 379 RTE_FLOW_ITEM_TYPE_END, 380 }; 381 382 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_raw_1[] = { 383 RTE_FLOW_ITEM_TYPE_ETH, 384 RTE_FLOW_ITEM_TYPE_IPV4, 385 RTE_FLOW_ITEM_TYPE_SCTP, 386 RTE_FLOW_ITEM_TYPE_RAW, 387 RTE_FLOW_ITEM_TYPE_END, 388 }; 389 390 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_raw_2[] = { 391 RTE_FLOW_ITEM_TYPE_ETH, 392 RTE_FLOW_ITEM_TYPE_IPV4, 393 RTE_FLOW_ITEM_TYPE_SCTP, 394 RTE_FLOW_ITEM_TYPE_RAW, 395 RTE_FLOW_ITEM_TYPE_RAW, 396 RTE_FLOW_ITEM_TYPE_END, 397 }; 398 399 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_raw_3[] = { 400 RTE_FLOW_ITEM_TYPE_ETH, 401 RTE_FLOW_ITEM_TYPE_IPV4, 402 RTE_FLOW_ITEM_TYPE_SCTP, 403 RTE_FLOW_ITEM_TYPE_RAW, 404 RTE_FLOW_ITEM_TYPE_RAW, 405 RTE_FLOW_ITEM_TYPE_RAW, 406 RTE_FLOW_ITEM_TYPE_END, 407 }; 408 409 static enum rte_flow_item_type pattern_fdir_ipv6_raw_1[] = { 410 RTE_FLOW_ITEM_TYPE_ETH, 411 RTE_FLOW_ITEM_TYPE_IPV6, 412 RTE_FLOW_ITEM_TYPE_RAW, 413 RTE_FLOW_ITEM_TYPE_END, 414 }; 415 416 static enum rte_flow_item_type pattern_fdir_ipv6_raw_2[] = { 417 RTE_FLOW_ITEM_TYPE_ETH, 418 RTE_FLOW_ITEM_TYPE_IPV6, 419 RTE_FLOW_ITEM_TYPE_RAW, 420 RTE_FLOW_ITEM_TYPE_RAW, 421 RTE_FLOW_ITEM_TYPE_END, 422 }; 423 424 static enum rte_flow_item_type pattern_fdir_ipv6_raw_3[] = { 425 RTE_FLOW_ITEM_TYPE_ETH, 426 RTE_FLOW_ITEM_TYPE_IPV6, 427 RTE_FLOW_ITEM_TYPE_RAW, 428 RTE_FLOW_ITEM_TYPE_RAW, 429 RTE_FLOW_ITEM_TYPE_RAW, 430 RTE_FLOW_ITEM_TYPE_END, 431 }; 432 433 static enum rte_flow_item_type pattern_fdir_ipv6_udp_raw_1[] = { 434 RTE_FLOW_ITEM_TYPE_ETH, 435 RTE_FLOW_ITEM_TYPE_IPV6, 436 RTE_FLOW_ITEM_TYPE_UDP, 437 RTE_FLOW_ITEM_TYPE_RAW, 438 RTE_FLOW_ITEM_TYPE_END, 439 }; 440 441 static enum rte_flow_item_type pattern_fdir_ipv6_udp_raw_2[] = { 442 RTE_FLOW_ITEM_TYPE_ETH, 443 RTE_FLOW_ITEM_TYPE_IPV6, 444 RTE_FLOW_ITEM_TYPE_UDP, 445 RTE_FLOW_ITEM_TYPE_RAW, 446 RTE_FLOW_ITEM_TYPE_RAW, 447 RTE_FLOW_ITEM_TYPE_END, 448 }; 449 450 static enum rte_flow_item_type pattern_fdir_ipv6_udp_raw_3[] = { 451 RTE_FLOW_ITEM_TYPE_ETH, 452 RTE_FLOW_ITEM_TYPE_IPV6, 453 RTE_FLOW_ITEM_TYPE_UDP, 454 RTE_FLOW_ITEM_TYPE_RAW, 455 RTE_FLOW_ITEM_TYPE_RAW, 456 RTE_FLOW_ITEM_TYPE_RAW, 457 RTE_FLOW_ITEM_TYPE_END, 458 }; 459 460 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_raw_1[] = { 461 RTE_FLOW_ITEM_TYPE_ETH, 462 RTE_FLOW_ITEM_TYPE_IPV6, 463 RTE_FLOW_ITEM_TYPE_TCP, 464 RTE_FLOW_ITEM_TYPE_RAW, 465 RTE_FLOW_ITEM_TYPE_END, 466 }; 467 468 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_raw_2[] = { 469 RTE_FLOW_ITEM_TYPE_ETH, 470 RTE_FLOW_ITEM_TYPE_IPV6, 471 RTE_FLOW_ITEM_TYPE_TCP, 472 RTE_FLOW_ITEM_TYPE_RAW, 473 RTE_FLOW_ITEM_TYPE_RAW, 474 RTE_FLOW_ITEM_TYPE_END, 475 }; 476 477 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_raw_3[] = { 478 RTE_FLOW_ITEM_TYPE_ETH, 479 RTE_FLOW_ITEM_TYPE_IPV6, 480 RTE_FLOW_ITEM_TYPE_TCP, 481 RTE_FLOW_ITEM_TYPE_RAW, 482 RTE_FLOW_ITEM_TYPE_RAW, 483 RTE_FLOW_ITEM_TYPE_RAW, 484 RTE_FLOW_ITEM_TYPE_END, 485 }; 486 487 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_raw_1[] = { 488 RTE_FLOW_ITEM_TYPE_ETH, 489 RTE_FLOW_ITEM_TYPE_IPV6, 490 RTE_FLOW_ITEM_TYPE_SCTP, 491 RTE_FLOW_ITEM_TYPE_RAW, 492 RTE_FLOW_ITEM_TYPE_END, 493 }; 494 495 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_raw_2[] = { 496 RTE_FLOW_ITEM_TYPE_ETH, 497 RTE_FLOW_ITEM_TYPE_IPV6, 498 RTE_FLOW_ITEM_TYPE_SCTP, 499 RTE_FLOW_ITEM_TYPE_RAW, 500 RTE_FLOW_ITEM_TYPE_RAW, 501 RTE_FLOW_ITEM_TYPE_END, 502 }; 503 504 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_raw_3[] = { 505 RTE_FLOW_ITEM_TYPE_ETH, 506 RTE_FLOW_ITEM_TYPE_IPV6, 507 RTE_FLOW_ITEM_TYPE_SCTP, 508 RTE_FLOW_ITEM_TYPE_RAW, 509 RTE_FLOW_ITEM_TYPE_RAW, 510 RTE_FLOW_ITEM_TYPE_RAW, 511 RTE_FLOW_ITEM_TYPE_END, 512 }; 513 514 static enum rte_flow_item_type pattern_fdir_ethertype_vlan[] = { 515 RTE_FLOW_ITEM_TYPE_ETH, 516 RTE_FLOW_ITEM_TYPE_VLAN, 517 RTE_FLOW_ITEM_TYPE_END, 518 }; 519 520 static enum rte_flow_item_type pattern_fdir_vlan_ipv4[] = { 521 RTE_FLOW_ITEM_TYPE_ETH, 522 RTE_FLOW_ITEM_TYPE_VLAN, 523 RTE_FLOW_ITEM_TYPE_IPV4, 524 RTE_FLOW_ITEM_TYPE_END, 525 }; 526 527 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp[] = { 528 RTE_FLOW_ITEM_TYPE_ETH, 529 RTE_FLOW_ITEM_TYPE_VLAN, 530 RTE_FLOW_ITEM_TYPE_IPV4, 531 RTE_FLOW_ITEM_TYPE_UDP, 532 RTE_FLOW_ITEM_TYPE_END, 533 }; 534 535 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp[] = { 536 RTE_FLOW_ITEM_TYPE_ETH, 537 RTE_FLOW_ITEM_TYPE_VLAN, 538 RTE_FLOW_ITEM_TYPE_IPV4, 539 RTE_FLOW_ITEM_TYPE_TCP, 540 RTE_FLOW_ITEM_TYPE_END, 541 }; 542 543 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp[] = { 544 RTE_FLOW_ITEM_TYPE_ETH, 545 RTE_FLOW_ITEM_TYPE_VLAN, 546 RTE_FLOW_ITEM_TYPE_IPV4, 547 RTE_FLOW_ITEM_TYPE_SCTP, 548 RTE_FLOW_ITEM_TYPE_END, 549 }; 550 551 static enum rte_flow_item_type pattern_fdir_vlan_ipv6[] = { 552 RTE_FLOW_ITEM_TYPE_ETH, 553 RTE_FLOW_ITEM_TYPE_VLAN, 554 RTE_FLOW_ITEM_TYPE_IPV6, 555 RTE_FLOW_ITEM_TYPE_END, 556 }; 557 558 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp[] = { 559 RTE_FLOW_ITEM_TYPE_ETH, 560 RTE_FLOW_ITEM_TYPE_VLAN, 561 RTE_FLOW_ITEM_TYPE_IPV6, 562 RTE_FLOW_ITEM_TYPE_UDP, 563 RTE_FLOW_ITEM_TYPE_END, 564 }; 565 566 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp[] = { 567 RTE_FLOW_ITEM_TYPE_ETH, 568 RTE_FLOW_ITEM_TYPE_VLAN, 569 RTE_FLOW_ITEM_TYPE_IPV6, 570 RTE_FLOW_ITEM_TYPE_TCP, 571 RTE_FLOW_ITEM_TYPE_END, 572 }; 573 574 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp[] = { 575 RTE_FLOW_ITEM_TYPE_ETH, 576 RTE_FLOW_ITEM_TYPE_VLAN, 577 RTE_FLOW_ITEM_TYPE_IPV6, 578 RTE_FLOW_ITEM_TYPE_SCTP, 579 RTE_FLOW_ITEM_TYPE_END, 580 }; 581 582 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_raw_1[] = { 583 RTE_FLOW_ITEM_TYPE_ETH, 584 RTE_FLOW_ITEM_TYPE_VLAN, 585 RTE_FLOW_ITEM_TYPE_RAW, 586 RTE_FLOW_ITEM_TYPE_END, 587 }; 588 589 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_raw_2[] = { 590 RTE_FLOW_ITEM_TYPE_ETH, 591 RTE_FLOW_ITEM_TYPE_VLAN, 592 RTE_FLOW_ITEM_TYPE_RAW, 593 RTE_FLOW_ITEM_TYPE_RAW, 594 RTE_FLOW_ITEM_TYPE_END, 595 }; 596 597 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_raw_3[] = { 598 RTE_FLOW_ITEM_TYPE_ETH, 599 RTE_FLOW_ITEM_TYPE_VLAN, 600 RTE_FLOW_ITEM_TYPE_RAW, 601 RTE_FLOW_ITEM_TYPE_RAW, 602 RTE_FLOW_ITEM_TYPE_RAW, 603 RTE_FLOW_ITEM_TYPE_END, 604 }; 605 606 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_raw_1[] = { 607 RTE_FLOW_ITEM_TYPE_ETH, 608 RTE_FLOW_ITEM_TYPE_VLAN, 609 RTE_FLOW_ITEM_TYPE_IPV4, 610 RTE_FLOW_ITEM_TYPE_RAW, 611 RTE_FLOW_ITEM_TYPE_END, 612 }; 613 614 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_raw_2[] = { 615 RTE_FLOW_ITEM_TYPE_ETH, 616 RTE_FLOW_ITEM_TYPE_VLAN, 617 RTE_FLOW_ITEM_TYPE_IPV4, 618 RTE_FLOW_ITEM_TYPE_RAW, 619 RTE_FLOW_ITEM_TYPE_RAW, 620 RTE_FLOW_ITEM_TYPE_END, 621 }; 622 623 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_raw_3[] = { 624 RTE_FLOW_ITEM_TYPE_ETH, 625 RTE_FLOW_ITEM_TYPE_VLAN, 626 RTE_FLOW_ITEM_TYPE_IPV4, 627 RTE_FLOW_ITEM_TYPE_RAW, 628 RTE_FLOW_ITEM_TYPE_RAW, 629 RTE_FLOW_ITEM_TYPE_RAW, 630 RTE_FLOW_ITEM_TYPE_END, 631 }; 632 633 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_raw_1[] = { 634 RTE_FLOW_ITEM_TYPE_ETH, 635 RTE_FLOW_ITEM_TYPE_VLAN, 636 RTE_FLOW_ITEM_TYPE_IPV4, 637 RTE_FLOW_ITEM_TYPE_UDP, 638 RTE_FLOW_ITEM_TYPE_RAW, 639 RTE_FLOW_ITEM_TYPE_END, 640 }; 641 642 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_raw_2[] = { 643 RTE_FLOW_ITEM_TYPE_ETH, 644 RTE_FLOW_ITEM_TYPE_VLAN, 645 RTE_FLOW_ITEM_TYPE_IPV4, 646 RTE_FLOW_ITEM_TYPE_UDP, 647 RTE_FLOW_ITEM_TYPE_RAW, 648 RTE_FLOW_ITEM_TYPE_RAW, 649 RTE_FLOW_ITEM_TYPE_END, 650 }; 651 652 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_raw_3[] = { 653 RTE_FLOW_ITEM_TYPE_ETH, 654 RTE_FLOW_ITEM_TYPE_VLAN, 655 RTE_FLOW_ITEM_TYPE_IPV4, 656 RTE_FLOW_ITEM_TYPE_UDP, 657 RTE_FLOW_ITEM_TYPE_RAW, 658 RTE_FLOW_ITEM_TYPE_RAW, 659 RTE_FLOW_ITEM_TYPE_RAW, 660 RTE_FLOW_ITEM_TYPE_END, 661 }; 662 663 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_raw_1[] = { 664 RTE_FLOW_ITEM_TYPE_ETH, 665 RTE_FLOW_ITEM_TYPE_VLAN, 666 RTE_FLOW_ITEM_TYPE_IPV4, 667 RTE_FLOW_ITEM_TYPE_TCP, 668 RTE_FLOW_ITEM_TYPE_RAW, 669 RTE_FLOW_ITEM_TYPE_END, 670 }; 671 672 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_raw_2[] = { 673 RTE_FLOW_ITEM_TYPE_ETH, 674 RTE_FLOW_ITEM_TYPE_VLAN, 675 RTE_FLOW_ITEM_TYPE_IPV4, 676 RTE_FLOW_ITEM_TYPE_TCP, 677 RTE_FLOW_ITEM_TYPE_RAW, 678 RTE_FLOW_ITEM_TYPE_RAW, 679 RTE_FLOW_ITEM_TYPE_END, 680 }; 681 682 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_raw_3[] = { 683 RTE_FLOW_ITEM_TYPE_ETH, 684 RTE_FLOW_ITEM_TYPE_VLAN, 685 RTE_FLOW_ITEM_TYPE_IPV4, 686 RTE_FLOW_ITEM_TYPE_TCP, 687 RTE_FLOW_ITEM_TYPE_RAW, 688 RTE_FLOW_ITEM_TYPE_RAW, 689 RTE_FLOW_ITEM_TYPE_RAW, 690 RTE_FLOW_ITEM_TYPE_END, 691 }; 692 693 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_raw_1[] = { 694 RTE_FLOW_ITEM_TYPE_ETH, 695 RTE_FLOW_ITEM_TYPE_VLAN, 696 RTE_FLOW_ITEM_TYPE_IPV4, 697 RTE_FLOW_ITEM_TYPE_SCTP, 698 RTE_FLOW_ITEM_TYPE_RAW, 699 RTE_FLOW_ITEM_TYPE_END, 700 }; 701 702 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_raw_2[] = { 703 RTE_FLOW_ITEM_TYPE_ETH, 704 RTE_FLOW_ITEM_TYPE_VLAN, 705 RTE_FLOW_ITEM_TYPE_IPV4, 706 RTE_FLOW_ITEM_TYPE_SCTP, 707 RTE_FLOW_ITEM_TYPE_RAW, 708 RTE_FLOW_ITEM_TYPE_RAW, 709 RTE_FLOW_ITEM_TYPE_END, 710 }; 711 712 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_raw_3[] = { 713 RTE_FLOW_ITEM_TYPE_ETH, 714 RTE_FLOW_ITEM_TYPE_VLAN, 715 RTE_FLOW_ITEM_TYPE_IPV4, 716 RTE_FLOW_ITEM_TYPE_SCTP, 717 RTE_FLOW_ITEM_TYPE_RAW, 718 RTE_FLOW_ITEM_TYPE_RAW, 719 RTE_FLOW_ITEM_TYPE_RAW, 720 RTE_FLOW_ITEM_TYPE_END, 721 }; 722 723 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_raw_1[] = { 724 RTE_FLOW_ITEM_TYPE_ETH, 725 RTE_FLOW_ITEM_TYPE_VLAN, 726 RTE_FLOW_ITEM_TYPE_IPV6, 727 RTE_FLOW_ITEM_TYPE_RAW, 728 RTE_FLOW_ITEM_TYPE_END, 729 }; 730 731 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_raw_2[] = { 732 RTE_FLOW_ITEM_TYPE_ETH, 733 RTE_FLOW_ITEM_TYPE_VLAN, 734 RTE_FLOW_ITEM_TYPE_IPV6, 735 RTE_FLOW_ITEM_TYPE_RAW, 736 RTE_FLOW_ITEM_TYPE_RAW, 737 RTE_FLOW_ITEM_TYPE_END, 738 }; 739 740 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_raw_3[] = { 741 RTE_FLOW_ITEM_TYPE_ETH, 742 RTE_FLOW_ITEM_TYPE_VLAN, 743 RTE_FLOW_ITEM_TYPE_IPV6, 744 RTE_FLOW_ITEM_TYPE_RAW, 745 RTE_FLOW_ITEM_TYPE_RAW, 746 RTE_FLOW_ITEM_TYPE_RAW, 747 RTE_FLOW_ITEM_TYPE_END, 748 }; 749 750 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_raw_1[] = { 751 RTE_FLOW_ITEM_TYPE_ETH, 752 RTE_FLOW_ITEM_TYPE_VLAN, 753 RTE_FLOW_ITEM_TYPE_IPV6, 754 RTE_FLOW_ITEM_TYPE_UDP, 755 RTE_FLOW_ITEM_TYPE_RAW, 756 RTE_FLOW_ITEM_TYPE_END, 757 }; 758 759 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_raw_2[] = { 760 RTE_FLOW_ITEM_TYPE_ETH, 761 RTE_FLOW_ITEM_TYPE_VLAN, 762 RTE_FLOW_ITEM_TYPE_IPV6, 763 RTE_FLOW_ITEM_TYPE_UDP, 764 RTE_FLOW_ITEM_TYPE_RAW, 765 RTE_FLOW_ITEM_TYPE_RAW, 766 RTE_FLOW_ITEM_TYPE_END, 767 }; 768 769 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_raw_3[] = { 770 RTE_FLOW_ITEM_TYPE_ETH, 771 RTE_FLOW_ITEM_TYPE_VLAN, 772 RTE_FLOW_ITEM_TYPE_IPV6, 773 RTE_FLOW_ITEM_TYPE_UDP, 774 RTE_FLOW_ITEM_TYPE_RAW, 775 RTE_FLOW_ITEM_TYPE_RAW, 776 RTE_FLOW_ITEM_TYPE_RAW, 777 RTE_FLOW_ITEM_TYPE_END, 778 }; 779 780 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_raw_1[] = { 781 RTE_FLOW_ITEM_TYPE_ETH, 782 RTE_FLOW_ITEM_TYPE_VLAN, 783 RTE_FLOW_ITEM_TYPE_IPV6, 784 RTE_FLOW_ITEM_TYPE_TCP, 785 RTE_FLOW_ITEM_TYPE_RAW, 786 RTE_FLOW_ITEM_TYPE_END, 787 }; 788 789 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_raw_2[] = { 790 RTE_FLOW_ITEM_TYPE_ETH, 791 RTE_FLOW_ITEM_TYPE_VLAN, 792 RTE_FLOW_ITEM_TYPE_IPV6, 793 RTE_FLOW_ITEM_TYPE_TCP, 794 RTE_FLOW_ITEM_TYPE_RAW, 795 RTE_FLOW_ITEM_TYPE_RAW, 796 RTE_FLOW_ITEM_TYPE_END, 797 }; 798 799 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_raw_3[] = { 800 RTE_FLOW_ITEM_TYPE_ETH, 801 RTE_FLOW_ITEM_TYPE_VLAN, 802 RTE_FLOW_ITEM_TYPE_IPV6, 803 RTE_FLOW_ITEM_TYPE_TCP, 804 RTE_FLOW_ITEM_TYPE_RAW, 805 RTE_FLOW_ITEM_TYPE_RAW, 806 RTE_FLOW_ITEM_TYPE_RAW, 807 RTE_FLOW_ITEM_TYPE_END, 808 }; 809 810 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_raw_1[] = { 811 RTE_FLOW_ITEM_TYPE_ETH, 812 RTE_FLOW_ITEM_TYPE_VLAN, 813 RTE_FLOW_ITEM_TYPE_IPV6, 814 RTE_FLOW_ITEM_TYPE_SCTP, 815 RTE_FLOW_ITEM_TYPE_RAW, 816 RTE_FLOW_ITEM_TYPE_END, 817 }; 818 819 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_raw_2[] = { 820 RTE_FLOW_ITEM_TYPE_ETH, 821 RTE_FLOW_ITEM_TYPE_VLAN, 822 RTE_FLOW_ITEM_TYPE_IPV6, 823 RTE_FLOW_ITEM_TYPE_SCTP, 824 RTE_FLOW_ITEM_TYPE_RAW, 825 RTE_FLOW_ITEM_TYPE_RAW, 826 RTE_FLOW_ITEM_TYPE_END, 827 }; 828 829 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_raw_3[] = { 830 RTE_FLOW_ITEM_TYPE_ETH, 831 RTE_FLOW_ITEM_TYPE_VLAN, 832 RTE_FLOW_ITEM_TYPE_IPV6, 833 RTE_FLOW_ITEM_TYPE_SCTP, 834 RTE_FLOW_ITEM_TYPE_RAW, 835 RTE_FLOW_ITEM_TYPE_RAW, 836 RTE_FLOW_ITEM_TYPE_RAW, 837 RTE_FLOW_ITEM_TYPE_END, 838 }; 839 840 static enum rte_flow_item_type pattern_fdir_ipv4_vf[] = { 841 RTE_FLOW_ITEM_TYPE_ETH, 842 RTE_FLOW_ITEM_TYPE_IPV4, 843 RTE_FLOW_ITEM_TYPE_VF, 844 RTE_FLOW_ITEM_TYPE_END, 845 }; 846 847 static enum rte_flow_item_type pattern_fdir_ipv4_udp_vf[] = { 848 RTE_FLOW_ITEM_TYPE_ETH, 849 RTE_FLOW_ITEM_TYPE_IPV4, 850 RTE_FLOW_ITEM_TYPE_UDP, 851 RTE_FLOW_ITEM_TYPE_VF, 852 RTE_FLOW_ITEM_TYPE_END, 853 }; 854 855 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_vf[] = { 856 RTE_FLOW_ITEM_TYPE_ETH, 857 RTE_FLOW_ITEM_TYPE_IPV4, 858 RTE_FLOW_ITEM_TYPE_TCP, 859 RTE_FLOW_ITEM_TYPE_VF, 860 RTE_FLOW_ITEM_TYPE_END, 861 }; 862 863 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_vf[] = { 864 RTE_FLOW_ITEM_TYPE_ETH, 865 RTE_FLOW_ITEM_TYPE_IPV4, 866 RTE_FLOW_ITEM_TYPE_SCTP, 867 RTE_FLOW_ITEM_TYPE_VF, 868 RTE_FLOW_ITEM_TYPE_END, 869 }; 870 871 static enum rte_flow_item_type pattern_fdir_ipv6_vf[] = { 872 RTE_FLOW_ITEM_TYPE_ETH, 873 RTE_FLOW_ITEM_TYPE_IPV6, 874 RTE_FLOW_ITEM_TYPE_VF, 875 RTE_FLOW_ITEM_TYPE_END, 876 }; 877 878 static enum rte_flow_item_type pattern_fdir_ipv6_udp_vf[] = { 879 RTE_FLOW_ITEM_TYPE_ETH, 880 RTE_FLOW_ITEM_TYPE_IPV6, 881 RTE_FLOW_ITEM_TYPE_UDP, 882 RTE_FLOW_ITEM_TYPE_VF, 883 RTE_FLOW_ITEM_TYPE_END, 884 }; 885 886 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_vf[] = { 887 RTE_FLOW_ITEM_TYPE_ETH, 888 RTE_FLOW_ITEM_TYPE_IPV6, 889 RTE_FLOW_ITEM_TYPE_TCP, 890 RTE_FLOW_ITEM_TYPE_VF, 891 RTE_FLOW_ITEM_TYPE_END, 892 }; 893 894 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_vf[] = { 895 RTE_FLOW_ITEM_TYPE_ETH, 896 RTE_FLOW_ITEM_TYPE_IPV6, 897 RTE_FLOW_ITEM_TYPE_SCTP, 898 RTE_FLOW_ITEM_TYPE_VF, 899 RTE_FLOW_ITEM_TYPE_END, 900 }; 901 902 static enum rte_flow_item_type pattern_fdir_ethertype_raw_1_vf[] = { 903 RTE_FLOW_ITEM_TYPE_ETH, 904 RTE_FLOW_ITEM_TYPE_RAW, 905 RTE_FLOW_ITEM_TYPE_VF, 906 RTE_FLOW_ITEM_TYPE_END, 907 }; 908 909 static enum rte_flow_item_type pattern_fdir_ethertype_raw_2_vf[] = { 910 RTE_FLOW_ITEM_TYPE_ETH, 911 RTE_FLOW_ITEM_TYPE_RAW, 912 RTE_FLOW_ITEM_TYPE_RAW, 913 RTE_FLOW_ITEM_TYPE_VF, 914 RTE_FLOW_ITEM_TYPE_END, 915 }; 916 917 static enum rte_flow_item_type pattern_fdir_ethertype_raw_3_vf[] = { 918 RTE_FLOW_ITEM_TYPE_ETH, 919 RTE_FLOW_ITEM_TYPE_RAW, 920 RTE_FLOW_ITEM_TYPE_RAW, 921 RTE_FLOW_ITEM_TYPE_RAW, 922 RTE_FLOW_ITEM_TYPE_VF, 923 RTE_FLOW_ITEM_TYPE_END, 924 }; 925 926 static enum rte_flow_item_type pattern_fdir_ipv4_raw_1_vf[] = { 927 RTE_FLOW_ITEM_TYPE_ETH, 928 RTE_FLOW_ITEM_TYPE_IPV4, 929 RTE_FLOW_ITEM_TYPE_RAW, 930 RTE_FLOW_ITEM_TYPE_VF, 931 RTE_FLOW_ITEM_TYPE_END, 932 }; 933 934 static enum rte_flow_item_type pattern_fdir_ipv4_raw_2_vf[] = { 935 RTE_FLOW_ITEM_TYPE_ETH, 936 RTE_FLOW_ITEM_TYPE_IPV4, 937 RTE_FLOW_ITEM_TYPE_RAW, 938 RTE_FLOW_ITEM_TYPE_RAW, 939 RTE_FLOW_ITEM_TYPE_VF, 940 RTE_FLOW_ITEM_TYPE_END, 941 }; 942 943 static enum rte_flow_item_type pattern_fdir_ipv4_raw_3_vf[] = { 944 RTE_FLOW_ITEM_TYPE_ETH, 945 RTE_FLOW_ITEM_TYPE_IPV4, 946 RTE_FLOW_ITEM_TYPE_RAW, 947 RTE_FLOW_ITEM_TYPE_RAW, 948 RTE_FLOW_ITEM_TYPE_RAW, 949 RTE_FLOW_ITEM_TYPE_VF, 950 RTE_FLOW_ITEM_TYPE_END, 951 }; 952 953 static enum rte_flow_item_type pattern_fdir_ipv4_udp_raw_1_vf[] = { 954 RTE_FLOW_ITEM_TYPE_ETH, 955 RTE_FLOW_ITEM_TYPE_IPV4, 956 RTE_FLOW_ITEM_TYPE_UDP, 957 RTE_FLOW_ITEM_TYPE_RAW, 958 RTE_FLOW_ITEM_TYPE_VF, 959 RTE_FLOW_ITEM_TYPE_END, 960 }; 961 962 static enum rte_flow_item_type pattern_fdir_ipv4_udp_raw_2_vf[] = { 963 RTE_FLOW_ITEM_TYPE_ETH, 964 RTE_FLOW_ITEM_TYPE_IPV4, 965 RTE_FLOW_ITEM_TYPE_UDP, 966 RTE_FLOW_ITEM_TYPE_RAW, 967 RTE_FLOW_ITEM_TYPE_RAW, 968 RTE_FLOW_ITEM_TYPE_VF, 969 RTE_FLOW_ITEM_TYPE_END, 970 }; 971 972 static enum rte_flow_item_type pattern_fdir_ipv4_udp_raw_3_vf[] = { 973 RTE_FLOW_ITEM_TYPE_ETH, 974 RTE_FLOW_ITEM_TYPE_IPV4, 975 RTE_FLOW_ITEM_TYPE_UDP, 976 RTE_FLOW_ITEM_TYPE_RAW, 977 RTE_FLOW_ITEM_TYPE_RAW, 978 RTE_FLOW_ITEM_TYPE_RAW, 979 RTE_FLOW_ITEM_TYPE_VF, 980 RTE_FLOW_ITEM_TYPE_END, 981 }; 982 983 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_raw_1_vf[] = { 984 RTE_FLOW_ITEM_TYPE_ETH, 985 RTE_FLOW_ITEM_TYPE_IPV4, 986 RTE_FLOW_ITEM_TYPE_TCP, 987 RTE_FLOW_ITEM_TYPE_RAW, 988 RTE_FLOW_ITEM_TYPE_VF, 989 RTE_FLOW_ITEM_TYPE_END, 990 }; 991 992 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_raw_2_vf[] = { 993 RTE_FLOW_ITEM_TYPE_ETH, 994 RTE_FLOW_ITEM_TYPE_IPV4, 995 RTE_FLOW_ITEM_TYPE_TCP, 996 RTE_FLOW_ITEM_TYPE_RAW, 997 RTE_FLOW_ITEM_TYPE_RAW, 998 RTE_FLOW_ITEM_TYPE_VF, 999 RTE_FLOW_ITEM_TYPE_END, 1000 }; 1001 1002 static enum rte_flow_item_type pattern_fdir_ipv4_tcp_raw_3_vf[] = { 1003 RTE_FLOW_ITEM_TYPE_ETH, 1004 RTE_FLOW_ITEM_TYPE_IPV4, 1005 RTE_FLOW_ITEM_TYPE_TCP, 1006 RTE_FLOW_ITEM_TYPE_RAW, 1007 RTE_FLOW_ITEM_TYPE_RAW, 1008 RTE_FLOW_ITEM_TYPE_RAW, 1009 RTE_FLOW_ITEM_TYPE_VF, 1010 RTE_FLOW_ITEM_TYPE_END, 1011 }; 1012 1013 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_raw_1_vf[] = { 1014 RTE_FLOW_ITEM_TYPE_ETH, 1015 RTE_FLOW_ITEM_TYPE_IPV4, 1016 RTE_FLOW_ITEM_TYPE_SCTP, 1017 RTE_FLOW_ITEM_TYPE_RAW, 1018 RTE_FLOW_ITEM_TYPE_VF, 1019 RTE_FLOW_ITEM_TYPE_END, 1020 }; 1021 1022 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_raw_2_vf[] = { 1023 RTE_FLOW_ITEM_TYPE_ETH, 1024 RTE_FLOW_ITEM_TYPE_IPV4, 1025 RTE_FLOW_ITEM_TYPE_SCTP, 1026 RTE_FLOW_ITEM_TYPE_RAW, 1027 RTE_FLOW_ITEM_TYPE_RAW, 1028 RTE_FLOW_ITEM_TYPE_VF, 1029 RTE_FLOW_ITEM_TYPE_END, 1030 }; 1031 1032 static enum rte_flow_item_type pattern_fdir_ipv4_sctp_raw_3_vf[] = { 1033 RTE_FLOW_ITEM_TYPE_ETH, 1034 RTE_FLOW_ITEM_TYPE_IPV4, 1035 RTE_FLOW_ITEM_TYPE_SCTP, 1036 RTE_FLOW_ITEM_TYPE_RAW, 1037 RTE_FLOW_ITEM_TYPE_RAW, 1038 RTE_FLOW_ITEM_TYPE_RAW, 1039 RTE_FLOW_ITEM_TYPE_VF, 1040 RTE_FLOW_ITEM_TYPE_END, 1041 }; 1042 1043 static enum rte_flow_item_type pattern_fdir_ipv6_raw_1_vf[] = { 1044 RTE_FLOW_ITEM_TYPE_ETH, 1045 RTE_FLOW_ITEM_TYPE_IPV6, 1046 RTE_FLOW_ITEM_TYPE_RAW, 1047 RTE_FLOW_ITEM_TYPE_VF, 1048 RTE_FLOW_ITEM_TYPE_END, 1049 }; 1050 1051 static enum rte_flow_item_type pattern_fdir_ipv6_raw_2_vf[] = { 1052 RTE_FLOW_ITEM_TYPE_ETH, 1053 RTE_FLOW_ITEM_TYPE_IPV6, 1054 RTE_FLOW_ITEM_TYPE_RAW, 1055 RTE_FLOW_ITEM_TYPE_RAW, 1056 RTE_FLOW_ITEM_TYPE_VF, 1057 RTE_FLOW_ITEM_TYPE_END, 1058 }; 1059 1060 static enum rte_flow_item_type pattern_fdir_ipv6_raw_3_vf[] = { 1061 RTE_FLOW_ITEM_TYPE_ETH, 1062 RTE_FLOW_ITEM_TYPE_IPV6, 1063 RTE_FLOW_ITEM_TYPE_RAW, 1064 RTE_FLOW_ITEM_TYPE_RAW, 1065 RTE_FLOW_ITEM_TYPE_RAW, 1066 RTE_FLOW_ITEM_TYPE_VF, 1067 RTE_FLOW_ITEM_TYPE_END, 1068 }; 1069 1070 static enum rte_flow_item_type pattern_fdir_ipv6_udp_raw_1_vf[] = { 1071 RTE_FLOW_ITEM_TYPE_ETH, 1072 RTE_FLOW_ITEM_TYPE_IPV6, 1073 RTE_FLOW_ITEM_TYPE_UDP, 1074 RTE_FLOW_ITEM_TYPE_RAW, 1075 RTE_FLOW_ITEM_TYPE_VF, 1076 RTE_FLOW_ITEM_TYPE_END, 1077 }; 1078 1079 static enum rte_flow_item_type pattern_fdir_ipv6_udp_raw_2_vf[] = { 1080 RTE_FLOW_ITEM_TYPE_ETH, 1081 RTE_FLOW_ITEM_TYPE_IPV6, 1082 RTE_FLOW_ITEM_TYPE_UDP, 1083 RTE_FLOW_ITEM_TYPE_RAW, 1084 RTE_FLOW_ITEM_TYPE_RAW, 1085 RTE_FLOW_ITEM_TYPE_VF, 1086 RTE_FLOW_ITEM_TYPE_END, 1087 }; 1088 1089 static enum rte_flow_item_type pattern_fdir_ipv6_udp_raw_3_vf[] = { 1090 RTE_FLOW_ITEM_TYPE_ETH, 1091 RTE_FLOW_ITEM_TYPE_IPV6, 1092 RTE_FLOW_ITEM_TYPE_UDP, 1093 RTE_FLOW_ITEM_TYPE_RAW, 1094 RTE_FLOW_ITEM_TYPE_RAW, 1095 RTE_FLOW_ITEM_TYPE_RAW, 1096 RTE_FLOW_ITEM_TYPE_VF, 1097 RTE_FLOW_ITEM_TYPE_END, 1098 }; 1099 1100 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_raw_1_vf[] = { 1101 RTE_FLOW_ITEM_TYPE_ETH, 1102 RTE_FLOW_ITEM_TYPE_IPV6, 1103 RTE_FLOW_ITEM_TYPE_TCP, 1104 RTE_FLOW_ITEM_TYPE_RAW, 1105 RTE_FLOW_ITEM_TYPE_VF, 1106 RTE_FLOW_ITEM_TYPE_END, 1107 }; 1108 1109 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_raw_2_vf[] = { 1110 RTE_FLOW_ITEM_TYPE_ETH, 1111 RTE_FLOW_ITEM_TYPE_IPV6, 1112 RTE_FLOW_ITEM_TYPE_TCP, 1113 RTE_FLOW_ITEM_TYPE_RAW, 1114 RTE_FLOW_ITEM_TYPE_RAW, 1115 RTE_FLOW_ITEM_TYPE_VF, 1116 RTE_FLOW_ITEM_TYPE_END, 1117 }; 1118 1119 static enum rte_flow_item_type pattern_fdir_ipv6_tcp_raw_3_vf[] = { 1120 RTE_FLOW_ITEM_TYPE_ETH, 1121 RTE_FLOW_ITEM_TYPE_IPV6, 1122 RTE_FLOW_ITEM_TYPE_TCP, 1123 RTE_FLOW_ITEM_TYPE_RAW, 1124 RTE_FLOW_ITEM_TYPE_RAW, 1125 RTE_FLOW_ITEM_TYPE_RAW, 1126 RTE_FLOW_ITEM_TYPE_VF, 1127 RTE_FLOW_ITEM_TYPE_END, 1128 }; 1129 1130 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_raw_1_vf[] = { 1131 RTE_FLOW_ITEM_TYPE_ETH, 1132 RTE_FLOW_ITEM_TYPE_IPV6, 1133 RTE_FLOW_ITEM_TYPE_SCTP, 1134 RTE_FLOW_ITEM_TYPE_RAW, 1135 RTE_FLOW_ITEM_TYPE_VF, 1136 RTE_FLOW_ITEM_TYPE_END, 1137 }; 1138 1139 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_raw_2_vf[] = { 1140 RTE_FLOW_ITEM_TYPE_ETH, 1141 RTE_FLOW_ITEM_TYPE_IPV6, 1142 RTE_FLOW_ITEM_TYPE_SCTP, 1143 RTE_FLOW_ITEM_TYPE_RAW, 1144 RTE_FLOW_ITEM_TYPE_RAW, 1145 RTE_FLOW_ITEM_TYPE_VF, 1146 RTE_FLOW_ITEM_TYPE_END, 1147 }; 1148 1149 static enum rte_flow_item_type pattern_fdir_ipv6_sctp_raw_3_vf[] = { 1150 RTE_FLOW_ITEM_TYPE_ETH, 1151 RTE_FLOW_ITEM_TYPE_IPV6, 1152 RTE_FLOW_ITEM_TYPE_SCTP, 1153 RTE_FLOW_ITEM_TYPE_RAW, 1154 RTE_FLOW_ITEM_TYPE_RAW, 1155 RTE_FLOW_ITEM_TYPE_RAW, 1156 RTE_FLOW_ITEM_TYPE_VF, 1157 RTE_FLOW_ITEM_TYPE_END, 1158 }; 1159 1160 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_vf[] = { 1161 RTE_FLOW_ITEM_TYPE_ETH, 1162 RTE_FLOW_ITEM_TYPE_VLAN, 1163 RTE_FLOW_ITEM_TYPE_VF, 1164 RTE_FLOW_ITEM_TYPE_END, 1165 }; 1166 1167 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_vf[] = { 1168 RTE_FLOW_ITEM_TYPE_ETH, 1169 RTE_FLOW_ITEM_TYPE_VLAN, 1170 RTE_FLOW_ITEM_TYPE_IPV4, 1171 RTE_FLOW_ITEM_TYPE_VF, 1172 RTE_FLOW_ITEM_TYPE_END, 1173 }; 1174 1175 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_vf[] = { 1176 RTE_FLOW_ITEM_TYPE_ETH, 1177 RTE_FLOW_ITEM_TYPE_VLAN, 1178 RTE_FLOW_ITEM_TYPE_IPV4, 1179 RTE_FLOW_ITEM_TYPE_UDP, 1180 RTE_FLOW_ITEM_TYPE_VF, 1181 RTE_FLOW_ITEM_TYPE_END, 1182 }; 1183 1184 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_vf[] = { 1185 RTE_FLOW_ITEM_TYPE_ETH, 1186 RTE_FLOW_ITEM_TYPE_VLAN, 1187 RTE_FLOW_ITEM_TYPE_IPV4, 1188 RTE_FLOW_ITEM_TYPE_TCP, 1189 RTE_FLOW_ITEM_TYPE_VF, 1190 RTE_FLOW_ITEM_TYPE_END, 1191 }; 1192 1193 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_vf[] = { 1194 RTE_FLOW_ITEM_TYPE_ETH, 1195 RTE_FLOW_ITEM_TYPE_VLAN, 1196 RTE_FLOW_ITEM_TYPE_IPV4, 1197 RTE_FLOW_ITEM_TYPE_SCTP, 1198 RTE_FLOW_ITEM_TYPE_VF, 1199 RTE_FLOW_ITEM_TYPE_END, 1200 }; 1201 1202 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_vf[] = { 1203 RTE_FLOW_ITEM_TYPE_ETH, 1204 RTE_FLOW_ITEM_TYPE_VLAN, 1205 RTE_FLOW_ITEM_TYPE_IPV6, 1206 RTE_FLOW_ITEM_TYPE_VF, 1207 RTE_FLOW_ITEM_TYPE_END, 1208 }; 1209 1210 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_vf[] = { 1211 RTE_FLOW_ITEM_TYPE_ETH, 1212 RTE_FLOW_ITEM_TYPE_VLAN, 1213 RTE_FLOW_ITEM_TYPE_IPV6, 1214 RTE_FLOW_ITEM_TYPE_UDP, 1215 RTE_FLOW_ITEM_TYPE_VF, 1216 RTE_FLOW_ITEM_TYPE_END, 1217 }; 1218 1219 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_vf[] = { 1220 RTE_FLOW_ITEM_TYPE_ETH, 1221 RTE_FLOW_ITEM_TYPE_VLAN, 1222 RTE_FLOW_ITEM_TYPE_IPV6, 1223 RTE_FLOW_ITEM_TYPE_TCP, 1224 RTE_FLOW_ITEM_TYPE_VF, 1225 RTE_FLOW_ITEM_TYPE_END, 1226 }; 1227 1228 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_vf[] = { 1229 RTE_FLOW_ITEM_TYPE_ETH, 1230 RTE_FLOW_ITEM_TYPE_VLAN, 1231 RTE_FLOW_ITEM_TYPE_IPV6, 1232 RTE_FLOW_ITEM_TYPE_SCTP, 1233 RTE_FLOW_ITEM_TYPE_VF, 1234 RTE_FLOW_ITEM_TYPE_END, 1235 }; 1236 1237 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_raw_1_vf[] = { 1238 RTE_FLOW_ITEM_TYPE_ETH, 1239 RTE_FLOW_ITEM_TYPE_VLAN, 1240 RTE_FLOW_ITEM_TYPE_RAW, 1241 RTE_FLOW_ITEM_TYPE_VF, 1242 RTE_FLOW_ITEM_TYPE_END, 1243 }; 1244 1245 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_raw_2_vf[] = { 1246 RTE_FLOW_ITEM_TYPE_ETH, 1247 RTE_FLOW_ITEM_TYPE_VLAN, 1248 RTE_FLOW_ITEM_TYPE_RAW, 1249 RTE_FLOW_ITEM_TYPE_RAW, 1250 RTE_FLOW_ITEM_TYPE_VF, 1251 RTE_FLOW_ITEM_TYPE_END, 1252 }; 1253 1254 static enum rte_flow_item_type pattern_fdir_ethertype_vlan_raw_3_vf[] = { 1255 RTE_FLOW_ITEM_TYPE_ETH, 1256 RTE_FLOW_ITEM_TYPE_VLAN, 1257 RTE_FLOW_ITEM_TYPE_RAW, 1258 RTE_FLOW_ITEM_TYPE_RAW, 1259 RTE_FLOW_ITEM_TYPE_RAW, 1260 RTE_FLOW_ITEM_TYPE_VF, 1261 RTE_FLOW_ITEM_TYPE_END, 1262 }; 1263 1264 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_raw_1_vf[] = { 1265 RTE_FLOW_ITEM_TYPE_ETH, 1266 RTE_FLOW_ITEM_TYPE_VLAN, 1267 RTE_FLOW_ITEM_TYPE_IPV4, 1268 RTE_FLOW_ITEM_TYPE_RAW, 1269 RTE_FLOW_ITEM_TYPE_VF, 1270 RTE_FLOW_ITEM_TYPE_END, 1271 }; 1272 1273 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_raw_2_vf[] = { 1274 RTE_FLOW_ITEM_TYPE_ETH, 1275 RTE_FLOW_ITEM_TYPE_VLAN, 1276 RTE_FLOW_ITEM_TYPE_IPV4, 1277 RTE_FLOW_ITEM_TYPE_RAW, 1278 RTE_FLOW_ITEM_TYPE_RAW, 1279 RTE_FLOW_ITEM_TYPE_VF, 1280 RTE_FLOW_ITEM_TYPE_END, 1281 }; 1282 1283 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_raw_3_vf[] = { 1284 RTE_FLOW_ITEM_TYPE_ETH, 1285 RTE_FLOW_ITEM_TYPE_VLAN, 1286 RTE_FLOW_ITEM_TYPE_IPV4, 1287 RTE_FLOW_ITEM_TYPE_RAW, 1288 RTE_FLOW_ITEM_TYPE_RAW, 1289 RTE_FLOW_ITEM_TYPE_RAW, 1290 RTE_FLOW_ITEM_TYPE_VF, 1291 RTE_FLOW_ITEM_TYPE_END, 1292 }; 1293 1294 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_raw_1_vf[] = { 1295 RTE_FLOW_ITEM_TYPE_ETH, 1296 RTE_FLOW_ITEM_TYPE_VLAN, 1297 RTE_FLOW_ITEM_TYPE_IPV4, 1298 RTE_FLOW_ITEM_TYPE_UDP, 1299 RTE_FLOW_ITEM_TYPE_RAW, 1300 RTE_FLOW_ITEM_TYPE_VF, 1301 RTE_FLOW_ITEM_TYPE_END, 1302 }; 1303 1304 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_raw_2_vf[] = { 1305 RTE_FLOW_ITEM_TYPE_ETH, 1306 RTE_FLOW_ITEM_TYPE_VLAN, 1307 RTE_FLOW_ITEM_TYPE_IPV4, 1308 RTE_FLOW_ITEM_TYPE_UDP, 1309 RTE_FLOW_ITEM_TYPE_RAW, 1310 RTE_FLOW_ITEM_TYPE_RAW, 1311 RTE_FLOW_ITEM_TYPE_VF, 1312 RTE_FLOW_ITEM_TYPE_END, 1313 }; 1314 1315 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_udp_raw_3_vf[] = { 1316 RTE_FLOW_ITEM_TYPE_ETH, 1317 RTE_FLOW_ITEM_TYPE_VLAN, 1318 RTE_FLOW_ITEM_TYPE_IPV4, 1319 RTE_FLOW_ITEM_TYPE_UDP, 1320 RTE_FLOW_ITEM_TYPE_RAW, 1321 RTE_FLOW_ITEM_TYPE_RAW, 1322 RTE_FLOW_ITEM_TYPE_RAW, 1323 RTE_FLOW_ITEM_TYPE_VF, 1324 RTE_FLOW_ITEM_TYPE_END, 1325 }; 1326 1327 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_raw_1_vf[] = { 1328 RTE_FLOW_ITEM_TYPE_ETH, 1329 RTE_FLOW_ITEM_TYPE_VLAN, 1330 RTE_FLOW_ITEM_TYPE_IPV4, 1331 RTE_FLOW_ITEM_TYPE_TCP, 1332 RTE_FLOW_ITEM_TYPE_RAW, 1333 RTE_FLOW_ITEM_TYPE_VF, 1334 RTE_FLOW_ITEM_TYPE_END, 1335 }; 1336 1337 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_raw_2_vf[] = { 1338 RTE_FLOW_ITEM_TYPE_ETH, 1339 RTE_FLOW_ITEM_TYPE_VLAN, 1340 RTE_FLOW_ITEM_TYPE_IPV4, 1341 RTE_FLOW_ITEM_TYPE_TCP, 1342 RTE_FLOW_ITEM_TYPE_RAW, 1343 RTE_FLOW_ITEM_TYPE_RAW, 1344 RTE_FLOW_ITEM_TYPE_VF, 1345 RTE_FLOW_ITEM_TYPE_END, 1346 }; 1347 1348 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_tcp_raw_3_vf[] = { 1349 RTE_FLOW_ITEM_TYPE_ETH, 1350 RTE_FLOW_ITEM_TYPE_VLAN, 1351 RTE_FLOW_ITEM_TYPE_IPV4, 1352 RTE_FLOW_ITEM_TYPE_TCP, 1353 RTE_FLOW_ITEM_TYPE_RAW, 1354 RTE_FLOW_ITEM_TYPE_RAW, 1355 RTE_FLOW_ITEM_TYPE_RAW, 1356 RTE_FLOW_ITEM_TYPE_VF, 1357 RTE_FLOW_ITEM_TYPE_END, 1358 }; 1359 1360 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_raw_1_vf[] = { 1361 RTE_FLOW_ITEM_TYPE_ETH, 1362 RTE_FLOW_ITEM_TYPE_VLAN, 1363 RTE_FLOW_ITEM_TYPE_IPV4, 1364 RTE_FLOW_ITEM_TYPE_SCTP, 1365 RTE_FLOW_ITEM_TYPE_RAW, 1366 RTE_FLOW_ITEM_TYPE_VF, 1367 RTE_FLOW_ITEM_TYPE_END, 1368 }; 1369 1370 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_raw_2_vf[] = { 1371 RTE_FLOW_ITEM_TYPE_ETH, 1372 RTE_FLOW_ITEM_TYPE_VLAN, 1373 RTE_FLOW_ITEM_TYPE_IPV4, 1374 RTE_FLOW_ITEM_TYPE_SCTP, 1375 RTE_FLOW_ITEM_TYPE_RAW, 1376 RTE_FLOW_ITEM_TYPE_RAW, 1377 RTE_FLOW_ITEM_TYPE_VF, 1378 RTE_FLOW_ITEM_TYPE_END, 1379 }; 1380 1381 static enum rte_flow_item_type pattern_fdir_vlan_ipv4_sctp_raw_3_vf[] = { 1382 RTE_FLOW_ITEM_TYPE_ETH, 1383 RTE_FLOW_ITEM_TYPE_VLAN, 1384 RTE_FLOW_ITEM_TYPE_IPV4, 1385 RTE_FLOW_ITEM_TYPE_SCTP, 1386 RTE_FLOW_ITEM_TYPE_RAW, 1387 RTE_FLOW_ITEM_TYPE_RAW, 1388 RTE_FLOW_ITEM_TYPE_RAW, 1389 RTE_FLOW_ITEM_TYPE_VF, 1390 RTE_FLOW_ITEM_TYPE_END, 1391 }; 1392 1393 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_raw_1_vf[] = { 1394 RTE_FLOW_ITEM_TYPE_ETH, 1395 RTE_FLOW_ITEM_TYPE_VLAN, 1396 RTE_FLOW_ITEM_TYPE_IPV6, 1397 RTE_FLOW_ITEM_TYPE_RAW, 1398 RTE_FLOW_ITEM_TYPE_VF, 1399 RTE_FLOW_ITEM_TYPE_END, 1400 }; 1401 1402 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_raw_2_vf[] = { 1403 RTE_FLOW_ITEM_TYPE_ETH, 1404 RTE_FLOW_ITEM_TYPE_VLAN, 1405 RTE_FLOW_ITEM_TYPE_IPV6, 1406 RTE_FLOW_ITEM_TYPE_RAW, 1407 RTE_FLOW_ITEM_TYPE_RAW, 1408 RTE_FLOW_ITEM_TYPE_VF, 1409 RTE_FLOW_ITEM_TYPE_END, 1410 }; 1411 1412 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_raw_3_vf[] = { 1413 RTE_FLOW_ITEM_TYPE_ETH, 1414 RTE_FLOW_ITEM_TYPE_VLAN, 1415 RTE_FLOW_ITEM_TYPE_IPV6, 1416 RTE_FLOW_ITEM_TYPE_RAW, 1417 RTE_FLOW_ITEM_TYPE_RAW, 1418 RTE_FLOW_ITEM_TYPE_RAW, 1419 RTE_FLOW_ITEM_TYPE_VF, 1420 RTE_FLOW_ITEM_TYPE_END, 1421 }; 1422 1423 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_raw_1_vf[] = { 1424 RTE_FLOW_ITEM_TYPE_ETH, 1425 RTE_FLOW_ITEM_TYPE_VLAN, 1426 RTE_FLOW_ITEM_TYPE_IPV6, 1427 RTE_FLOW_ITEM_TYPE_UDP, 1428 RTE_FLOW_ITEM_TYPE_RAW, 1429 RTE_FLOW_ITEM_TYPE_VF, 1430 RTE_FLOW_ITEM_TYPE_END, 1431 }; 1432 1433 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_raw_2_vf[] = { 1434 RTE_FLOW_ITEM_TYPE_ETH, 1435 RTE_FLOW_ITEM_TYPE_VLAN, 1436 RTE_FLOW_ITEM_TYPE_IPV6, 1437 RTE_FLOW_ITEM_TYPE_UDP, 1438 RTE_FLOW_ITEM_TYPE_RAW, 1439 RTE_FLOW_ITEM_TYPE_RAW, 1440 RTE_FLOW_ITEM_TYPE_VF, 1441 RTE_FLOW_ITEM_TYPE_END, 1442 }; 1443 1444 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_udp_raw_3_vf[] = { 1445 RTE_FLOW_ITEM_TYPE_ETH, 1446 RTE_FLOW_ITEM_TYPE_VLAN, 1447 RTE_FLOW_ITEM_TYPE_IPV6, 1448 RTE_FLOW_ITEM_TYPE_UDP, 1449 RTE_FLOW_ITEM_TYPE_RAW, 1450 RTE_FLOW_ITEM_TYPE_RAW, 1451 RTE_FLOW_ITEM_TYPE_RAW, 1452 RTE_FLOW_ITEM_TYPE_VF, 1453 RTE_FLOW_ITEM_TYPE_END, 1454 }; 1455 1456 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_raw_1_vf[] = { 1457 RTE_FLOW_ITEM_TYPE_ETH, 1458 RTE_FLOW_ITEM_TYPE_VLAN, 1459 RTE_FLOW_ITEM_TYPE_IPV6, 1460 RTE_FLOW_ITEM_TYPE_TCP, 1461 RTE_FLOW_ITEM_TYPE_RAW, 1462 RTE_FLOW_ITEM_TYPE_VF, 1463 RTE_FLOW_ITEM_TYPE_END, 1464 }; 1465 1466 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_raw_2_vf[] = { 1467 RTE_FLOW_ITEM_TYPE_ETH, 1468 RTE_FLOW_ITEM_TYPE_VLAN, 1469 RTE_FLOW_ITEM_TYPE_IPV6, 1470 RTE_FLOW_ITEM_TYPE_TCP, 1471 RTE_FLOW_ITEM_TYPE_RAW, 1472 RTE_FLOW_ITEM_TYPE_RAW, 1473 RTE_FLOW_ITEM_TYPE_VF, 1474 RTE_FLOW_ITEM_TYPE_END, 1475 }; 1476 1477 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_tcp_raw_3_vf[] = { 1478 RTE_FLOW_ITEM_TYPE_ETH, 1479 RTE_FLOW_ITEM_TYPE_VLAN, 1480 RTE_FLOW_ITEM_TYPE_IPV6, 1481 RTE_FLOW_ITEM_TYPE_TCP, 1482 RTE_FLOW_ITEM_TYPE_RAW, 1483 RTE_FLOW_ITEM_TYPE_RAW, 1484 RTE_FLOW_ITEM_TYPE_RAW, 1485 RTE_FLOW_ITEM_TYPE_VF, 1486 RTE_FLOW_ITEM_TYPE_END, 1487 }; 1488 1489 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_raw_1_vf[] = { 1490 RTE_FLOW_ITEM_TYPE_ETH, 1491 RTE_FLOW_ITEM_TYPE_VLAN, 1492 RTE_FLOW_ITEM_TYPE_IPV6, 1493 RTE_FLOW_ITEM_TYPE_SCTP, 1494 RTE_FLOW_ITEM_TYPE_RAW, 1495 RTE_FLOW_ITEM_TYPE_VF, 1496 RTE_FLOW_ITEM_TYPE_END, 1497 }; 1498 1499 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_raw_2_vf[] = { 1500 RTE_FLOW_ITEM_TYPE_ETH, 1501 RTE_FLOW_ITEM_TYPE_VLAN, 1502 RTE_FLOW_ITEM_TYPE_IPV6, 1503 RTE_FLOW_ITEM_TYPE_SCTP, 1504 RTE_FLOW_ITEM_TYPE_RAW, 1505 RTE_FLOW_ITEM_TYPE_RAW, 1506 RTE_FLOW_ITEM_TYPE_VF, 1507 RTE_FLOW_ITEM_TYPE_END, 1508 }; 1509 1510 static enum rte_flow_item_type pattern_fdir_vlan_ipv6_sctp_raw_3_vf[] = { 1511 RTE_FLOW_ITEM_TYPE_ETH, 1512 RTE_FLOW_ITEM_TYPE_VLAN, 1513 RTE_FLOW_ITEM_TYPE_IPV6, 1514 RTE_FLOW_ITEM_TYPE_SCTP, 1515 RTE_FLOW_ITEM_TYPE_RAW, 1516 RTE_FLOW_ITEM_TYPE_RAW, 1517 RTE_FLOW_ITEM_TYPE_RAW, 1518 RTE_FLOW_ITEM_TYPE_VF, 1519 RTE_FLOW_ITEM_TYPE_END, 1520 }; 1521 1522 /* Pattern matched tunnel filter */ 1523 static enum rte_flow_item_type pattern_vxlan_1[] = { 1524 RTE_FLOW_ITEM_TYPE_ETH, 1525 RTE_FLOW_ITEM_TYPE_IPV4, 1526 RTE_FLOW_ITEM_TYPE_UDP, 1527 RTE_FLOW_ITEM_TYPE_VXLAN, 1528 RTE_FLOW_ITEM_TYPE_ETH, 1529 RTE_FLOW_ITEM_TYPE_END, 1530 }; 1531 1532 static enum rte_flow_item_type pattern_vxlan_2[] = { 1533 RTE_FLOW_ITEM_TYPE_ETH, 1534 RTE_FLOW_ITEM_TYPE_IPV6, 1535 RTE_FLOW_ITEM_TYPE_UDP, 1536 RTE_FLOW_ITEM_TYPE_VXLAN, 1537 RTE_FLOW_ITEM_TYPE_ETH, 1538 RTE_FLOW_ITEM_TYPE_END, 1539 }; 1540 1541 static enum rte_flow_item_type pattern_vxlan_3[] = { 1542 RTE_FLOW_ITEM_TYPE_ETH, 1543 RTE_FLOW_ITEM_TYPE_IPV4, 1544 RTE_FLOW_ITEM_TYPE_UDP, 1545 RTE_FLOW_ITEM_TYPE_VXLAN, 1546 RTE_FLOW_ITEM_TYPE_ETH, 1547 RTE_FLOW_ITEM_TYPE_VLAN, 1548 RTE_FLOW_ITEM_TYPE_END, 1549 }; 1550 1551 static enum rte_flow_item_type pattern_vxlan_4[] = { 1552 RTE_FLOW_ITEM_TYPE_ETH, 1553 RTE_FLOW_ITEM_TYPE_IPV6, 1554 RTE_FLOW_ITEM_TYPE_UDP, 1555 RTE_FLOW_ITEM_TYPE_VXLAN, 1556 RTE_FLOW_ITEM_TYPE_ETH, 1557 RTE_FLOW_ITEM_TYPE_VLAN, 1558 RTE_FLOW_ITEM_TYPE_END, 1559 }; 1560 1561 static enum rte_flow_item_type pattern_nvgre_1[] = { 1562 RTE_FLOW_ITEM_TYPE_ETH, 1563 RTE_FLOW_ITEM_TYPE_IPV4, 1564 RTE_FLOW_ITEM_TYPE_NVGRE, 1565 RTE_FLOW_ITEM_TYPE_ETH, 1566 RTE_FLOW_ITEM_TYPE_END, 1567 }; 1568 1569 static enum rte_flow_item_type pattern_nvgre_2[] = { 1570 RTE_FLOW_ITEM_TYPE_ETH, 1571 RTE_FLOW_ITEM_TYPE_IPV6, 1572 RTE_FLOW_ITEM_TYPE_NVGRE, 1573 RTE_FLOW_ITEM_TYPE_ETH, 1574 RTE_FLOW_ITEM_TYPE_END, 1575 }; 1576 1577 static enum rte_flow_item_type pattern_nvgre_3[] = { 1578 RTE_FLOW_ITEM_TYPE_ETH, 1579 RTE_FLOW_ITEM_TYPE_IPV4, 1580 RTE_FLOW_ITEM_TYPE_NVGRE, 1581 RTE_FLOW_ITEM_TYPE_ETH, 1582 RTE_FLOW_ITEM_TYPE_VLAN, 1583 RTE_FLOW_ITEM_TYPE_END, 1584 }; 1585 1586 static enum rte_flow_item_type pattern_nvgre_4[] = { 1587 RTE_FLOW_ITEM_TYPE_ETH, 1588 RTE_FLOW_ITEM_TYPE_IPV6, 1589 RTE_FLOW_ITEM_TYPE_NVGRE, 1590 RTE_FLOW_ITEM_TYPE_ETH, 1591 RTE_FLOW_ITEM_TYPE_VLAN, 1592 RTE_FLOW_ITEM_TYPE_END, 1593 }; 1594 1595 static enum rte_flow_item_type pattern_mpls_1[] = { 1596 RTE_FLOW_ITEM_TYPE_ETH, 1597 RTE_FLOW_ITEM_TYPE_IPV4, 1598 RTE_FLOW_ITEM_TYPE_UDP, 1599 RTE_FLOW_ITEM_TYPE_MPLS, 1600 RTE_FLOW_ITEM_TYPE_END, 1601 }; 1602 1603 static enum rte_flow_item_type pattern_mpls_2[] = { 1604 RTE_FLOW_ITEM_TYPE_ETH, 1605 RTE_FLOW_ITEM_TYPE_IPV6, 1606 RTE_FLOW_ITEM_TYPE_UDP, 1607 RTE_FLOW_ITEM_TYPE_MPLS, 1608 RTE_FLOW_ITEM_TYPE_END, 1609 }; 1610 1611 static enum rte_flow_item_type pattern_mpls_3[] = { 1612 RTE_FLOW_ITEM_TYPE_ETH, 1613 RTE_FLOW_ITEM_TYPE_IPV4, 1614 RTE_FLOW_ITEM_TYPE_GRE, 1615 RTE_FLOW_ITEM_TYPE_MPLS, 1616 RTE_FLOW_ITEM_TYPE_END, 1617 }; 1618 1619 static enum rte_flow_item_type pattern_mpls_4[] = { 1620 RTE_FLOW_ITEM_TYPE_ETH, 1621 RTE_FLOW_ITEM_TYPE_IPV6, 1622 RTE_FLOW_ITEM_TYPE_GRE, 1623 RTE_FLOW_ITEM_TYPE_MPLS, 1624 RTE_FLOW_ITEM_TYPE_END, 1625 }; 1626 1627 static enum rte_flow_item_type pattern_qinq_1[] = { 1628 RTE_FLOW_ITEM_TYPE_ETH, 1629 RTE_FLOW_ITEM_TYPE_VLAN, 1630 RTE_FLOW_ITEM_TYPE_VLAN, 1631 RTE_FLOW_ITEM_TYPE_END, 1632 }; 1633 1634 static enum rte_flow_item_type pattern_fdir_ipv4_l2tpv3oip[] = { 1635 RTE_FLOW_ITEM_TYPE_ETH, 1636 RTE_FLOW_ITEM_TYPE_IPV4, 1637 RTE_FLOW_ITEM_TYPE_L2TPV3OIP, 1638 RTE_FLOW_ITEM_TYPE_END, 1639 }; 1640 1641 static enum rte_flow_item_type pattern_fdir_ipv6_l2tpv3oip[] = { 1642 RTE_FLOW_ITEM_TYPE_ETH, 1643 RTE_FLOW_ITEM_TYPE_IPV6, 1644 RTE_FLOW_ITEM_TYPE_L2TPV3OIP, 1645 RTE_FLOW_ITEM_TYPE_END, 1646 }; 1647 1648 static enum rte_flow_item_type pattern_fdir_ipv4_esp[] = { 1649 RTE_FLOW_ITEM_TYPE_ETH, 1650 RTE_FLOW_ITEM_TYPE_IPV4, 1651 RTE_FLOW_ITEM_TYPE_ESP, 1652 RTE_FLOW_ITEM_TYPE_END, 1653 }; 1654 1655 static enum rte_flow_item_type pattern_fdir_ipv6_esp[] = { 1656 RTE_FLOW_ITEM_TYPE_ETH, 1657 RTE_FLOW_ITEM_TYPE_IPV6, 1658 RTE_FLOW_ITEM_TYPE_ESP, 1659 RTE_FLOW_ITEM_TYPE_END, 1660 }; 1661 1662 static enum rte_flow_item_type pattern_fdir_ipv4_udp_esp[] = { 1663 RTE_FLOW_ITEM_TYPE_ETH, 1664 RTE_FLOW_ITEM_TYPE_IPV4, 1665 RTE_FLOW_ITEM_TYPE_UDP, 1666 RTE_FLOW_ITEM_TYPE_ESP, 1667 RTE_FLOW_ITEM_TYPE_END, 1668 }; 1669 1670 static enum rte_flow_item_type pattern_fdir_ipv6_udp_esp[] = { 1671 RTE_FLOW_ITEM_TYPE_ETH, 1672 RTE_FLOW_ITEM_TYPE_IPV6, 1673 RTE_FLOW_ITEM_TYPE_UDP, 1674 RTE_FLOW_ITEM_TYPE_ESP, 1675 RTE_FLOW_ITEM_TYPE_END, 1676 }; 1677 1678 static struct i40e_valid_pattern i40e_supported_patterns[] = { 1679 /* Ethertype */ 1680 { pattern_ethertype, i40e_flow_parse_ethertype_filter }, 1681 /* FDIR - support default flow type without flexible payload*/ 1682 { pattern_ethertype, i40e_flow_parse_fdir_filter }, 1683 { pattern_fdir_ipv4, i40e_flow_parse_fdir_filter }, 1684 { pattern_fdir_ipv4_udp, i40e_flow_parse_fdir_filter }, 1685 { pattern_fdir_ipv4_tcp, i40e_flow_parse_fdir_filter }, 1686 { pattern_fdir_ipv4_sctp, i40e_flow_parse_fdir_filter }, 1687 { pattern_fdir_ipv4_gtpc, i40e_flow_parse_fdir_filter }, 1688 { pattern_fdir_ipv4_gtpu, i40e_flow_parse_fdir_filter }, 1689 { pattern_fdir_ipv4_gtpu_ipv4, i40e_flow_parse_fdir_filter }, 1690 { pattern_fdir_ipv4_gtpu_ipv6, i40e_flow_parse_fdir_filter }, 1691 { pattern_fdir_ipv4_esp, i40e_flow_parse_fdir_filter }, 1692 { pattern_fdir_ipv4_udp_esp, i40e_flow_parse_fdir_filter }, 1693 { pattern_fdir_ipv6, i40e_flow_parse_fdir_filter }, 1694 { pattern_fdir_ipv6_udp, i40e_flow_parse_fdir_filter }, 1695 { pattern_fdir_ipv6_tcp, i40e_flow_parse_fdir_filter }, 1696 { pattern_fdir_ipv6_sctp, i40e_flow_parse_fdir_filter }, 1697 { pattern_fdir_ipv6_gtpc, i40e_flow_parse_fdir_filter }, 1698 { pattern_fdir_ipv6_gtpu, i40e_flow_parse_fdir_filter }, 1699 { pattern_fdir_ipv6_gtpu_ipv4, i40e_flow_parse_fdir_filter }, 1700 { pattern_fdir_ipv6_gtpu_ipv6, i40e_flow_parse_fdir_filter }, 1701 { pattern_fdir_ipv6_esp, i40e_flow_parse_fdir_filter }, 1702 { pattern_fdir_ipv6_udp_esp, i40e_flow_parse_fdir_filter }, 1703 /* FDIR - support default flow type with flexible payload */ 1704 { pattern_fdir_ethertype_raw_1, i40e_flow_parse_fdir_filter }, 1705 { pattern_fdir_ethertype_raw_2, i40e_flow_parse_fdir_filter }, 1706 { pattern_fdir_ethertype_raw_3, i40e_flow_parse_fdir_filter }, 1707 { pattern_fdir_ipv4_raw_1, i40e_flow_parse_fdir_filter }, 1708 { pattern_fdir_ipv4_raw_2, i40e_flow_parse_fdir_filter }, 1709 { pattern_fdir_ipv4_raw_3, i40e_flow_parse_fdir_filter }, 1710 { pattern_fdir_ipv4_udp_raw_1, i40e_flow_parse_fdir_filter }, 1711 { pattern_fdir_ipv4_udp_raw_2, i40e_flow_parse_fdir_filter }, 1712 { pattern_fdir_ipv4_udp_raw_3, i40e_flow_parse_fdir_filter }, 1713 { pattern_fdir_ipv4_tcp_raw_1, i40e_flow_parse_fdir_filter }, 1714 { pattern_fdir_ipv4_tcp_raw_2, i40e_flow_parse_fdir_filter }, 1715 { pattern_fdir_ipv4_tcp_raw_3, i40e_flow_parse_fdir_filter }, 1716 { pattern_fdir_ipv4_sctp_raw_1, i40e_flow_parse_fdir_filter }, 1717 { pattern_fdir_ipv4_sctp_raw_2, i40e_flow_parse_fdir_filter }, 1718 { pattern_fdir_ipv4_sctp_raw_3, i40e_flow_parse_fdir_filter }, 1719 { pattern_fdir_ipv6_raw_1, i40e_flow_parse_fdir_filter }, 1720 { pattern_fdir_ipv6_raw_2, i40e_flow_parse_fdir_filter }, 1721 { pattern_fdir_ipv6_raw_3, i40e_flow_parse_fdir_filter }, 1722 { pattern_fdir_ipv6_udp_raw_1, i40e_flow_parse_fdir_filter }, 1723 { pattern_fdir_ipv6_udp_raw_2, i40e_flow_parse_fdir_filter }, 1724 { pattern_fdir_ipv6_udp_raw_3, i40e_flow_parse_fdir_filter }, 1725 { pattern_fdir_ipv6_tcp_raw_1, i40e_flow_parse_fdir_filter }, 1726 { pattern_fdir_ipv6_tcp_raw_2, i40e_flow_parse_fdir_filter }, 1727 { pattern_fdir_ipv6_tcp_raw_3, i40e_flow_parse_fdir_filter }, 1728 { pattern_fdir_ipv6_sctp_raw_1, i40e_flow_parse_fdir_filter }, 1729 { pattern_fdir_ipv6_sctp_raw_2, i40e_flow_parse_fdir_filter }, 1730 { pattern_fdir_ipv6_sctp_raw_3, i40e_flow_parse_fdir_filter }, 1731 /* FDIR - support single vlan input set */ 1732 { pattern_fdir_ethertype_vlan, i40e_flow_parse_fdir_filter }, 1733 { pattern_fdir_vlan_ipv4, i40e_flow_parse_fdir_filter }, 1734 { pattern_fdir_vlan_ipv4_udp, i40e_flow_parse_fdir_filter }, 1735 { pattern_fdir_vlan_ipv4_tcp, i40e_flow_parse_fdir_filter }, 1736 { pattern_fdir_vlan_ipv4_sctp, i40e_flow_parse_fdir_filter }, 1737 { pattern_fdir_vlan_ipv6, i40e_flow_parse_fdir_filter }, 1738 { pattern_fdir_vlan_ipv6_udp, i40e_flow_parse_fdir_filter }, 1739 { pattern_fdir_vlan_ipv6_tcp, i40e_flow_parse_fdir_filter }, 1740 { pattern_fdir_vlan_ipv6_sctp, i40e_flow_parse_fdir_filter }, 1741 { pattern_fdir_ethertype_vlan_raw_1, i40e_flow_parse_fdir_filter }, 1742 { pattern_fdir_ethertype_vlan_raw_2, i40e_flow_parse_fdir_filter }, 1743 { pattern_fdir_ethertype_vlan_raw_3, i40e_flow_parse_fdir_filter }, 1744 { pattern_fdir_vlan_ipv4_raw_1, i40e_flow_parse_fdir_filter }, 1745 { pattern_fdir_vlan_ipv4_raw_2, i40e_flow_parse_fdir_filter }, 1746 { pattern_fdir_vlan_ipv4_raw_3, i40e_flow_parse_fdir_filter }, 1747 { pattern_fdir_vlan_ipv4_udp_raw_1, i40e_flow_parse_fdir_filter }, 1748 { pattern_fdir_vlan_ipv4_udp_raw_2, i40e_flow_parse_fdir_filter }, 1749 { pattern_fdir_vlan_ipv4_udp_raw_3, i40e_flow_parse_fdir_filter }, 1750 { pattern_fdir_vlan_ipv4_tcp_raw_1, i40e_flow_parse_fdir_filter }, 1751 { pattern_fdir_vlan_ipv4_tcp_raw_2, i40e_flow_parse_fdir_filter }, 1752 { pattern_fdir_vlan_ipv4_tcp_raw_3, i40e_flow_parse_fdir_filter }, 1753 { pattern_fdir_vlan_ipv4_sctp_raw_1, i40e_flow_parse_fdir_filter }, 1754 { pattern_fdir_vlan_ipv4_sctp_raw_2, i40e_flow_parse_fdir_filter }, 1755 { pattern_fdir_vlan_ipv4_sctp_raw_3, i40e_flow_parse_fdir_filter }, 1756 { pattern_fdir_vlan_ipv6_raw_1, i40e_flow_parse_fdir_filter }, 1757 { pattern_fdir_vlan_ipv6_raw_2, i40e_flow_parse_fdir_filter }, 1758 { pattern_fdir_vlan_ipv6_raw_3, i40e_flow_parse_fdir_filter }, 1759 { pattern_fdir_vlan_ipv6_udp_raw_1, i40e_flow_parse_fdir_filter }, 1760 { pattern_fdir_vlan_ipv6_udp_raw_2, i40e_flow_parse_fdir_filter }, 1761 { pattern_fdir_vlan_ipv6_udp_raw_3, i40e_flow_parse_fdir_filter }, 1762 { pattern_fdir_vlan_ipv6_tcp_raw_1, i40e_flow_parse_fdir_filter }, 1763 { pattern_fdir_vlan_ipv6_tcp_raw_2, i40e_flow_parse_fdir_filter }, 1764 { pattern_fdir_vlan_ipv6_tcp_raw_3, i40e_flow_parse_fdir_filter }, 1765 { pattern_fdir_vlan_ipv6_sctp_raw_1, i40e_flow_parse_fdir_filter }, 1766 { pattern_fdir_vlan_ipv6_sctp_raw_2, i40e_flow_parse_fdir_filter }, 1767 { pattern_fdir_vlan_ipv6_sctp_raw_3, i40e_flow_parse_fdir_filter }, 1768 /* FDIR - support VF item */ 1769 { pattern_fdir_ipv4_vf, i40e_flow_parse_fdir_filter }, 1770 { pattern_fdir_ipv4_udp_vf, i40e_flow_parse_fdir_filter }, 1771 { pattern_fdir_ipv4_tcp_vf, i40e_flow_parse_fdir_filter }, 1772 { pattern_fdir_ipv4_sctp_vf, i40e_flow_parse_fdir_filter }, 1773 { pattern_fdir_ipv6_vf, i40e_flow_parse_fdir_filter }, 1774 { pattern_fdir_ipv6_udp_vf, i40e_flow_parse_fdir_filter }, 1775 { pattern_fdir_ipv6_tcp_vf, i40e_flow_parse_fdir_filter }, 1776 { pattern_fdir_ipv6_sctp_vf, i40e_flow_parse_fdir_filter }, 1777 { pattern_fdir_ethertype_raw_1_vf, i40e_flow_parse_fdir_filter }, 1778 { pattern_fdir_ethertype_raw_2_vf, i40e_flow_parse_fdir_filter }, 1779 { pattern_fdir_ethertype_raw_3_vf, i40e_flow_parse_fdir_filter }, 1780 { pattern_fdir_ipv4_raw_1_vf, i40e_flow_parse_fdir_filter }, 1781 { pattern_fdir_ipv4_raw_2_vf, i40e_flow_parse_fdir_filter }, 1782 { pattern_fdir_ipv4_raw_3_vf, i40e_flow_parse_fdir_filter }, 1783 { pattern_fdir_ipv4_udp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1784 { pattern_fdir_ipv4_udp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1785 { pattern_fdir_ipv4_udp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1786 { pattern_fdir_ipv4_tcp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1787 { pattern_fdir_ipv4_tcp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1788 { pattern_fdir_ipv4_tcp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1789 { pattern_fdir_ipv4_sctp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1790 { pattern_fdir_ipv4_sctp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1791 { pattern_fdir_ipv4_sctp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1792 { pattern_fdir_ipv6_raw_1_vf, i40e_flow_parse_fdir_filter }, 1793 { pattern_fdir_ipv6_raw_2_vf, i40e_flow_parse_fdir_filter }, 1794 { pattern_fdir_ipv6_raw_3_vf, i40e_flow_parse_fdir_filter }, 1795 { pattern_fdir_ipv6_udp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1796 { pattern_fdir_ipv6_udp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1797 { pattern_fdir_ipv6_udp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1798 { pattern_fdir_ipv6_tcp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1799 { pattern_fdir_ipv6_tcp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1800 { pattern_fdir_ipv6_tcp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1801 { pattern_fdir_ipv6_sctp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1802 { pattern_fdir_ipv6_sctp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1803 { pattern_fdir_ipv6_sctp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1804 { pattern_fdir_ethertype_vlan_vf, i40e_flow_parse_fdir_filter }, 1805 { pattern_fdir_vlan_ipv4_vf, i40e_flow_parse_fdir_filter }, 1806 { pattern_fdir_vlan_ipv4_udp_vf, i40e_flow_parse_fdir_filter }, 1807 { pattern_fdir_vlan_ipv4_tcp_vf, i40e_flow_parse_fdir_filter }, 1808 { pattern_fdir_vlan_ipv4_sctp_vf, i40e_flow_parse_fdir_filter }, 1809 { pattern_fdir_vlan_ipv6_vf, i40e_flow_parse_fdir_filter }, 1810 { pattern_fdir_vlan_ipv6_udp_vf, i40e_flow_parse_fdir_filter }, 1811 { pattern_fdir_vlan_ipv6_tcp_vf, i40e_flow_parse_fdir_filter }, 1812 { pattern_fdir_vlan_ipv6_sctp_vf, i40e_flow_parse_fdir_filter }, 1813 { pattern_fdir_ethertype_vlan_raw_1_vf, i40e_flow_parse_fdir_filter }, 1814 { pattern_fdir_ethertype_vlan_raw_2_vf, i40e_flow_parse_fdir_filter }, 1815 { pattern_fdir_ethertype_vlan_raw_3_vf, i40e_flow_parse_fdir_filter }, 1816 { pattern_fdir_vlan_ipv4_raw_1_vf, i40e_flow_parse_fdir_filter }, 1817 { pattern_fdir_vlan_ipv4_raw_2_vf, i40e_flow_parse_fdir_filter }, 1818 { pattern_fdir_vlan_ipv4_raw_3_vf, i40e_flow_parse_fdir_filter }, 1819 { pattern_fdir_vlan_ipv4_udp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1820 { pattern_fdir_vlan_ipv4_udp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1821 { pattern_fdir_vlan_ipv4_udp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1822 { pattern_fdir_vlan_ipv4_tcp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1823 { pattern_fdir_vlan_ipv4_tcp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1824 { pattern_fdir_vlan_ipv4_tcp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1825 { pattern_fdir_vlan_ipv4_sctp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1826 { pattern_fdir_vlan_ipv4_sctp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1827 { pattern_fdir_vlan_ipv4_sctp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1828 { pattern_fdir_vlan_ipv6_raw_1_vf, i40e_flow_parse_fdir_filter }, 1829 { pattern_fdir_vlan_ipv6_raw_2_vf, i40e_flow_parse_fdir_filter }, 1830 { pattern_fdir_vlan_ipv6_raw_3_vf, i40e_flow_parse_fdir_filter }, 1831 { pattern_fdir_vlan_ipv6_udp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1832 { pattern_fdir_vlan_ipv6_udp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1833 { pattern_fdir_vlan_ipv6_udp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1834 { pattern_fdir_vlan_ipv6_tcp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1835 { pattern_fdir_vlan_ipv6_tcp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1836 { pattern_fdir_vlan_ipv6_tcp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1837 { pattern_fdir_vlan_ipv6_sctp_raw_1_vf, i40e_flow_parse_fdir_filter }, 1838 { pattern_fdir_vlan_ipv6_sctp_raw_2_vf, i40e_flow_parse_fdir_filter }, 1839 { pattern_fdir_vlan_ipv6_sctp_raw_3_vf, i40e_flow_parse_fdir_filter }, 1840 /* VXLAN */ 1841 { pattern_vxlan_1, i40e_flow_parse_vxlan_filter }, 1842 { pattern_vxlan_2, i40e_flow_parse_vxlan_filter }, 1843 { pattern_vxlan_3, i40e_flow_parse_vxlan_filter }, 1844 { pattern_vxlan_4, i40e_flow_parse_vxlan_filter }, 1845 /* NVGRE */ 1846 { pattern_nvgre_1, i40e_flow_parse_nvgre_filter }, 1847 { pattern_nvgre_2, i40e_flow_parse_nvgre_filter }, 1848 { pattern_nvgre_3, i40e_flow_parse_nvgre_filter }, 1849 { pattern_nvgre_4, i40e_flow_parse_nvgre_filter }, 1850 /* MPLSoUDP & MPLSoGRE */ 1851 { pattern_mpls_1, i40e_flow_parse_mpls_filter }, 1852 { pattern_mpls_2, i40e_flow_parse_mpls_filter }, 1853 { pattern_mpls_3, i40e_flow_parse_mpls_filter }, 1854 { pattern_mpls_4, i40e_flow_parse_mpls_filter }, 1855 /* GTP-C & GTP-U */ 1856 { pattern_fdir_ipv4_gtpc, i40e_flow_parse_gtp_filter }, 1857 { pattern_fdir_ipv4_gtpu, i40e_flow_parse_gtp_filter }, 1858 { pattern_fdir_ipv6_gtpc, i40e_flow_parse_gtp_filter }, 1859 { pattern_fdir_ipv6_gtpu, i40e_flow_parse_gtp_filter }, 1860 /* QINQ */ 1861 { pattern_qinq_1, i40e_flow_parse_qinq_filter }, 1862 /* L2TPv3 over IP */ 1863 { pattern_fdir_ipv4_l2tpv3oip, i40e_flow_parse_fdir_filter }, 1864 { pattern_fdir_ipv6_l2tpv3oip, i40e_flow_parse_fdir_filter }, 1865 /* L4 over port */ 1866 { pattern_fdir_ipv4_udp, i40e_flow_parse_l4_cloud_filter }, 1867 { pattern_fdir_ipv4_tcp, i40e_flow_parse_l4_cloud_filter }, 1868 { pattern_fdir_ipv4_sctp, i40e_flow_parse_l4_cloud_filter }, 1869 { pattern_fdir_ipv6_udp, i40e_flow_parse_l4_cloud_filter }, 1870 { pattern_fdir_ipv6_tcp, i40e_flow_parse_l4_cloud_filter }, 1871 { pattern_fdir_ipv6_sctp, i40e_flow_parse_l4_cloud_filter }, 1872 }; 1873 1874 #define NEXT_ITEM_OF_ACTION(act, actions, index) \ 1875 do { \ 1876 act = actions + index; \ 1877 while (act->type == RTE_FLOW_ACTION_TYPE_VOID) { \ 1878 index++; \ 1879 act = actions + index; \ 1880 } \ 1881 } while (0) 1882 1883 /* Find the first VOID or non-VOID item pointer */ 1884 static const struct rte_flow_item * 1885 i40e_find_first_item(const struct rte_flow_item *item, bool is_void) 1886 { 1887 bool is_find; 1888 1889 while (item->type != RTE_FLOW_ITEM_TYPE_END) { 1890 if (is_void) 1891 is_find = item->type == RTE_FLOW_ITEM_TYPE_VOID; 1892 else 1893 is_find = item->type != RTE_FLOW_ITEM_TYPE_VOID; 1894 if (is_find) 1895 break; 1896 item++; 1897 } 1898 return item; 1899 } 1900 1901 /* Skip all VOID items of the pattern */ 1902 static void 1903 i40e_pattern_skip_void_item(struct rte_flow_item *items, 1904 const struct rte_flow_item *pattern) 1905 { 1906 uint32_t cpy_count = 0; 1907 const struct rte_flow_item *pb = pattern, *pe = pattern; 1908 1909 for (;;) { 1910 /* Find a non-void item first */ 1911 pb = i40e_find_first_item(pb, false); 1912 if (pb->type == RTE_FLOW_ITEM_TYPE_END) { 1913 pe = pb; 1914 break; 1915 } 1916 1917 /* Find a void item */ 1918 pe = i40e_find_first_item(pb + 1, true); 1919 1920 cpy_count = pe - pb; 1921 rte_memcpy(items, pb, sizeof(struct rte_flow_item) * cpy_count); 1922 1923 items += cpy_count; 1924 1925 if (pe->type == RTE_FLOW_ITEM_TYPE_END) { 1926 pb = pe; 1927 break; 1928 } 1929 1930 pb = pe + 1; 1931 } 1932 /* Copy the END item. */ 1933 rte_memcpy(items, pe, sizeof(struct rte_flow_item)); 1934 } 1935 1936 /* Check if the pattern matches a supported item type array */ 1937 static bool 1938 i40e_match_pattern(enum rte_flow_item_type *item_array, 1939 struct rte_flow_item *pattern) 1940 { 1941 struct rte_flow_item *item = pattern; 1942 1943 while ((*item_array == item->type) && 1944 (*item_array != RTE_FLOW_ITEM_TYPE_END)) { 1945 item_array++; 1946 item++; 1947 } 1948 1949 return (*item_array == RTE_FLOW_ITEM_TYPE_END && 1950 item->type == RTE_FLOW_ITEM_TYPE_END); 1951 } 1952 1953 /* Find if there's parse filter function matched */ 1954 static parse_filter_t 1955 i40e_find_parse_filter_func(struct rte_flow_item *pattern, uint32_t *idx) 1956 { 1957 parse_filter_t parse_filter = NULL; 1958 uint8_t i = *idx; 1959 1960 for (; i < RTE_DIM(i40e_supported_patterns); i++) { 1961 if (i40e_match_pattern(i40e_supported_patterns[i].items, 1962 pattern)) { 1963 parse_filter = i40e_supported_patterns[i].parse_filter; 1964 break; 1965 } 1966 } 1967 1968 *idx = ++i; 1969 1970 return parse_filter; 1971 } 1972 1973 /* Parse attributes */ 1974 static int 1975 i40e_flow_parse_attr(const struct rte_flow_attr *attr, 1976 struct rte_flow_error *error) 1977 { 1978 /* Must be input direction */ 1979 if (!attr->ingress) { 1980 rte_flow_error_set(error, EINVAL, 1981 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1982 attr, "Only support ingress."); 1983 return -rte_errno; 1984 } 1985 1986 /* Not supported */ 1987 if (attr->egress) { 1988 rte_flow_error_set(error, EINVAL, 1989 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, 1990 attr, "Not support egress."); 1991 return -rte_errno; 1992 } 1993 1994 /* Not supported */ 1995 if (attr->priority) { 1996 rte_flow_error_set(error, EINVAL, 1997 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1998 attr, "Not support priority."); 1999 return -rte_errno; 2000 } 2001 2002 /* Not supported */ 2003 if (attr->group) { 2004 rte_flow_error_set(error, EINVAL, 2005 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 2006 attr, "Not support group."); 2007 return -rte_errno; 2008 } 2009 2010 return 0; 2011 } 2012 2013 static uint16_t 2014 i40e_get_outer_vlan(struct rte_eth_dev *dev) 2015 { 2016 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2017 int qinq = dev->data->dev_conf.rxmode.offloads & 2018 DEV_RX_OFFLOAD_VLAN_EXTEND; 2019 uint64_t reg_r = 0; 2020 uint16_t reg_id; 2021 uint16_t tpid; 2022 2023 if (qinq) 2024 reg_id = 2; 2025 else 2026 reg_id = 3; 2027 2028 i40e_aq_debug_read_register(hw, I40E_GL_SWT_L2TAGCTRL(reg_id), 2029 ®_r, NULL); 2030 2031 tpid = (reg_r >> I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_SHIFT) & 0xFFFF; 2032 2033 return tpid; 2034 } 2035 2036 /* 1. Last in item should be NULL as range is not supported. 2037 * 2. Supported filter types: MAC_ETHTYPE and ETHTYPE. 2038 * 3. SRC mac_addr mask should be 00:00:00:00:00:00. 2039 * 4. DST mac_addr mask should be 00:00:00:00:00:00 or 2040 * FF:FF:FF:FF:FF:FF 2041 * 5. Ether_type mask should be 0xFFFF. 2042 */ 2043 static int 2044 i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, 2045 const struct rte_flow_item *pattern, 2046 struct rte_flow_error *error, 2047 struct rte_eth_ethertype_filter *filter) 2048 { 2049 const struct rte_flow_item *item = pattern; 2050 const struct rte_flow_item_eth *eth_spec; 2051 const struct rte_flow_item_eth *eth_mask; 2052 enum rte_flow_item_type item_type; 2053 2054 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 2055 if (item->last) { 2056 rte_flow_error_set(error, EINVAL, 2057 RTE_FLOW_ERROR_TYPE_ITEM, 2058 item, 2059 "Not support range"); 2060 return -rte_errno; 2061 } 2062 item_type = item->type; 2063 switch (item_type) { 2064 case RTE_FLOW_ITEM_TYPE_ETH: 2065 eth_spec = item->spec; 2066 eth_mask = item->mask; 2067 /* Get the MAC info. */ 2068 if (!eth_spec || !eth_mask) { 2069 rte_flow_error_set(error, EINVAL, 2070 RTE_FLOW_ERROR_TYPE_ITEM, 2071 item, 2072 "NULL ETH spec/mask"); 2073 return -rte_errno; 2074 } 2075 2076 /* Mask bits of source MAC address must be full of 0. 2077 * Mask bits of destination MAC address must be full 2078 * of 1 or full of 0. 2079 */ 2080 if (!rte_is_zero_ether_addr(ð_mask->src) || 2081 (!rte_is_zero_ether_addr(ð_mask->dst) && 2082 !rte_is_broadcast_ether_addr(ð_mask->dst))) { 2083 rte_flow_error_set(error, EINVAL, 2084 RTE_FLOW_ERROR_TYPE_ITEM, 2085 item, 2086 "Invalid MAC_addr mask"); 2087 return -rte_errno; 2088 } 2089 2090 if ((eth_mask->type & UINT16_MAX) != UINT16_MAX) { 2091 rte_flow_error_set(error, EINVAL, 2092 RTE_FLOW_ERROR_TYPE_ITEM, 2093 item, 2094 "Invalid ethertype mask"); 2095 return -rte_errno; 2096 } 2097 2098 /* If mask bits of destination MAC address 2099 * are full of 1, set RTE_ETHTYPE_FLAGS_MAC. 2100 */ 2101 if (rte_is_broadcast_ether_addr(ð_mask->dst)) { 2102 filter->mac_addr = eth_spec->dst; 2103 filter->flags |= RTE_ETHTYPE_FLAGS_MAC; 2104 } else { 2105 filter->flags &= ~RTE_ETHTYPE_FLAGS_MAC; 2106 } 2107 filter->ether_type = rte_be_to_cpu_16(eth_spec->type); 2108 2109 if (filter->ether_type == RTE_ETHER_TYPE_IPV4 || 2110 filter->ether_type == RTE_ETHER_TYPE_IPV6 || 2111 filter->ether_type == RTE_ETHER_TYPE_LLDP || 2112 filter->ether_type == i40e_get_outer_vlan(dev)) { 2113 rte_flow_error_set(error, EINVAL, 2114 RTE_FLOW_ERROR_TYPE_ITEM, 2115 item, 2116 "Unsupported ether_type in" 2117 " control packet filter."); 2118 return -rte_errno; 2119 } 2120 break; 2121 default: 2122 break; 2123 } 2124 } 2125 2126 return 0; 2127 } 2128 2129 /* Ethertype action only supports QUEUE or DROP. */ 2130 static int 2131 i40e_flow_parse_ethertype_action(struct rte_eth_dev *dev, 2132 const struct rte_flow_action *actions, 2133 struct rte_flow_error *error, 2134 struct rte_eth_ethertype_filter *filter) 2135 { 2136 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 2137 const struct rte_flow_action *act; 2138 const struct rte_flow_action_queue *act_q; 2139 uint32_t index = 0; 2140 2141 /* Check if the first non-void action is QUEUE or DROP. */ 2142 NEXT_ITEM_OF_ACTION(act, actions, index); 2143 if (act->type != RTE_FLOW_ACTION_TYPE_QUEUE && 2144 act->type != RTE_FLOW_ACTION_TYPE_DROP) { 2145 rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 2146 act, "Not supported action."); 2147 return -rte_errno; 2148 } 2149 2150 if (act->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 2151 act_q = act->conf; 2152 filter->queue = act_q->index; 2153 if (filter->queue >= pf->dev_data->nb_rx_queues) { 2154 rte_flow_error_set(error, EINVAL, 2155 RTE_FLOW_ERROR_TYPE_ACTION, 2156 act, "Invalid queue ID for" 2157 " ethertype_filter."); 2158 return -rte_errno; 2159 } 2160 } else { 2161 filter->flags |= RTE_ETHTYPE_FLAGS_DROP; 2162 } 2163 2164 /* Check if the next non-void item is END */ 2165 index++; 2166 NEXT_ITEM_OF_ACTION(act, actions, index); 2167 if (act->type != RTE_FLOW_ACTION_TYPE_END) { 2168 rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 2169 act, "Not supported action."); 2170 return -rte_errno; 2171 } 2172 2173 return 0; 2174 } 2175 2176 static int 2177 i40e_flow_parse_ethertype_filter(struct rte_eth_dev *dev, 2178 const struct rte_flow_attr *attr, 2179 const struct rte_flow_item pattern[], 2180 const struct rte_flow_action actions[], 2181 struct rte_flow_error *error, 2182 union i40e_filter_t *filter) 2183 { 2184 struct rte_eth_ethertype_filter *ethertype_filter = 2185 &filter->ethertype_filter; 2186 int ret; 2187 2188 ret = i40e_flow_parse_ethertype_pattern(dev, pattern, error, 2189 ethertype_filter); 2190 if (ret) 2191 return ret; 2192 2193 ret = i40e_flow_parse_ethertype_action(dev, actions, error, 2194 ethertype_filter); 2195 if (ret) 2196 return ret; 2197 2198 ret = i40e_flow_parse_attr(attr, error); 2199 if (ret) 2200 return ret; 2201 2202 cons_filter_type = RTE_ETH_FILTER_ETHERTYPE; 2203 2204 return ret; 2205 } 2206 2207 static int 2208 i40e_flow_check_raw_item(const struct rte_flow_item *item, 2209 const struct rte_flow_item_raw *raw_spec, 2210 struct rte_flow_error *error) 2211 { 2212 if (!raw_spec->relative) { 2213 rte_flow_error_set(error, EINVAL, 2214 RTE_FLOW_ERROR_TYPE_ITEM, 2215 item, 2216 "Relative should be 1."); 2217 return -rte_errno; 2218 } 2219 2220 if (raw_spec->offset % sizeof(uint16_t)) { 2221 rte_flow_error_set(error, EINVAL, 2222 RTE_FLOW_ERROR_TYPE_ITEM, 2223 item, 2224 "Offset should be even."); 2225 return -rte_errno; 2226 } 2227 2228 if (raw_spec->search || raw_spec->limit) { 2229 rte_flow_error_set(error, EINVAL, 2230 RTE_FLOW_ERROR_TYPE_ITEM, 2231 item, 2232 "search or limit is not supported."); 2233 return -rte_errno; 2234 } 2235 2236 if (raw_spec->offset < 0) { 2237 rte_flow_error_set(error, EINVAL, 2238 RTE_FLOW_ERROR_TYPE_ITEM, 2239 item, 2240 "Offset should be non-negative."); 2241 return -rte_errno; 2242 } 2243 return 0; 2244 } 2245 2246 2247 static uint8_t 2248 i40e_flow_fdir_get_pctype_value(struct i40e_pf *pf, 2249 enum rte_flow_item_type item_type, 2250 struct i40e_fdir_filter_conf *filter) 2251 { 2252 struct i40e_customized_pctype *cus_pctype = NULL; 2253 2254 switch (item_type) { 2255 case RTE_FLOW_ITEM_TYPE_GTPC: 2256 cus_pctype = i40e_find_customized_pctype(pf, 2257 I40E_CUSTOMIZED_GTPC); 2258 break; 2259 case RTE_FLOW_ITEM_TYPE_GTPU: 2260 if (!filter->input.flow_ext.inner_ip) 2261 cus_pctype = i40e_find_customized_pctype(pf, 2262 I40E_CUSTOMIZED_GTPU); 2263 else if (filter->input.flow_ext.iip_type == 2264 I40E_FDIR_IPTYPE_IPV4) 2265 cus_pctype = i40e_find_customized_pctype(pf, 2266 I40E_CUSTOMIZED_GTPU_IPV4); 2267 else if (filter->input.flow_ext.iip_type == 2268 I40E_FDIR_IPTYPE_IPV6) 2269 cus_pctype = i40e_find_customized_pctype(pf, 2270 I40E_CUSTOMIZED_GTPU_IPV6); 2271 break; 2272 case RTE_FLOW_ITEM_TYPE_L2TPV3OIP: 2273 if (filter->input.flow_ext.oip_type == I40E_FDIR_IPTYPE_IPV4) 2274 cus_pctype = i40e_find_customized_pctype(pf, 2275 I40E_CUSTOMIZED_IPV4_L2TPV3); 2276 else if (filter->input.flow_ext.oip_type == 2277 I40E_FDIR_IPTYPE_IPV6) 2278 cus_pctype = i40e_find_customized_pctype(pf, 2279 I40E_CUSTOMIZED_IPV6_L2TPV3); 2280 break; 2281 case RTE_FLOW_ITEM_TYPE_ESP: 2282 if (!filter->input.flow_ext.is_udp) { 2283 if (filter->input.flow_ext.oip_type == 2284 I40E_FDIR_IPTYPE_IPV4) 2285 cus_pctype = i40e_find_customized_pctype(pf, 2286 I40E_CUSTOMIZED_ESP_IPV4); 2287 else if (filter->input.flow_ext.oip_type == 2288 I40E_FDIR_IPTYPE_IPV6) 2289 cus_pctype = i40e_find_customized_pctype(pf, 2290 I40E_CUSTOMIZED_ESP_IPV6); 2291 } else { 2292 if (filter->input.flow_ext.oip_type == 2293 I40E_FDIR_IPTYPE_IPV4) 2294 cus_pctype = i40e_find_customized_pctype(pf, 2295 I40E_CUSTOMIZED_ESP_IPV4_UDP); 2296 else if (filter->input.flow_ext.oip_type == 2297 I40E_FDIR_IPTYPE_IPV6) 2298 cus_pctype = i40e_find_customized_pctype(pf, 2299 I40E_CUSTOMIZED_ESP_IPV6_UDP); 2300 filter->input.flow_ext.is_udp = false; 2301 } 2302 break; 2303 default: 2304 PMD_DRV_LOG(ERR, "Unsupported item type"); 2305 break; 2306 } 2307 2308 if (cus_pctype && cus_pctype->valid) 2309 return cus_pctype->pctype; 2310 2311 return I40E_FILTER_PCTYPE_INVALID; 2312 } 2313 2314 static void 2315 i40e_flow_set_filter_spi(struct i40e_fdir_filter_conf *filter, 2316 const struct rte_flow_item_esp *esp_spec) 2317 { 2318 if (filter->input.flow_ext.oip_type == 2319 I40E_FDIR_IPTYPE_IPV4) { 2320 if (filter->input.flow_ext.is_udp) 2321 filter->input.flow.esp_ipv4_udp_flow.spi = 2322 esp_spec->hdr.spi; 2323 else 2324 filter->input.flow.esp_ipv4_flow.spi = 2325 esp_spec->hdr.spi; 2326 } 2327 if (filter->input.flow_ext.oip_type == 2328 I40E_FDIR_IPTYPE_IPV6) { 2329 if (filter->input.flow_ext.is_udp) 2330 filter->input.flow.esp_ipv6_udp_flow.spi = 2331 esp_spec->hdr.spi; 2332 else 2333 filter->input.flow.esp_ipv6_flow.spi = 2334 esp_spec->hdr.spi; 2335 } 2336 } 2337 2338 /* 1. Last in item should be NULL as range is not supported. 2339 * 2. Supported patterns: refer to array i40e_supported_patterns. 2340 * 3. Default supported flow type and input set: refer to array 2341 * valid_fdir_inset_table in i40e_ethdev.c. 2342 * 4. Mask of fields which need to be matched should be 2343 * filled with 1. 2344 * 5. Mask of fields which needn't to be matched should be 2345 * filled with 0. 2346 * 6. GTP profile supports GTPv1 only. 2347 * 7. GTP-C response message ('source_port' = 2123) is not supported. 2348 */ 2349 static int 2350 i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, 2351 const struct rte_flow_attr *attr, 2352 const struct rte_flow_item *pattern, 2353 struct rte_flow_error *error, 2354 struct i40e_fdir_filter_conf *filter) 2355 { 2356 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 2357 const struct rte_flow_item *item = pattern; 2358 const struct rte_flow_item_eth *eth_spec, *eth_mask; 2359 const struct rte_flow_item_vlan *vlan_spec, *vlan_mask; 2360 const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_last, *ipv4_mask; 2361 const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask; 2362 const struct rte_flow_item_tcp *tcp_spec, *tcp_mask; 2363 const struct rte_flow_item_udp *udp_spec, *udp_mask; 2364 const struct rte_flow_item_sctp *sctp_spec, *sctp_mask; 2365 const struct rte_flow_item_gtp *gtp_spec, *gtp_mask; 2366 const struct rte_flow_item_esp *esp_spec, *esp_mask; 2367 const struct rte_flow_item_raw *raw_spec, *raw_mask; 2368 const struct rte_flow_item_vf *vf_spec; 2369 const struct rte_flow_item_l2tpv3oip *l2tpv3oip_spec, *l2tpv3oip_mask; 2370 2371 uint8_t pctype = 0; 2372 uint64_t input_set = I40E_INSET_NONE; 2373 enum rte_flow_item_type item_type; 2374 enum rte_flow_item_type next_type; 2375 enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END; 2376 enum rte_flow_item_type cus_proto = RTE_FLOW_ITEM_TYPE_END; 2377 uint32_t i, j; 2378 uint8_t ipv6_addr_mask[16] = { 2379 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 2380 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; 2381 enum i40e_flxpld_layer_idx layer_idx = I40E_FLXPLD_L2_IDX; 2382 uint8_t raw_id = 0; 2383 int32_t off_arr[I40E_MAX_FLXPLD_FIED]; 2384 uint16_t len_arr[I40E_MAX_FLXPLD_FIED]; 2385 struct i40e_fdir_flex_pit flex_pit; 2386 uint8_t next_dst_off = 0; 2387 uint16_t flex_size; 2388 uint16_t ether_type; 2389 uint32_t vtc_flow_cpu; 2390 bool outer_ip = true; 2391 uint8_t field_idx; 2392 int ret; 2393 2394 memset(off_arr, 0, sizeof(off_arr)); 2395 memset(len_arr, 0, sizeof(len_arr)); 2396 filter->input.flow_ext.customized_pctype = false; 2397 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 2398 if (item->last && item->type != RTE_FLOW_ITEM_TYPE_IPV4) { 2399 rte_flow_error_set(error, EINVAL, 2400 RTE_FLOW_ERROR_TYPE_ITEM, 2401 item, 2402 "Not support range"); 2403 return -rte_errno; 2404 } 2405 item_type = item->type; 2406 switch (item_type) { 2407 case RTE_FLOW_ITEM_TYPE_ETH: 2408 eth_spec = item->spec; 2409 eth_mask = item->mask; 2410 next_type = (item + 1)->type; 2411 2412 if (next_type == RTE_FLOW_ITEM_TYPE_END && 2413 (!eth_spec || !eth_mask)) { 2414 rte_flow_error_set(error, EINVAL, 2415 RTE_FLOW_ERROR_TYPE_ITEM, 2416 item, 2417 "NULL eth spec/mask."); 2418 return -rte_errno; 2419 } 2420 2421 if (eth_spec && eth_mask) { 2422 if (rte_is_broadcast_ether_addr(ð_mask->dst) && 2423 rte_is_zero_ether_addr(ð_mask->src)) { 2424 filter->input.flow.l2_flow.dst = 2425 eth_spec->dst; 2426 input_set |= I40E_INSET_DMAC; 2427 } else if (rte_is_zero_ether_addr(ð_mask->dst) && 2428 rte_is_broadcast_ether_addr(ð_mask->src)) { 2429 filter->input.flow.l2_flow.src = 2430 eth_spec->src; 2431 input_set |= I40E_INSET_SMAC; 2432 } else if (rte_is_broadcast_ether_addr(ð_mask->dst) && 2433 rte_is_broadcast_ether_addr(ð_mask->src)) { 2434 filter->input.flow.l2_flow.dst = 2435 eth_spec->dst; 2436 filter->input.flow.l2_flow.src = 2437 eth_spec->src; 2438 input_set |= (I40E_INSET_DMAC | I40E_INSET_SMAC); 2439 } else if (!rte_is_zero_ether_addr(ð_mask->src) || 2440 !rte_is_zero_ether_addr(ð_mask->dst)) { 2441 rte_flow_error_set(error, EINVAL, 2442 RTE_FLOW_ERROR_TYPE_ITEM, 2443 item, 2444 "Invalid MAC_addr mask."); 2445 return -rte_errno; 2446 } 2447 } 2448 if (eth_spec && eth_mask && 2449 next_type == RTE_FLOW_ITEM_TYPE_END) { 2450 if (eth_mask->type != RTE_BE16(0xffff)) { 2451 rte_flow_error_set(error, EINVAL, 2452 RTE_FLOW_ERROR_TYPE_ITEM, 2453 item, 2454 "Invalid type mask."); 2455 return -rte_errno; 2456 } 2457 2458 ether_type = rte_be_to_cpu_16(eth_spec->type); 2459 2460 if (next_type == RTE_FLOW_ITEM_TYPE_VLAN || 2461 ether_type == RTE_ETHER_TYPE_IPV4 || 2462 ether_type == RTE_ETHER_TYPE_IPV6 || 2463 ether_type == i40e_get_outer_vlan(dev)) { 2464 rte_flow_error_set(error, EINVAL, 2465 RTE_FLOW_ERROR_TYPE_ITEM, 2466 item, 2467 "Unsupported ether_type."); 2468 return -rte_errno; 2469 } 2470 input_set |= I40E_INSET_LAST_ETHER_TYPE; 2471 filter->input.flow.l2_flow.ether_type = 2472 eth_spec->type; 2473 } 2474 2475 pctype = I40E_FILTER_PCTYPE_L2_PAYLOAD; 2476 layer_idx = I40E_FLXPLD_L2_IDX; 2477 2478 break; 2479 case RTE_FLOW_ITEM_TYPE_VLAN: 2480 vlan_spec = item->spec; 2481 vlan_mask = item->mask; 2482 2483 RTE_ASSERT(!(input_set & I40E_INSET_LAST_ETHER_TYPE)); 2484 if (vlan_spec && vlan_mask) { 2485 if (vlan_mask->tci != 2486 rte_cpu_to_be_16(I40E_VLAN_TCI_MASK) && 2487 vlan_mask->tci != 2488 rte_cpu_to_be_16(I40E_VLAN_PRI_MASK) && 2489 vlan_mask->tci != 2490 rte_cpu_to_be_16(I40E_VLAN_CFI_MASK) && 2491 vlan_mask->tci != 2492 rte_cpu_to_be_16(I40E_VLAN_VID_MASK)) { 2493 rte_flow_error_set(error, EINVAL, 2494 RTE_FLOW_ERROR_TYPE_ITEM, 2495 item, 2496 "Unsupported TCI mask."); 2497 } 2498 input_set |= I40E_INSET_VLAN_INNER; 2499 filter->input.flow_ext.vlan_tci = 2500 vlan_spec->tci; 2501 } 2502 if (vlan_spec && vlan_mask && vlan_mask->inner_type) { 2503 if (vlan_mask->inner_type != RTE_BE16(0xffff)) { 2504 rte_flow_error_set(error, EINVAL, 2505 RTE_FLOW_ERROR_TYPE_ITEM, 2506 item, 2507 "Invalid inner_type" 2508 " mask."); 2509 return -rte_errno; 2510 } 2511 2512 ether_type = 2513 rte_be_to_cpu_16(vlan_spec->inner_type); 2514 2515 if (ether_type == RTE_ETHER_TYPE_IPV4 || 2516 ether_type == RTE_ETHER_TYPE_IPV6 || 2517 ether_type == i40e_get_outer_vlan(dev)) { 2518 rte_flow_error_set(error, EINVAL, 2519 RTE_FLOW_ERROR_TYPE_ITEM, 2520 item, 2521 "Unsupported inner_type."); 2522 return -rte_errno; 2523 } 2524 input_set |= I40E_INSET_LAST_ETHER_TYPE; 2525 filter->input.flow.l2_flow.ether_type = 2526 vlan_spec->inner_type; 2527 } 2528 2529 pctype = I40E_FILTER_PCTYPE_L2_PAYLOAD; 2530 layer_idx = I40E_FLXPLD_L2_IDX; 2531 2532 break; 2533 case RTE_FLOW_ITEM_TYPE_IPV4: 2534 l3 = RTE_FLOW_ITEM_TYPE_IPV4; 2535 ipv4_spec = item->spec; 2536 ipv4_mask = item->mask; 2537 ipv4_last = item->last; 2538 pctype = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2539 layer_idx = I40E_FLXPLD_L3_IDX; 2540 2541 if (ipv4_last) { 2542 if (!ipv4_spec || !ipv4_mask || !outer_ip) { 2543 rte_flow_error_set(error, EINVAL, 2544 RTE_FLOW_ERROR_TYPE_ITEM, 2545 item, 2546 "Not support range"); 2547 return -rte_errno; 2548 } 2549 /* Only fragment_offset supports range */ 2550 if (ipv4_last->hdr.version_ihl || 2551 ipv4_last->hdr.type_of_service || 2552 ipv4_last->hdr.total_length || 2553 ipv4_last->hdr.packet_id || 2554 ipv4_last->hdr.time_to_live || 2555 ipv4_last->hdr.next_proto_id || 2556 ipv4_last->hdr.hdr_checksum || 2557 ipv4_last->hdr.src_addr || 2558 ipv4_last->hdr.dst_addr) { 2559 rte_flow_error_set(error, EINVAL, 2560 RTE_FLOW_ERROR_TYPE_ITEM, 2561 item, 2562 "Not support range"); 2563 return -rte_errno; 2564 } 2565 } 2566 if (ipv4_spec && ipv4_mask && outer_ip) { 2567 /* Check IPv4 mask and update input set */ 2568 if (ipv4_mask->hdr.version_ihl || 2569 ipv4_mask->hdr.total_length || 2570 ipv4_mask->hdr.packet_id || 2571 ipv4_mask->hdr.hdr_checksum) { 2572 rte_flow_error_set(error, EINVAL, 2573 RTE_FLOW_ERROR_TYPE_ITEM, 2574 item, 2575 "Invalid IPv4 mask."); 2576 return -rte_errno; 2577 } 2578 2579 if (ipv4_mask->hdr.src_addr == UINT32_MAX) 2580 input_set |= I40E_INSET_IPV4_SRC; 2581 if (ipv4_mask->hdr.dst_addr == UINT32_MAX) 2582 input_set |= I40E_INSET_IPV4_DST; 2583 if (ipv4_mask->hdr.type_of_service == UINT8_MAX) 2584 input_set |= I40E_INSET_IPV4_TOS; 2585 if (ipv4_mask->hdr.time_to_live == UINT8_MAX) 2586 input_set |= I40E_INSET_IPV4_TTL; 2587 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX) 2588 input_set |= I40E_INSET_IPV4_PROTO; 2589 2590 /* Check if it is fragment. */ 2591 uint16_t frag_mask = 2592 ipv4_mask->hdr.fragment_offset; 2593 uint16_t frag_spec = 2594 ipv4_spec->hdr.fragment_offset; 2595 uint16_t frag_last = 0; 2596 if (ipv4_last) 2597 frag_last = 2598 ipv4_last->hdr.fragment_offset; 2599 if (frag_mask) { 2600 frag_mask = rte_be_to_cpu_16(frag_mask); 2601 frag_spec = rte_be_to_cpu_16(frag_spec); 2602 frag_last = rte_be_to_cpu_16(frag_last); 2603 /* frag_off mask has to be 0x3fff */ 2604 if (frag_mask != 2605 (RTE_IPV4_HDR_OFFSET_MASK | 2606 RTE_IPV4_HDR_MF_FLAG)) { 2607 rte_flow_error_set(error, 2608 EINVAL, 2609 RTE_FLOW_ERROR_TYPE_ITEM, 2610 item, 2611 "Invalid IPv4 fragment_offset mask"); 2612 return -rte_errno; 2613 } 2614 /* 2615 * non-frag rule: 2616 * mask=0x3fff,spec=0 2617 * frag rule: 2618 * mask=0x3fff,spec=0x8,last=0x2000 2619 */ 2620 if (frag_spec == 2621 (1 << RTE_IPV4_HDR_FO_SHIFT) && 2622 frag_last == RTE_IPV4_HDR_MF_FLAG) { 2623 pctype = 2624 I40E_FILTER_PCTYPE_FRAG_IPV4; 2625 } else if (frag_spec || frag_last) { 2626 rte_flow_error_set(error, 2627 EINVAL, 2628 RTE_FLOW_ERROR_TYPE_ITEM, 2629 item, 2630 "Invalid IPv4 fragment_offset rule"); 2631 return -rte_errno; 2632 } 2633 } else if (frag_spec || frag_last) { 2634 rte_flow_error_set(error, 2635 EINVAL, 2636 RTE_FLOW_ERROR_TYPE_ITEM, 2637 item, 2638 "Invalid fragment_offset"); 2639 return -rte_errno; 2640 } 2641 2642 if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) { 2643 if (input_set & (I40E_INSET_IPV4_SRC | 2644 I40E_INSET_IPV4_DST | I40E_INSET_IPV4_TOS | 2645 I40E_INSET_IPV4_TTL | I40E_INSET_IPV4_PROTO)) { 2646 rte_flow_error_set(error, EINVAL, 2647 RTE_FLOW_ERROR_TYPE_ITEM, 2648 item, 2649 "L2 and L3 input set are exclusive."); 2650 return -rte_errno; 2651 } 2652 } else { 2653 /* Get the filter info */ 2654 filter->input.flow.ip4_flow.proto = 2655 ipv4_spec->hdr.next_proto_id; 2656 filter->input.flow.ip4_flow.tos = 2657 ipv4_spec->hdr.type_of_service; 2658 filter->input.flow.ip4_flow.ttl = 2659 ipv4_spec->hdr.time_to_live; 2660 filter->input.flow.ip4_flow.src_ip = 2661 ipv4_spec->hdr.src_addr; 2662 filter->input.flow.ip4_flow.dst_ip = 2663 ipv4_spec->hdr.dst_addr; 2664 2665 filter->input.flow_ext.inner_ip = false; 2666 filter->input.flow_ext.oip_type = 2667 I40E_FDIR_IPTYPE_IPV4; 2668 } 2669 } else if (!ipv4_spec && !ipv4_mask && !outer_ip) { 2670 filter->input.flow_ext.inner_ip = true; 2671 filter->input.flow_ext.iip_type = 2672 I40E_FDIR_IPTYPE_IPV4; 2673 } else if (!ipv4_spec && !ipv4_mask && outer_ip) { 2674 filter->input.flow_ext.inner_ip = false; 2675 filter->input.flow_ext.oip_type = 2676 I40E_FDIR_IPTYPE_IPV4; 2677 } else if ((ipv4_spec || ipv4_mask) && !outer_ip) { 2678 rte_flow_error_set(error, EINVAL, 2679 RTE_FLOW_ERROR_TYPE_ITEM, 2680 item, 2681 "Invalid inner IPv4 mask."); 2682 return -rte_errno; 2683 } 2684 2685 if (outer_ip) 2686 outer_ip = false; 2687 2688 break; 2689 case RTE_FLOW_ITEM_TYPE_IPV6: 2690 l3 = RTE_FLOW_ITEM_TYPE_IPV6; 2691 ipv6_spec = item->spec; 2692 ipv6_mask = item->mask; 2693 pctype = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER; 2694 layer_idx = I40E_FLXPLD_L3_IDX; 2695 2696 if (ipv6_spec && ipv6_mask && outer_ip) { 2697 /* Check IPv6 mask and update input set */ 2698 if (ipv6_mask->hdr.payload_len) { 2699 rte_flow_error_set(error, EINVAL, 2700 RTE_FLOW_ERROR_TYPE_ITEM, 2701 item, 2702 "Invalid IPv6 mask"); 2703 return -rte_errno; 2704 } 2705 2706 if (!memcmp(ipv6_mask->hdr.src_addr, 2707 ipv6_addr_mask, 2708 RTE_DIM(ipv6_mask->hdr.src_addr))) 2709 input_set |= I40E_INSET_IPV6_SRC; 2710 if (!memcmp(ipv6_mask->hdr.dst_addr, 2711 ipv6_addr_mask, 2712 RTE_DIM(ipv6_mask->hdr.dst_addr))) 2713 input_set |= I40E_INSET_IPV6_DST; 2714 2715 if ((ipv6_mask->hdr.vtc_flow & 2716 rte_cpu_to_be_32(I40E_IPV6_TC_MASK)) 2717 == rte_cpu_to_be_32(I40E_IPV6_TC_MASK)) 2718 input_set |= I40E_INSET_IPV6_TC; 2719 if (ipv6_mask->hdr.proto == UINT8_MAX) 2720 input_set |= I40E_INSET_IPV6_NEXT_HDR; 2721 if (ipv6_mask->hdr.hop_limits == UINT8_MAX) 2722 input_set |= I40E_INSET_IPV6_HOP_LIMIT; 2723 2724 /* Get filter info */ 2725 vtc_flow_cpu = 2726 rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow); 2727 filter->input.flow.ipv6_flow.tc = 2728 (uint8_t)(vtc_flow_cpu >> 2729 I40E_FDIR_IPv6_TC_OFFSET); 2730 filter->input.flow.ipv6_flow.proto = 2731 ipv6_spec->hdr.proto; 2732 filter->input.flow.ipv6_flow.hop_limits = 2733 ipv6_spec->hdr.hop_limits; 2734 2735 filter->input.flow_ext.inner_ip = false; 2736 filter->input.flow_ext.oip_type = 2737 I40E_FDIR_IPTYPE_IPV6; 2738 2739 rte_memcpy(filter->input.flow.ipv6_flow.src_ip, 2740 ipv6_spec->hdr.src_addr, 16); 2741 rte_memcpy(filter->input.flow.ipv6_flow.dst_ip, 2742 ipv6_spec->hdr.dst_addr, 16); 2743 2744 /* Check if it is fragment. */ 2745 if (ipv6_spec->hdr.proto == 2746 I40E_IPV6_FRAG_HEADER) 2747 pctype = I40E_FILTER_PCTYPE_FRAG_IPV6; 2748 } else if (!ipv6_spec && !ipv6_mask && !outer_ip) { 2749 filter->input.flow_ext.inner_ip = true; 2750 filter->input.flow_ext.iip_type = 2751 I40E_FDIR_IPTYPE_IPV6; 2752 } else if (!ipv6_spec && !ipv6_mask && outer_ip) { 2753 filter->input.flow_ext.inner_ip = false; 2754 filter->input.flow_ext.oip_type = 2755 I40E_FDIR_IPTYPE_IPV6; 2756 } else if ((ipv6_spec || ipv6_mask) && !outer_ip) { 2757 rte_flow_error_set(error, EINVAL, 2758 RTE_FLOW_ERROR_TYPE_ITEM, 2759 item, 2760 "Invalid inner IPv6 mask"); 2761 return -rte_errno; 2762 } 2763 2764 if (outer_ip) 2765 outer_ip = false; 2766 break; 2767 case RTE_FLOW_ITEM_TYPE_TCP: 2768 tcp_spec = item->spec; 2769 tcp_mask = item->mask; 2770 2771 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) 2772 pctype = 2773 I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2774 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) 2775 pctype = 2776 I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2777 if (tcp_spec && tcp_mask) { 2778 /* Check TCP mask and update input set */ 2779 if (tcp_mask->hdr.sent_seq || 2780 tcp_mask->hdr.recv_ack || 2781 tcp_mask->hdr.data_off || 2782 tcp_mask->hdr.tcp_flags || 2783 tcp_mask->hdr.rx_win || 2784 tcp_mask->hdr.cksum || 2785 tcp_mask->hdr.tcp_urp) { 2786 rte_flow_error_set(error, EINVAL, 2787 RTE_FLOW_ERROR_TYPE_ITEM, 2788 item, 2789 "Invalid TCP mask"); 2790 return -rte_errno; 2791 } 2792 2793 if (tcp_mask->hdr.src_port == UINT16_MAX) 2794 input_set |= I40E_INSET_SRC_PORT; 2795 if (tcp_mask->hdr.dst_port == UINT16_MAX) 2796 input_set |= I40E_INSET_DST_PORT; 2797 2798 if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) { 2799 if (input_set & 2800 (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) { 2801 rte_flow_error_set(error, EINVAL, 2802 RTE_FLOW_ERROR_TYPE_ITEM, 2803 item, 2804 "L2 and L4 input set are exclusive."); 2805 return -rte_errno; 2806 } 2807 } else { 2808 /* Get filter info */ 2809 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { 2810 filter->input.flow.tcp4_flow.src_port = 2811 tcp_spec->hdr.src_port; 2812 filter->input.flow.tcp4_flow.dst_port = 2813 tcp_spec->hdr.dst_port; 2814 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { 2815 filter->input.flow.tcp6_flow.src_port = 2816 tcp_spec->hdr.src_port; 2817 filter->input.flow.tcp6_flow.dst_port = 2818 tcp_spec->hdr.dst_port; 2819 } 2820 } 2821 } 2822 2823 layer_idx = I40E_FLXPLD_L4_IDX; 2824 2825 break; 2826 case RTE_FLOW_ITEM_TYPE_UDP: 2827 udp_spec = item->spec; 2828 udp_mask = item->mask; 2829 2830 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) 2831 pctype = 2832 I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2833 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) 2834 pctype = 2835 I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2836 2837 if (udp_spec && udp_mask) { 2838 /* Check UDP mask and update input set*/ 2839 if (udp_mask->hdr.dgram_len || 2840 udp_mask->hdr.dgram_cksum) { 2841 rte_flow_error_set(error, EINVAL, 2842 RTE_FLOW_ERROR_TYPE_ITEM, 2843 item, 2844 "Invalid UDP mask"); 2845 return -rte_errno; 2846 } 2847 2848 if (udp_mask->hdr.src_port == UINT16_MAX) 2849 input_set |= I40E_INSET_SRC_PORT; 2850 if (udp_mask->hdr.dst_port == UINT16_MAX) 2851 input_set |= I40E_INSET_DST_PORT; 2852 2853 if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) { 2854 if (input_set & 2855 (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) { 2856 rte_flow_error_set(error, EINVAL, 2857 RTE_FLOW_ERROR_TYPE_ITEM, 2858 item, 2859 "L2 and L4 input set are exclusive."); 2860 return -rte_errno; 2861 } 2862 } else { 2863 /* Get filter info */ 2864 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { 2865 filter->input.flow.udp4_flow.src_port = 2866 udp_spec->hdr.src_port; 2867 filter->input.flow.udp4_flow.dst_port = 2868 udp_spec->hdr.dst_port; 2869 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { 2870 filter->input.flow.udp6_flow.src_port = 2871 udp_spec->hdr.src_port; 2872 filter->input.flow.udp6_flow.dst_port = 2873 udp_spec->hdr.dst_port; 2874 } 2875 } 2876 } 2877 filter->input.flow_ext.is_udp = true; 2878 layer_idx = I40E_FLXPLD_L4_IDX; 2879 2880 break; 2881 case RTE_FLOW_ITEM_TYPE_GTPC: 2882 case RTE_FLOW_ITEM_TYPE_GTPU: 2883 if (!pf->gtp_support) { 2884 rte_flow_error_set(error, EINVAL, 2885 RTE_FLOW_ERROR_TYPE_ITEM, 2886 item, 2887 "Unsupported protocol"); 2888 return -rte_errno; 2889 } 2890 2891 gtp_spec = item->spec; 2892 gtp_mask = item->mask; 2893 2894 if (gtp_spec && gtp_mask) { 2895 if (gtp_mask->v_pt_rsv_flags || 2896 gtp_mask->msg_type || 2897 gtp_mask->msg_len || 2898 gtp_mask->teid != UINT32_MAX) { 2899 rte_flow_error_set(error, EINVAL, 2900 RTE_FLOW_ERROR_TYPE_ITEM, 2901 item, 2902 "Invalid GTP mask"); 2903 return -rte_errno; 2904 } 2905 2906 filter->input.flow.gtp_flow.teid = 2907 gtp_spec->teid; 2908 filter->input.flow_ext.customized_pctype = true; 2909 cus_proto = item_type; 2910 } 2911 break; 2912 case RTE_FLOW_ITEM_TYPE_ESP: 2913 if (!pf->esp_support) { 2914 rte_flow_error_set(error, EINVAL, 2915 RTE_FLOW_ERROR_TYPE_ITEM, 2916 item, 2917 "Unsupported ESP protocol"); 2918 return -rte_errno; 2919 } 2920 2921 esp_spec = item->spec; 2922 esp_mask = item->mask; 2923 2924 if (!esp_spec || !esp_mask) { 2925 rte_flow_error_set(error, EINVAL, 2926 RTE_FLOW_ERROR_TYPE_ITEM, 2927 item, 2928 "Invalid ESP item"); 2929 return -rte_errno; 2930 } 2931 2932 if (esp_spec && esp_mask) { 2933 if (esp_mask->hdr.spi != UINT32_MAX) { 2934 rte_flow_error_set(error, EINVAL, 2935 RTE_FLOW_ERROR_TYPE_ITEM, 2936 item, 2937 "Invalid ESP mask"); 2938 return -rte_errno; 2939 } 2940 i40e_flow_set_filter_spi(filter, esp_spec); 2941 filter->input.flow_ext.customized_pctype = true; 2942 cus_proto = item_type; 2943 } 2944 break; 2945 case RTE_FLOW_ITEM_TYPE_SCTP: 2946 sctp_spec = item->spec; 2947 sctp_mask = item->mask; 2948 2949 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) 2950 pctype = 2951 I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2952 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) 2953 pctype = 2954 I40E_FILTER_PCTYPE_NONF_IPV6_SCTP; 2955 2956 if (sctp_spec && sctp_mask) { 2957 /* Check SCTP mask and update input set */ 2958 if (sctp_mask->hdr.cksum) { 2959 rte_flow_error_set(error, EINVAL, 2960 RTE_FLOW_ERROR_TYPE_ITEM, 2961 item, 2962 "Invalid UDP mask"); 2963 return -rte_errno; 2964 } 2965 2966 if (sctp_mask->hdr.src_port == UINT16_MAX) 2967 input_set |= I40E_INSET_SRC_PORT; 2968 if (sctp_mask->hdr.dst_port == UINT16_MAX) 2969 input_set |= I40E_INSET_DST_PORT; 2970 if (sctp_mask->hdr.tag == UINT32_MAX) 2971 input_set |= I40E_INSET_SCTP_VT; 2972 2973 /* Get filter info */ 2974 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { 2975 filter->input.flow.sctp4_flow.src_port = 2976 sctp_spec->hdr.src_port; 2977 filter->input.flow.sctp4_flow.dst_port = 2978 sctp_spec->hdr.dst_port; 2979 filter->input.flow.sctp4_flow.verify_tag 2980 = sctp_spec->hdr.tag; 2981 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { 2982 filter->input.flow.sctp6_flow.src_port = 2983 sctp_spec->hdr.src_port; 2984 filter->input.flow.sctp6_flow.dst_port = 2985 sctp_spec->hdr.dst_port; 2986 filter->input.flow.sctp6_flow.verify_tag 2987 = sctp_spec->hdr.tag; 2988 } 2989 } 2990 2991 layer_idx = I40E_FLXPLD_L4_IDX; 2992 2993 break; 2994 case RTE_FLOW_ITEM_TYPE_RAW: 2995 raw_spec = item->spec; 2996 raw_mask = item->mask; 2997 2998 if (!raw_spec || !raw_mask) { 2999 rte_flow_error_set(error, EINVAL, 3000 RTE_FLOW_ERROR_TYPE_ITEM, 3001 item, 3002 "NULL RAW spec/mask"); 3003 return -rte_errno; 3004 } 3005 3006 if (pf->support_multi_driver) { 3007 rte_flow_error_set(error, ENOTSUP, 3008 RTE_FLOW_ERROR_TYPE_ITEM, 3009 item, 3010 "Unsupported flexible payload."); 3011 return -rte_errno; 3012 } 3013 3014 ret = i40e_flow_check_raw_item(item, raw_spec, error); 3015 if (ret < 0) 3016 return ret; 3017 3018 off_arr[raw_id] = raw_spec->offset; 3019 len_arr[raw_id] = raw_spec->length; 3020 3021 flex_size = 0; 3022 memset(&flex_pit, 0, sizeof(struct i40e_fdir_flex_pit)); 3023 field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + raw_id; 3024 flex_pit.size = 3025 raw_spec->length / sizeof(uint16_t); 3026 flex_pit.dst_offset = 3027 next_dst_off / sizeof(uint16_t); 3028 3029 for (i = 0; i <= raw_id; i++) { 3030 if (i == raw_id) 3031 flex_pit.src_offset += 3032 raw_spec->offset / 3033 sizeof(uint16_t); 3034 else 3035 flex_pit.src_offset += 3036 (off_arr[i] + len_arr[i]) / 3037 sizeof(uint16_t); 3038 flex_size += len_arr[i]; 3039 } 3040 if (((flex_pit.src_offset + flex_pit.size) >= 3041 I40E_MAX_FLX_SOURCE_OFF / sizeof(uint16_t)) || 3042 flex_size > I40E_FDIR_MAX_FLEXLEN) { 3043 rte_flow_error_set(error, EINVAL, 3044 RTE_FLOW_ERROR_TYPE_ITEM, 3045 item, 3046 "Exceeds maxmial payload limit."); 3047 return -rte_errno; 3048 } 3049 3050 for (i = 0; i < raw_spec->length; i++) { 3051 j = i + next_dst_off; 3052 filter->input.flow_ext.flexbytes[j] = 3053 raw_spec->pattern[i]; 3054 filter->input.flow_ext.flex_mask[j] = 3055 raw_mask->pattern[i]; 3056 } 3057 3058 next_dst_off += raw_spec->length; 3059 raw_id++; 3060 3061 memcpy(&filter->input.flow_ext.flex_pit[field_idx], 3062 &flex_pit, sizeof(struct i40e_fdir_flex_pit)); 3063 filter->input.flow_ext.layer_idx = layer_idx; 3064 filter->input.flow_ext.raw_id = raw_id; 3065 filter->input.flow_ext.is_flex_flow = true; 3066 break; 3067 case RTE_FLOW_ITEM_TYPE_VF: 3068 vf_spec = item->spec; 3069 if (!attr->transfer) { 3070 rte_flow_error_set(error, ENOTSUP, 3071 RTE_FLOW_ERROR_TYPE_ITEM, 3072 item, 3073 "Matching VF traffic" 3074 " without affecting it" 3075 " (transfer attribute)" 3076 " is unsupported"); 3077 return -rte_errno; 3078 } 3079 filter->input.flow_ext.is_vf = 1; 3080 filter->input.flow_ext.dst_id = vf_spec->id; 3081 if (filter->input.flow_ext.is_vf && 3082 filter->input.flow_ext.dst_id >= pf->vf_num) { 3083 rte_flow_error_set(error, EINVAL, 3084 RTE_FLOW_ERROR_TYPE_ITEM, 3085 item, 3086 "Invalid VF ID for FDIR."); 3087 return -rte_errno; 3088 } 3089 break; 3090 case RTE_FLOW_ITEM_TYPE_L2TPV3OIP: 3091 l2tpv3oip_spec = item->spec; 3092 l2tpv3oip_mask = item->mask; 3093 3094 if (!l2tpv3oip_spec || !l2tpv3oip_mask) 3095 break; 3096 3097 if (l2tpv3oip_mask->session_id != UINT32_MAX) { 3098 rte_flow_error_set(error, EINVAL, 3099 RTE_FLOW_ERROR_TYPE_ITEM, 3100 item, 3101 "Invalid L2TPv3 mask"); 3102 return -rte_errno; 3103 } 3104 3105 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { 3106 filter->input.flow.ip4_l2tpv3oip_flow.session_id = 3107 l2tpv3oip_spec->session_id; 3108 filter->input.flow_ext.oip_type = 3109 I40E_FDIR_IPTYPE_IPV4; 3110 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { 3111 filter->input.flow.ip6_l2tpv3oip_flow.session_id = 3112 l2tpv3oip_spec->session_id; 3113 filter->input.flow_ext.oip_type = 3114 I40E_FDIR_IPTYPE_IPV6; 3115 } 3116 3117 filter->input.flow_ext.customized_pctype = true; 3118 cus_proto = item_type; 3119 break; 3120 default: 3121 break; 3122 } 3123 } 3124 3125 /* Get customized pctype value */ 3126 if (filter->input.flow_ext.customized_pctype) { 3127 pctype = i40e_flow_fdir_get_pctype_value(pf, cus_proto, filter); 3128 if (pctype == I40E_FILTER_PCTYPE_INVALID) { 3129 rte_flow_error_set(error, EINVAL, 3130 RTE_FLOW_ERROR_TYPE_ITEM, 3131 item, 3132 "Unsupported pctype"); 3133 return -rte_errno; 3134 } 3135 } 3136 3137 /* If customized pctype is not used, set fdir configuration.*/ 3138 if (!filter->input.flow_ext.customized_pctype) { 3139 /* Check if the input set is valid */ 3140 if (i40e_validate_input_set(pctype, RTE_ETH_FILTER_FDIR, 3141 input_set) != 0) { 3142 PMD_DRV_LOG(ERR, "Invalid input set"); 3143 return -EINVAL; 3144 } 3145 3146 filter->input.flow_ext.input_set = input_set; 3147 } 3148 3149 filter->input.pctype = pctype; 3150 3151 return 0; 3152 } 3153 3154 /* Parse to get the action info of a FDIR filter. 3155 * FDIR action supports QUEUE or (QUEUE + MARK). 3156 */ 3157 static int 3158 i40e_flow_parse_fdir_action(struct rte_eth_dev *dev, 3159 const struct rte_flow_action *actions, 3160 struct rte_flow_error *error, 3161 struct i40e_fdir_filter_conf *filter) 3162 { 3163 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 3164 const struct rte_flow_action *act; 3165 const struct rte_flow_action_queue *act_q; 3166 const struct rte_flow_action_mark *mark_spec = NULL; 3167 uint32_t index = 0; 3168 3169 /* Check if the first non-void action is QUEUE or DROP or PASSTHRU. */ 3170 NEXT_ITEM_OF_ACTION(act, actions, index); 3171 switch (act->type) { 3172 case RTE_FLOW_ACTION_TYPE_QUEUE: 3173 act_q = act->conf; 3174 filter->action.rx_queue = act_q->index; 3175 if ((!filter->input.flow_ext.is_vf && 3176 filter->action.rx_queue >= pf->dev_data->nb_rx_queues) || 3177 (filter->input.flow_ext.is_vf && 3178 filter->action.rx_queue >= pf->vf_nb_qps)) { 3179 rte_flow_error_set(error, EINVAL, 3180 RTE_FLOW_ERROR_TYPE_ACTION, act, 3181 "Invalid queue ID for FDIR."); 3182 return -rte_errno; 3183 } 3184 filter->action.behavior = I40E_FDIR_ACCEPT; 3185 break; 3186 case RTE_FLOW_ACTION_TYPE_DROP: 3187 filter->action.behavior = I40E_FDIR_REJECT; 3188 break; 3189 case RTE_FLOW_ACTION_TYPE_PASSTHRU: 3190 filter->action.behavior = I40E_FDIR_PASSTHRU; 3191 break; 3192 case RTE_FLOW_ACTION_TYPE_MARK: 3193 filter->action.behavior = I40E_FDIR_PASSTHRU; 3194 mark_spec = act->conf; 3195 filter->action.report_status = I40E_FDIR_REPORT_ID; 3196 filter->soft_id = mark_spec->id; 3197 break; 3198 default: 3199 rte_flow_error_set(error, EINVAL, 3200 RTE_FLOW_ERROR_TYPE_ACTION, act, 3201 "Invalid action."); 3202 return -rte_errno; 3203 } 3204 3205 /* Check if the next non-void item is MARK or FLAG or END. */ 3206 index++; 3207 NEXT_ITEM_OF_ACTION(act, actions, index); 3208 switch (act->type) { 3209 case RTE_FLOW_ACTION_TYPE_MARK: 3210 if (mark_spec) { 3211 /* Double MARK actions requested */ 3212 rte_flow_error_set(error, EINVAL, 3213 RTE_FLOW_ERROR_TYPE_ACTION, act, 3214 "Invalid action."); 3215 return -rte_errno; 3216 } 3217 mark_spec = act->conf; 3218 filter->action.report_status = I40E_FDIR_REPORT_ID; 3219 filter->soft_id = mark_spec->id; 3220 break; 3221 case RTE_FLOW_ACTION_TYPE_FLAG: 3222 if (mark_spec) { 3223 /* MARK + FLAG not supported */ 3224 rte_flow_error_set(error, EINVAL, 3225 RTE_FLOW_ERROR_TYPE_ACTION, act, 3226 "Invalid action."); 3227 return -rte_errno; 3228 } 3229 filter->action.report_status = I40E_FDIR_NO_REPORT_STATUS; 3230 break; 3231 case RTE_FLOW_ACTION_TYPE_RSS: 3232 if (filter->action.behavior != I40E_FDIR_PASSTHRU) { 3233 /* RSS filter won't be next if FDIR did not pass thru */ 3234 rte_flow_error_set(error, EINVAL, 3235 RTE_FLOW_ERROR_TYPE_ACTION, act, 3236 "Invalid action."); 3237 return -rte_errno; 3238 } 3239 break; 3240 case RTE_FLOW_ACTION_TYPE_END: 3241 return 0; 3242 default: 3243 rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3244 act, "Invalid action."); 3245 return -rte_errno; 3246 } 3247 3248 /* Check if the next non-void item is END */ 3249 index++; 3250 NEXT_ITEM_OF_ACTION(act, actions, index); 3251 if (act->type != RTE_FLOW_ACTION_TYPE_END) { 3252 rte_flow_error_set(error, EINVAL, 3253 RTE_FLOW_ERROR_TYPE_ACTION, 3254 act, "Invalid action."); 3255 return -rte_errno; 3256 } 3257 3258 return 0; 3259 } 3260 3261 static int 3262 i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev, 3263 const struct rte_flow_attr *attr, 3264 const struct rte_flow_item pattern[], 3265 const struct rte_flow_action actions[], 3266 struct rte_flow_error *error, 3267 union i40e_filter_t *filter) 3268 { 3269 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 3270 struct i40e_fdir_filter_conf *fdir_filter = 3271 &filter->fdir_filter; 3272 int ret; 3273 3274 ret = i40e_flow_parse_fdir_pattern(dev, attr, pattern, error, 3275 fdir_filter); 3276 if (ret) 3277 return ret; 3278 3279 ret = i40e_flow_parse_fdir_action(dev, actions, error, fdir_filter); 3280 if (ret) 3281 return ret; 3282 3283 ret = i40e_flow_parse_attr(attr, error); 3284 if (ret) 3285 return ret; 3286 3287 cons_filter_type = RTE_ETH_FILTER_FDIR; 3288 3289 if (pf->fdir.fdir_vsi == NULL) { 3290 /* Enable fdir when fdir flow is added at first time. */ 3291 ret = i40e_fdir_setup(pf); 3292 if (ret != I40E_SUCCESS) { 3293 rte_flow_error_set(error, ENOTSUP, 3294 RTE_FLOW_ERROR_TYPE_HANDLE, 3295 NULL, "Failed to setup fdir."); 3296 return -rte_errno; 3297 } 3298 ret = i40e_fdir_configure(dev); 3299 if (ret < 0) { 3300 rte_flow_error_set(error, ENOTSUP, 3301 RTE_FLOW_ERROR_TYPE_HANDLE, 3302 NULL, "Failed to configure fdir."); 3303 goto err; 3304 } 3305 } 3306 3307 /* If create the first fdir rule, enable fdir check for rx queues */ 3308 if (TAILQ_EMPTY(&pf->fdir.fdir_list)) 3309 i40e_fdir_rx_proc_enable(dev, 1); 3310 3311 return 0; 3312 err: 3313 i40e_fdir_teardown(pf); 3314 return -rte_errno; 3315 } 3316 3317 /* Parse to get the action info of a tunnel filter 3318 * Tunnel action only supports PF, VF and QUEUE. 3319 */ 3320 static int 3321 i40e_flow_parse_tunnel_action(struct rte_eth_dev *dev, 3322 const struct rte_flow_action *actions, 3323 struct rte_flow_error *error, 3324 struct i40e_tunnel_filter_conf *filter) 3325 { 3326 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 3327 const struct rte_flow_action *act; 3328 const struct rte_flow_action_queue *act_q; 3329 const struct rte_flow_action_vf *act_vf; 3330 uint32_t index = 0; 3331 3332 /* Check if the first non-void action is PF or VF. */ 3333 NEXT_ITEM_OF_ACTION(act, actions, index); 3334 if (act->type != RTE_FLOW_ACTION_TYPE_PF && 3335 act->type != RTE_FLOW_ACTION_TYPE_VF) { 3336 rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3337 act, "Not supported action."); 3338 return -rte_errno; 3339 } 3340 3341 if (act->type == RTE_FLOW_ACTION_TYPE_VF) { 3342 act_vf = act->conf; 3343 filter->vf_id = act_vf->id; 3344 filter->is_to_vf = 1; 3345 if (filter->vf_id >= pf->vf_num) { 3346 rte_flow_error_set(error, EINVAL, 3347 RTE_FLOW_ERROR_TYPE_ACTION, 3348 act, "Invalid VF ID for tunnel filter"); 3349 return -rte_errno; 3350 } 3351 } 3352 3353 /* Check if the next non-void item is QUEUE */ 3354 index++; 3355 NEXT_ITEM_OF_ACTION(act, actions, index); 3356 if (act->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 3357 act_q = act->conf; 3358 filter->queue_id = act_q->index; 3359 if ((!filter->is_to_vf) && 3360 (filter->queue_id >= pf->dev_data->nb_rx_queues)) { 3361 rte_flow_error_set(error, EINVAL, 3362 RTE_FLOW_ERROR_TYPE_ACTION, 3363 act, "Invalid queue ID for tunnel filter"); 3364 return -rte_errno; 3365 } else if (filter->is_to_vf && 3366 (filter->queue_id >= pf->vf_nb_qps)) { 3367 rte_flow_error_set(error, EINVAL, 3368 RTE_FLOW_ERROR_TYPE_ACTION, 3369 act, "Invalid queue ID for tunnel filter"); 3370 return -rte_errno; 3371 } 3372 } 3373 3374 /* Check if the next non-void item is END */ 3375 index++; 3376 NEXT_ITEM_OF_ACTION(act, actions, index); 3377 if (act->type != RTE_FLOW_ACTION_TYPE_END) { 3378 rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3379 act, "Not supported action."); 3380 return -rte_errno; 3381 } 3382 3383 return 0; 3384 } 3385 3386 /* 1. Last in item should be NULL as range is not supported. 3387 * 2. Supported filter types: Source port only and Destination port only. 3388 * 3. Mask of fields which need to be matched should be 3389 * filled with 1. 3390 * 4. Mask of fields which needn't to be matched should be 3391 * filled with 0. 3392 */ 3393 static int 3394 i40e_flow_parse_l4_pattern(const struct rte_flow_item *pattern, 3395 struct rte_flow_error *error, 3396 struct i40e_tunnel_filter_conf *filter) 3397 { 3398 const struct rte_flow_item_sctp *sctp_spec, *sctp_mask; 3399 const struct rte_flow_item_tcp *tcp_spec, *tcp_mask; 3400 const struct rte_flow_item_udp *udp_spec, *udp_mask; 3401 const struct rte_flow_item *item = pattern; 3402 enum rte_flow_item_type item_type; 3403 3404 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3405 if (item->last) { 3406 rte_flow_error_set(error, EINVAL, 3407 RTE_FLOW_ERROR_TYPE_ITEM, 3408 item, 3409 "Not support range"); 3410 return -rte_errno; 3411 } 3412 item_type = item->type; 3413 switch (item_type) { 3414 case RTE_FLOW_ITEM_TYPE_ETH: 3415 if (item->spec || item->mask) { 3416 rte_flow_error_set(error, EINVAL, 3417 RTE_FLOW_ERROR_TYPE_ITEM, 3418 item, 3419 "Invalid ETH item"); 3420 return -rte_errno; 3421 } 3422 3423 break; 3424 case RTE_FLOW_ITEM_TYPE_IPV4: 3425 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV4; 3426 /* IPv4 is used to describe protocol, 3427 * spec and mask should be NULL. 3428 */ 3429 if (item->spec || item->mask) { 3430 rte_flow_error_set(error, EINVAL, 3431 RTE_FLOW_ERROR_TYPE_ITEM, 3432 item, 3433 "Invalid IPv4 item"); 3434 return -rte_errno; 3435 } 3436 3437 break; 3438 case RTE_FLOW_ITEM_TYPE_IPV6: 3439 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV6; 3440 /* IPv6 is used to describe protocol, 3441 * spec and mask should be NULL. 3442 */ 3443 if (item->spec || item->mask) { 3444 rte_flow_error_set(error, EINVAL, 3445 RTE_FLOW_ERROR_TYPE_ITEM, 3446 item, 3447 "Invalid IPv6 item"); 3448 return -rte_errno; 3449 } 3450 3451 break; 3452 case RTE_FLOW_ITEM_TYPE_UDP: 3453 udp_spec = item->spec; 3454 udp_mask = item->mask; 3455 3456 if (!udp_spec || !udp_mask) { 3457 rte_flow_error_set(error, EINVAL, 3458 RTE_FLOW_ERROR_TYPE_ITEM, 3459 item, 3460 "Invalid udp item"); 3461 return -rte_errno; 3462 } 3463 3464 if (udp_spec->hdr.src_port != 0 && 3465 udp_spec->hdr.dst_port != 0) { 3466 rte_flow_error_set(error, EINVAL, 3467 RTE_FLOW_ERROR_TYPE_ITEM, 3468 item, 3469 "Invalid udp spec"); 3470 return -rte_errno; 3471 } 3472 3473 if (udp_spec->hdr.src_port != 0) { 3474 filter->l4_port_type = 3475 I40E_L4_PORT_TYPE_SRC; 3476 filter->tenant_id = 3477 rte_be_to_cpu_32(udp_spec->hdr.src_port); 3478 } 3479 3480 if (udp_spec->hdr.dst_port != 0) { 3481 filter->l4_port_type = 3482 I40E_L4_PORT_TYPE_DST; 3483 filter->tenant_id = 3484 rte_be_to_cpu_32(udp_spec->hdr.dst_port); 3485 } 3486 3487 filter->tunnel_type = I40E_CLOUD_TYPE_UDP; 3488 3489 break; 3490 case RTE_FLOW_ITEM_TYPE_TCP: 3491 tcp_spec = item->spec; 3492 tcp_mask = item->mask; 3493 3494 if (!tcp_spec || !tcp_mask) { 3495 rte_flow_error_set(error, EINVAL, 3496 RTE_FLOW_ERROR_TYPE_ITEM, 3497 item, 3498 "Invalid tcp item"); 3499 return -rte_errno; 3500 } 3501 3502 if (tcp_spec->hdr.src_port != 0 && 3503 tcp_spec->hdr.dst_port != 0) { 3504 rte_flow_error_set(error, EINVAL, 3505 RTE_FLOW_ERROR_TYPE_ITEM, 3506 item, 3507 "Invalid tcp spec"); 3508 return -rte_errno; 3509 } 3510 3511 if (tcp_spec->hdr.src_port != 0) { 3512 filter->l4_port_type = 3513 I40E_L4_PORT_TYPE_SRC; 3514 filter->tenant_id = 3515 rte_be_to_cpu_32(tcp_spec->hdr.src_port); 3516 } 3517 3518 if (tcp_spec->hdr.dst_port != 0) { 3519 filter->l4_port_type = 3520 I40E_L4_PORT_TYPE_DST; 3521 filter->tenant_id = 3522 rte_be_to_cpu_32(tcp_spec->hdr.dst_port); 3523 } 3524 3525 filter->tunnel_type = I40E_CLOUD_TYPE_TCP; 3526 3527 break; 3528 case RTE_FLOW_ITEM_TYPE_SCTP: 3529 sctp_spec = item->spec; 3530 sctp_mask = item->mask; 3531 3532 if (!sctp_spec || !sctp_mask) { 3533 rte_flow_error_set(error, EINVAL, 3534 RTE_FLOW_ERROR_TYPE_ITEM, 3535 item, 3536 "Invalid sctp item"); 3537 return -rte_errno; 3538 } 3539 3540 if (sctp_spec->hdr.src_port != 0 && 3541 sctp_spec->hdr.dst_port != 0) { 3542 rte_flow_error_set(error, EINVAL, 3543 RTE_FLOW_ERROR_TYPE_ITEM, 3544 item, 3545 "Invalid sctp spec"); 3546 return -rte_errno; 3547 } 3548 3549 if (sctp_spec->hdr.src_port != 0) { 3550 filter->l4_port_type = 3551 I40E_L4_PORT_TYPE_SRC; 3552 filter->tenant_id = 3553 rte_be_to_cpu_32(sctp_spec->hdr.src_port); 3554 } 3555 3556 if (sctp_spec->hdr.dst_port != 0) { 3557 filter->l4_port_type = 3558 I40E_L4_PORT_TYPE_DST; 3559 filter->tenant_id = 3560 rte_be_to_cpu_32(sctp_spec->hdr.dst_port); 3561 } 3562 3563 filter->tunnel_type = I40E_CLOUD_TYPE_SCTP; 3564 3565 break; 3566 default: 3567 break; 3568 } 3569 } 3570 3571 return 0; 3572 } 3573 3574 static int 3575 i40e_flow_parse_l4_cloud_filter(struct rte_eth_dev *dev, 3576 const struct rte_flow_attr *attr, 3577 const struct rte_flow_item pattern[], 3578 const struct rte_flow_action actions[], 3579 struct rte_flow_error *error, 3580 union i40e_filter_t *filter) 3581 { 3582 struct i40e_tunnel_filter_conf *tunnel_filter = 3583 &filter->consistent_tunnel_filter; 3584 int ret; 3585 3586 ret = i40e_flow_parse_l4_pattern(pattern, error, tunnel_filter); 3587 if (ret) 3588 return ret; 3589 3590 ret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter); 3591 if (ret) 3592 return ret; 3593 3594 ret = i40e_flow_parse_attr(attr, error); 3595 if (ret) 3596 return ret; 3597 3598 cons_filter_type = RTE_ETH_FILTER_TUNNEL; 3599 3600 return ret; 3601 } 3602 3603 static uint16_t i40e_supported_tunnel_filter_types[] = { 3604 ETH_TUNNEL_FILTER_IMAC | ETH_TUNNEL_FILTER_TENID | 3605 ETH_TUNNEL_FILTER_IVLAN, 3606 ETH_TUNNEL_FILTER_IMAC | ETH_TUNNEL_FILTER_IVLAN, 3607 ETH_TUNNEL_FILTER_IMAC | ETH_TUNNEL_FILTER_TENID, 3608 ETH_TUNNEL_FILTER_OMAC | ETH_TUNNEL_FILTER_TENID | 3609 ETH_TUNNEL_FILTER_IMAC, 3610 ETH_TUNNEL_FILTER_IMAC, 3611 }; 3612 3613 static int 3614 i40e_check_tunnel_filter_type(uint8_t filter_type) 3615 { 3616 uint8_t i; 3617 3618 for (i = 0; i < RTE_DIM(i40e_supported_tunnel_filter_types); i++) { 3619 if (filter_type == i40e_supported_tunnel_filter_types[i]) 3620 return 0; 3621 } 3622 3623 return -1; 3624 } 3625 3626 /* 1. Last in item should be NULL as range is not supported. 3627 * 2. Supported filter types: IMAC_IVLAN_TENID, IMAC_IVLAN, 3628 * IMAC_TENID, OMAC_TENID_IMAC and IMAC. 3629 * 3. Mask of fields which need to be matched should be 3630 * filled with 1. 3631 * 4. Mask of fields which needn't to be matched should be 3632 * filled with 0. 3633 */ 3634 static int 3635 i40e_flow_parse_vxlan_pattern(__rte_unused struct rte_eth_dev *dev, 3636 const struct rte_flow_item *pattern, 3637 struct rte_flow_error *error, 3638 struct i40e_tunnel_filter_conf *filter) 3639 { 3640 const struct rte_flow_item *item = pattern; 3641 const struct rte_flow_item_eth *eth_spec; 3642 const struct rte_flow_item_eth *eth_mask; 3643 const struct rte_flow_item_vxlan *vxlan_spec; 3644 const struct rte_flow_item_vxlan *vxlan_mask; 3645 const struct rte_flow_item_vlan *vlan_spec; 3646 const struct rte_flow_item_vlan *vlan_mask; 3647 uint8_t filter_type = 0; 3648 bool is_vni_masked = 0; 3649 uint8_t vni_mask[] = {0xFF, 0xFF, 0xFF}; 3650 enum rte_flow_item_type item_type; 3651 bool vxlan_flag = 0; 3652 uint32_t tenant_id_be = 0; 3653 int ret; 3654 3655 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3656 if (item->last) { 3657 rte_flow_error_set(error, EINVAL, 3658 RTE_FLOW_ERROR_TYPE_ITEM, 3659 item, 3660 "Not support range"); 3661 return -rte_errno; 3662 } 3663 item_type = item->type; 3664 switch (item_type) { 3665 case RTE_FLOW_ITEM_TYPE_ETH: 3666 eth_spec = item->spec; 3667 eth_mask = item->mask; 3668 3669 /* Check if ETH item is used for place holder. 3670 * If yes, both spec and mask should be NULL. 3671 * If no, both spec and mask shouldn't be NULL. 3672 */ 3673 if ((!eth_spec && eth_mask) || 3674 (eth_spec && !eth_mask)) { 3675 rte_flow_error_set(error, EINVAL, 3676 RTE_FLOW_ERROR_TYPE_ITEM, 3677 item, 3678 "Invalid ether spec/mask"); 3679 return -rte_errno; 3680 } 3681 3682 if (eth_spec && eth_mask) { 3683 /* DST address of inner MAC shouldn't be masked. 3684 * SRC address of Inner MAC should be masked. 3685 */ 3686 if (!rte_is_broadcast_ether_addr(ð_mask->dst) || 3687 !rte_is_zero_ether_addr(ð_mask->src) || 3688 eth_mask->type) { 3689 rte_flow_error_set(error, EINVAL, 3690 RTE_FLOW_ERROR_TYPE_ITEM, 3691 item, 3692 "Invalid ether spec/mask"); 3693 return -rte_errno; 3694 } 3695 3696 if (!vxlan_flag) { 3697 rte_memcpy(&filter->outer_mac, 3698 ð_spec->dst, 3699 RTE_ETHER_ADDR_LEN); 3700 filter_type |= ETH_TUNNEL_FILTER_OMAC; 3701 } else { 3702 rte_memcpy(&filter->inner_mac, 3703 ð_spec->dst, 3704 RTE_ETHER_ADDR_LEN); 3705 filter_type |= ETH_TUNNEL_FILTER_IMAC; 3706 } 3707 } 3708 break; 3709 case RTE_FLOW_ITEM_TYPE_VLAN: 3710 vlan_spec = item->spec; 3711 vlan_mask = item->mask; 3712 if (!(vlan_spec && vlan_mask) || 3713 vlan_mask->inner_type) { 3714 rte_flow_error_set(error, EINVAL, 3715 RTE_FLOW_ERROR_TYPE_ITEM, 3716 item, 3717 "Invalid vlan item"); 3718 return -rte_errno; 3719 } 3720 3721 if (vlan_spec && vlan_mask) { 3722 if (vlan_mask->tci == 3723 rte_cpu_to_be_16(I40E_VLAN_TCI_MASK)) 3724 filter->inner_vlan = 3725 rte_be_to_cpu_16(vlan_spec->tci) & 3726 I40E_VLAN_TCI_MASK; 3727 filter_type |= ETH_TUNNEL_FILTER_IVLAN; 3728 } 3729 break; 3730 case RTE_FLOW_ITEM_TYPE_IPV4: 3731 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV4; 3732 /* IPv4 is used to describe protocol, 3733 * spec and mask should be NULL. 3734 */ 3735 if (item->spec || item->mask) { 3736 rte_flow_error_set(error, EINVAL, 3737 RTE_FLOW_ERROR_TYPE_ITEM, 3738 item, 3739 "Invalid IPv4 item"); 3740 return -rte_errno; 3741 } 3742 break; 3743 case RTE_FLOW_ITEM_TYPE_IPV6: 3744 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV6; 3745 /* IPv6 is used to describe protocol, 3746 * spec and mask should be NULL. 3747 */ 3748 if (item->spec || item->mask) { 3749 rte_flow_error_set(error, EINVAL, 3750 RTE_FLOW_ERROR_TYPE_ITEM, 3751 item, 3752 "Invalid IPv6 item"); 3753 return -rte_errno; 3754 } 3755 break; 3756 case RTE_FLOW_ITEM_TYPE_UDP: 3757 /* UDP is used to describe protocol, 3758 * spec and mask should be NULL. 3759 */ 3760 if (item->spec || item->mask) { 3761 rte_flow_error_set(error, EINVAL, 3762 RTE_FLOW_ERROR_TYPE_ITEM, 3763 item, 3764 "Invalid UDP item"); 3765 return -rte_errno; 3766 } 3767 break; 3768 case RTE_FLOW_ITEM_TYPE_VXLAN: 3769 vxlan_spec = item->spec; 3770 vxlan_mask = item->mask; 3771 /* Check if VXLAN item is used to describe protocol. 3772 * If yes, both spec and mask should be NULL. 3773 * If no, both spec and mask shouldn't be NULL. 3774 */ 3775 if ((!vxlan_spec && vxlan_mask) || 3776 (vxlan_spec && !vxlan_mask)) { 3777 rte_flow_error_set(error, EINVAL, 3778 RTE_FLOW_ERROR_TYPE_ITEM, 3779 item, 3780 "Invalid VXLAN item"); 3781 return -rte_errno; 3782 } 3783 3784 /* Check if VNI is masked. */ 3785 if (vxlan_spec && vxlan_mask) { 3786 is_vni_masked = 3787 !!memcmp(vxlan_mask->vni, vni_mask, 3788 RTE_DIM(vni_mask)); 3789 if (is_vni_masked) { 3790 rte_flow_error_set(error, EINVAL, 3791 RTE_FLOW_ERROR_TYPE_ITEM, 3792 item, 3793 "Invalid VNI mask"); 3794 return -rte_errno; 3795 } 3796 3797 rte_memcpy(((uint8_t *)&tenant_id_be + 1), 3798 vxlan_spec->vni, 3); 3799 filter->tenant_id = 3800 rte_be_to_cpu_32(tenant_id_be); 3801 filter_type |= ETH_TUNNEL_FILTER_TENID; 3802 } 3803 3804 vxlan_flag = 1; 3805 break; 3806 default: 3807 break; 3808 } 3809 } 3810 3811 ret = i40e_check_tunnel_filter_type(filter_type); 3812 if (ret < 0) { 3813 rte_flow_error_set(error, EINVAL, 3814 RTE_FLOW_ERROR_TYPE_ITEM, 3815 NULL, 3816 "Invalid filter type"); 3817 return -rte_errno; 3818 } 3819 filter->filter_type = filter_type; 3820 3821 filter->tunnel_type = I40E_TUNNEL_TYPE_VXLAN; 3822 3823 return 0; 3824 } 3825 3826 static int 3827 i40e_flow_parse_vxlan_filter(struct rte_eth_dev *dev, 3828 const struct rte_flow_attr *attr, 3829 const struct rte_flow_item pattern[], 3830 const struct rte_flow_action actions[], 3831 struct rte_flow_error *error, 3832 union i40e_filter_t *filter) 3833 { 3834 struct i40e_tunnel_filter_conf *tunnel_filter = 3835 &filter->consistent_tunnel_filter; 3836 int ret; 3837 3838 ret = i40e_flow_parse_vxlan_pattern(dev, pattern, 3839 error, tunnel_filter); 3840 if (ret) 3841 return ret; 3842 3843 ret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter); 3844 if (ret) 3845 return ret; 3846 3847 ret = i40e_flow_parse_attr(attr, error); 3848 if (ret) 3849 return ret; 3850 3851 cons_filter_type = RTE_ETH_FILTER_TUNNEL; 3852 3853 return ret; 3854 } 3855 3856 /* 1. Last in item should be NULL as range is not supported. 3857 * 2. Supported filter types: IMAC_IVLAN_TENID, IMAC_IVLAN, 3858 * IMAC_TENID, OMAC_TENID_IMAC and IMAC. 3859 * 3. Mask of fields which need to be matched should be 3860 * filled with 1. 3861 * 4. Mask of fields which needn't to be matched should be 3862 * filled with 0. 3863 */ 3864 static int 3865 i40e_flow_parse_nvgre_pattern(__rte_unused struct rte_eth_dev *dev, 3866 const struct rte_flow_item *pattern, 3867 struct rte_flow_error *error, 3868 struct i40e_tunnel_filter_conf *filter) 3869 { 3870 const struct rte_flow_item *item = pattern; 3871 const struct rte_flow_item_eth *eth_spec; 3872 const struct rte_flow_item_eth *eth_mask; 3873 const struct rte_flow_item_nvgre *nvgre_spec; 3874 const struct rte_flow_item_nvgre *nvgre_mask; 3875 const struct rte_flow_item_vlan *vlan_spec; 3876 const struct rte_flow_item_vlan *vlan_mask; 3877 enum rte_flow_item_type item_type; 3878 uint8_t filter_type = 0; 3879 bool is_tni_masked = 0; 3880 uint8_t tni_mask[] = {0xFF, 0xFF, 0xFF}; 3881 bool nvgre_flag = 0; 3882 uint32_t tenant_id_be = 0; 3883 int ret; 3884 3885 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3886 if (item->last) { 3887 rte_flow_error_set(error, EINVAL, 3888 RTE_FLOW_ERROR_TYPE_ITEM, 3889 item, 3890 "Not support range"); 3891 return -rte_errno; 3892 } 3893 item_type = item->type; 3894 switch (item_type) { 3895 case RTE_FLOW_ITEM_TYPE_ETH: 3896 eth_spec = item->spec; 3897 eth_mask = item->mask; 3898 3899 /* Check if ETH item is used for place holder. 3900 * If yes, both spec and mask should be NULL. 3901 * If no, both spec and mask shouldn't be NULL. 3902 */ 3903 if ((!eth_spec && eth_mask) || 3904 (eth_spec && !eth_mask)) { 3905 rte_flow_error_set(error, EINVAL, 3906 RTE_FLOW_ERROR_TYPE_ITEM, 3907 item, 3908 "Invalid ether spec/mask"); 3909 return -rte_errno; 3910 } 3911 3912 if (eth_spec && eth_mask) { 3913 /* DST address of inner MAC shouldn't be masked. 3914 * SRC address of Inner MAC should be masked. 3915 */ 3916 if (!rte_is_broadcast_ether_addr(ð_mask->dst) || 3917 !rte_is_zero_ether_addr(ð_mask->src) || 3918 eth_mask->type) { 3919 rte_flow_error_set(error, EINVAL, 3920 RTE_FLOW_ERROR_TYPE_ITEM, 3921 item, 3922 "Invalid ether spec/mask"); 3923 return -rte_errno; 3924 } 3925 3926 if (!nvgre_flag) { 3927 rte_memcpy(&filter->outer_mac, 3928 ð_spec->dst, 3929 RTE_ETHER_ADDR_LEN); 3930 filter_type |= ETH_TUNNEL_FILTER_OMAC; 3931 } else { 3932 rte_memcpy(&filter->inner_mac, 3933 ð_spec->dst, 3934 RTE_ETHER_ADDR_LEN); 3935 filter_type |= ETH_TUNNEL_FILTER_IMAC; 3936 } 3937 } 3938 3939 break; 3940 case RTE_FLOW_ITEM_TYPE_VLAN: 3941 vlan_spec = item->spec; 3942 vlan_mask = item->mask; 3943 if (!(vlan_spec && vlan_mask) || 3944 vlan_mask->inner_type) { 3945 rte_flow_error_set(error, EINVAL, 3946 RTE_FLOW_ERROR_TYPE_ITEM, 3947 item, 3948 "Invalid vlan item"); 3949 return -rte_errno; 3950 } 3951 3952 if (vlan_spec && vlan_mask) { 3953 if (vlan_mask->tci == 3954 rte_cpu_to_be_16(I40E_VLAN_TCI_MASK)) 3955 filter->inner_vlan = 3956 rte_be_to_cpu_16(vlan_spec->tci) & 3957 I40E_VLAN_TCI_MASK; 3958 filter_type |= ETH_TUNNEL_FILTER_IVLAN; 3959 } 3960 break; 3961 case RTE_FLOW_ITEM_TYPE_IPV4: 3962 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV4; 3963 /* IPv4 is used to describe protocol, 3964 * spec and mask should be NULL. 3965 */ 3966 if (item->spec || item->mask) { 3967 rte_flow_error_set(error, EINVAL, 3968 RTE_FLOW_ERROR_TYPE_ITEM, 3969 item, 3970 "Invalid IPv4 item"); 3971 return -rte_errno; 3972 } 3973 break; 3974 case RTE_FLOW_ITEM_TYPE_IPV6: 3975 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV6; 3976 /* IPv6 is used to describe protocol, 3977 * spec and mask should be NULL. 3978 */ 3979 if (item->spec || item->mask) { 3980 rte_flow_error_set(error, EINVAL, 3981 RTE_FLOW_ERROR_TYPE_ITEM, 3982 item, 3983 "Invalid IPv6 item"); 3984 return -rte_errno; 3985 } 3986 break; 3987 case RTE_FLOW_ITEM_TYPE_NVGRE: 3988 nvgre_spec = item->spec; 3989 nvgre_mask = item->mask; 3990 /* Check if NVGRE item is used to describe protocol. 3991 * If yes, both spec and mask should be NULL. 3992 * If no, both spec and mask shouldn't be NULL. 3993 */ 3994 if ((!nvgre_spec && nvgre_mask) || 3995 (nvgre_spec && !nvgre_mask)) { 3996 rte_flow_error_set(error, EINVAL, 3997 RTE_FLOW_ERROR_TYPE_ITEM, 3998 item, 3999 "Invalid NVGRE item"); 4000 return -rte_errno; 4001 } 4002 4003 if (nvgre_spec && nvgre_mask) { 4004 is_tni_masked = 4005 !!memcmp(nvgre_mask->tni, tni_mask, 4006 RTE_DIM(tni_mask)); 4007 if (is_tni_masked) { 4008 rte_flow_error_set(error, EINVAL, 4009 RTE_FLOW_ERROR_TYPE_ITEM, 4010 item, 4011 "Invalid TNI mask"); 4012 return -rte_errno; 4013 } 4014 if (nvgre_mask->protocol && 4015 nvgre_mask->protocol != 0xFFFF) { 4016 rte_flow_error_set(error, EINVAL, 4017 RTE_FLOW_ERROR_TYPE_ITEM, 4018 item, 4019 "Invalid NVGRE item"); 4020 return -rte_errno; 4021 } 4022 if (nvgre_mask->c_k_s_rsvd0_ver && 4023 nvgre_mask->c_k_s_rsvd0_ver != 4024 rte_cpu_to_be_16(0xFFFF)) { 4025 rte_flow_error_set(error, EINVAL, 4026 RTE_FLOW_ERROR_TYPE_ITEM, 4027 item, 4028 "Invalid NVGRE item"); 4029 return -rte_errno; 4030 } 4031 if (nvgre_spec->c_k_s_rsvd0_ver != 4032 rte_cpu_to_be_16(0x2000) && 4033 nvgre_mask->c_k_s_rsvd0_ver) { 4034 rte_flow_error_set(error, EINVAL, 4035 RTE_FLOW_ERROR_TYPE_ITEM, 4036 item, 4037 "Invalid NVGRE item"); 4038 return -rte_errno; 4039 } 4040 if (nvgre_mask->protocol && 4041 nvgre_spec->protocol != 4042 rte_cpu_to_be_16(0x6558)) { 4043 rte_flow_error_set(error, EINVAL, 4044 RTE_FLOW_ERROR_TYPE_ITEM, 4045 item, 4046 "Invalid NVGRE item"); 4047 return -rte_errno; 4048 } 4049 rte_memcpy(((uint8_t *)&tenant_id_be + 1), 4050 nvgre_spec->tni, 3); 4051 filter->tenant_id = 4052 rte_be_to_cpu_32(tenant_id_be); 4053 filter_type |= ETH_TUNNEL_FILTER_TENID; 4054 } 4055 4056 nvgre_flag = 1; 4057 break; 4058 default: 4059 break; 4060 } 4061 } 4062 4063 ret = i40e_check_tunnel_filter_type(filter_type); 4064 if (ret < 0) { 4065 rte_flow_error_set(error, EINVAL, 4066 RTE_FLOW_ERROR_TYPE_ITEM, 4067 NULL, 4068 "Invalid filter type"); 4069 return -rte_errno; 4070 } 4071 filter->filter_type = filter_type; 4072 4073 filter->tunnel_type = I40E_TUNNEL_TYPE_NVGRE; 4074 4075 return 0; 4076 } 4077 4078 static int 4079 i40e_flow_parse_nvgre_filter(struct rte_eth_dev *dev, 4080 const struct rte_flow_attr *attr, 4081 const struct rte_flow_item pattern[], 4082 const struct rte_flow_action actions[], 4083 struct rte_flow_error *error, 4084 union i40e_filter_t *filter) 4085 { 4086 struct i40e_tunnel_filter_conf *tunnel_filter = 4087 &filter->consistent_tunnel_filter; 4088 int ret; 4089 4090 ret = i40e_flow_parse_nvgre_pattern(dev, pattern, 4091 error, tunnel_filter); 4092 if (ret) 4093 return ret; 4094 4095 ret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter); 4096 if (ret) 4097 return ret; 4098 4099 ret = i40e_flow_parse_attr(attr, error); 4100 if (ret) 4101 return ret; 4102 4103 cons_filter_type = RTE_ETH_FILTER_TUNNEL; 4104 4105 return ret; 4106 } 4107 4108 /* 1. Last in item should be NULL as range is not supported. 4109 * 2. Supported filter types: MPLS label. 4110 * 3. Mask of fields which need to be matched should be 4111 * filled with 1. 4112 * 4. Mask of fields which needn't to be matched should be 4113 * filled with 0. 4114 */ 4115 static int 4116 i40e_flow_parse_mpls_pattern(__rte_unused struct rte_eth_dev *dev, 4117 const struct rte_flow_item *pattern, 4118 struct rte_flow_error *error, 4119 struct i40e_tunnel_filter_conf *filter) 4120 { 4121 const struct rte_flow_item *item = pattern; 4122 const struct rte_flow_item_mpls *mpls_spec; 4123 const struct rte_flow_item_mpls *mpls_mask; 4124 enum rte_flow_item_type item_type; 4125 bool is_mplsoudp = 0; /* 1 - MPLSoUDP, 0 - MPLSoGRE */ 4126 const uint8_t label_mask[3] = {0xFF, 0xFF, 0xF0}; 4127 uint32_t label_be = 0; 4128 4129 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 4130 if (item->last) { 4131 rte_flow_error_set(error, EINVAL, 4132 RTE_FLOW_ERROR_TYPE_ITEM, 4133 item, 4134 "Not support range"); 4135 return -rte_errno; 4136 } 4137 item_type = item->type; 4138 switch (item_type) { 4139 case RTE_FLOW_ITEM_TYPE_ETH: 4140 if (item->spec || item->mask) { 4141 rte_flow_error_set(error, EINVAL, 4142 RTE_FLOW_ERROR_TYPE_ITEM, 4143 item, 4144 "Invalid ETH item"); 4145 return -rte_errno; 4146 } 4147 break; 4148 case RTE_FLOW_ITEM_TYPE_IPV4: 4149 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV4; 4150 /* IPv4 is used to describe protocol, 4151 * spec and mask should be NULL. 4152 */ 4153 if (item->spec || item->mask) { 4154 rte_flow_error_set(error, EINVAL, 4155 RTE_FLOW_ERROR_TYPE_ITEM, 4156 item, 4157 "Invalid IPv4 item"); 4158 return -rte_errno; 4159 } 4160 break; 4161 case RTE_FLOW_ITEM_TYPE_IPV6: 4162 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV6; 4163 /* IPv6 is used to describe protocol, 4164 * spec and mask should be NULL. 4165 */ 4166 if (item->spec || item->mask) { 4167 rte_flow_error_set(error, EINVAL, 4168 RTE_FLOW_ERROR_TYPE_ITEM, 4169 item, 4170 "Invalid IPv6 item"); 4171 return -rte_errno; 4172 } 4173 break; 4174 case RTE_FLOW_ITEM_TYPE_UDP: 4175 /* UDP is used to describe protocol, 4176 * spec and mask should be NULL. 4177 */ 4178 if (item->spec || item->mask) { 4179 rte_flow_error_set(error, EINVAL, 4180 RTE_FLOW_ERROR_TYPE_ITEM, 4181 item, 4182 "Invalid UDP item"); 4183 return -rte_errno; 4184 } 4185 is_mplsoudp = 1; 4186 break; 4187 case RTE_FLOW_ITEM_TYPE_GRE: 4188 /* GRE is used to describe protocol, 4189 * spec and mask should be NULL. 4190 */ 4191 if (item->spec || item->mask) { 4192 rte_flow_error_set(error, EINVAL, 4193 RTE_FLOW_ERROR_TYPE_ITEM, 4194 item, 4195 "Invalid GRE item"); 4196 return -rte_errno; 4197 } 4198 break; 4199 case RTE_FLOW_ITEM_TYPE_MPLS: 4200 mpls_spec = item->spec; 4201 mpls_mask = item->mask; 4202 4203 if (!mpls_spec || !mpls_mask) { 4204 rte_flow_error_set(error, EINVAL, 4205 RTE_FLOW_ERROR_TYPE_ITEM, 4206 item, 4207 "Invalid MPLS item"); 4208 return -rte_errno; 4209 } 4210 4211 if (memcmp(mpls_mask->label_tc_s, label_mask, 3)) { 4212 rte_flow_error_set(error, EINVAL, 4213 RTE_FLOW_ERROR_TYPE_ITEM, 4214 item, 4215 "Invalid MPLS label mask"); 4216 return -rte_errno; 4217 } 4218 rte_memcpy(((uint8_t *)&label_be + 1), 4219 mpls_spec->label_tc_s, 3); 4220 filter->tenant_id = rte_be_to_cpu_32(label_be) >> 4; 4221 break; 4222 default: 4223 break; 4224 } 4225 } 4226 4227 if (is_mplsoudp) 4228 filter->tunnel_type = I40E_TUNNEL_TYPE_MPLSoUDP; 4229 else 4230 filter->tunnel_type = I40E_TUNNEL_TYPE_MPLSoGRE; 4231 4232 return 0; 4233 } 4234 4235 static int 4236 i40e_flow_parse_mpls_filter(struct rte_eth_dev *dev, 4237 const struct rte_flow_attr *attr, 4238 const struct rte_flow_item pattern[], 4239 const struct rte_flow_action actions[], 4240 struct rte_flow_error *error, 4241 union i40e_filter_t *filter) 4242 { 4243 struct i40e_tunnel_filter_conf *tunnel_filter = 4244 &filter->consistent_tunnel_filter; 4245 int ret; 4246 4247 ret = i40e_flow_parse_mpls_pattern(dev, pattern, 4248 error, tunnel_filter); 4249 if (ret) 4250 return ret; 4251 4252 ret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter); 4253 if (ret) 4254 return ret; 4255 4256 ret = i40e_flow_parse_attr(attr, error); 4257 if (ret) 4258 return ret; 4259 4260 cons_filter_type = RTE_ETH_FILTER_TUNNEL; 4261 4262 return ret; 4263 } 4264 4265 /* 1. Last in item should be NULL as range is not supported. 4266 * 2. Supported filter types: GTP TEID. 4267 * 3. Mask of fields which need to be matched should be 4268 * filled with 1. 4269 * 4. Mask of fields which needn't to be matched should be 4270 * filled with 0. 4271 * 5. GTP profile supports GTPv1 only. 4272 * 6. GTP-C response message ('source_port' = 2123) is not supported. 4273 */ 4274 static int 4275 i40e_flow_parse_gtp_pattern(struct rte_eth_dev *dev, 4276 const struct rte_flow_item *pattern, 4277 struct rte_flow_error *error, 4278 struct i40e_tunnel_filter_conf *filter) 4279 { 4280 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 4281 const struct rte_flow_item *item = pattern; 4282 const struct rte_flow_item_gtp *gtp_spec; 4283 const struct rte_flow_item_gtp *gtp_mask; 4284 enum rte_flow_item_type item_type; 4285 4286 if (!pf->gtp_support) { 4287 rte_flow_error_set(error, EINVAL, 4288 RTE_FLOW_ERROR_TYPE_ITEM, 4289 item, 4290 "GTP is not supported by default."); 4291 return -rte_errno; 4292 } 4293 4294 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 4295 if (item->last) { 4296 rte_flow_error_set(error, EINVAL, 4297 RTE_FLOW_ERROR_TYPE_ITEM, 4298 item, 4299 "Not support range"); 4300 return -rte_errno; 4301 } 4302 item_type = item->type; 4303 switch (item_type) { 4304 case RTE_FLOW_ITEM_TYPE_ETH: 4305 if (item->spec || item->mask) { 4306 rte_flow_error_set(error, EINVAL, 4307 RTE_FLOW_ERROR_TYPE_ITEM, 4308 item, 4309 "Invalid ETH item"); 4310 return -rte_errno; 4311 } 4312 break; 4313 case RTE_FLOW_ITEM_TYPE_IPV4: 4314 filter->ip_type = I40E_TUNNEL_IPTYPE_IPV4; 4315 /* IPv4 is used to describe protocol, 4316 * spec and mask should be NULL. 4317 */ 4318 if (item->spec || item->mask) { 4319 rte_flow_error_set(error, EINVAL, 4320 RTE_FLOW_ERROR_TYPE_ITEM, 4321 item, 4322 "Invalid IPv4 item"); 4323 return -rte_errno; 4324 } 4325 break; 4326 case RTE_FLOW_ITEM_TYPE_UDP: 4327 if (item->spec || item->mask) { 4328 rte_flow_error_set(error, EINVAL, 4329 RTE_FLOW_ERROR_TYPE_ITEM, 4330 item, 4331 "Invalid UDP item"); 4332 return -rte_errno; 4333 } 4334 break; 4335 case RTE_FLOW_ITEM_TYPE_GTPC: 4336 case RTE_FLOW_ITEM_TYPE_GTPU: 4337 gtp_spec = item->spec; 4338 gtp_mask = item->mask; 4339 4340 if (!gtp_spec || !gtp_mask) { 4341 rte_flow_error_set(error, EINVAL, 4342 RTE_FLOW_ERROR_TYPE_ITEM, 4343 item, 4344 "Invalid GTP item"); 4345 return -rte_errno; 4346 } 4347 4348 if (gtp_mask->v_pt_rsv_flags || 4349 gtp_mask->msg_type || 4350 gtp_mask->msg_len || 4351 gtp_mask->teid != UINT32_MAX) { 4352 rte_flow_error_set(error, EINVAL, 4353 RTE_FLOW_ERROR_TYPE_ITEM, 4354 item, 4355 "Invalid GTP mask"); 4356 return -rte_errno; 4357 } 4358 4359 if (item_type == RTE_FLOW_ITEM_TYPE_GTPC) 4360 filter->tunnel_type = I40E_TUNNEL_TYPE_GTPC; 4361 else if (item_type == RTE_FLOW_ITEM_TYPE_GTPU) 4362 filter->tunnel_type = I40E_TUNNEL_TYPE_GTPU; 4363 4364 filter->tenant_id = rte_be_to_cpu_32(gtp_spec->teid); 4365 4366 break; 4367 default: 4368 break; 4369 } 4370 } 4371 4372 return 0; 4373 } 4374 4375 static int 4376 i40e_flow_parse_gtp_filter(struct rte_eth_dev *dev, 4377 const struct rte_flow_attr *attr, 4378 const struct rte_flow_item pattern[], 4379 const struct rte_flow_action actions[], 4380 struct rte_flow_error *error, 4381 union i40e_filter_t *filter) 4382 { 4383 struct i40e_tunnel_filter_conf *tunnel_filter = 4384 &filter->consistent_tunnel_filter; 4385 int ret; 4386 4387 ret = i40e_flow_parse_gtp_pattern(dev, pattern, 4388 error, tunnel_filter); 4389 if (ret) 4390 return ret; 4391 4392 ret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter); 4393 if (ret) 4394 return ret; 4395 4396 ret = i40e_flow_parse_attr(attr, error); 4397 if (ret) 4398 return ret; 4399 4400 cons_filter_type = RTE_ETH_FILTER_TUNNEL; 4401 4402 return ret; 4403 } 4404 4405 /* 1. Last in item should be NULL as range is not supported. 4406 * 2. Supported filter types: QINQ. 4407 * 3. Mask of fields which need to be matched should be 4408 * filled with 1. 4409 * 4. Mask of fields which needn't to be matched should be 4410 * filled with 0. 4411 */ 4412 static int 4413 i40e_flow_parse_qinq_pattern(__rte_unused struct rte_eth_dev *dev, 4414 const struct rte_flow_item *pattern, 4415 struct rte_flow_error *error, 4416 struct i40e_tunnel_filter_conf *filter) 4417 { 4418 const struct rte_flow_item *item = pattern; 4419 const struct rte_flow_item_vlan *vlan_spec = NULL; 4420 const struct rte_flow_item_vlan *vlan_mask = NULL; 4421 const struct rte_flow_item_vlan *i_vlan_spec = NULL; 4422 const struct rte_flow_item_vlan *i_vlan_mask = NULL; 4423 const struct rte_flow_item_vlan *o_vlan_spec = NULL; 4424 const struct rte_flow_item_vlan *o_vlan_mask = NULL; 4425 4426 enum rte_flow_item_type item_type; 4427 bool vlan_flag = 0; 4428 4429 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 4430 if (item->last) { 4431 rte_flow_error_set(error, EINVAL, 4432 RTE_FLOW_ERROR_TYPE_ITEM, 4433 item, 4434 "Not support range"); 4435 return -rte_errno; 4436 } 4437 item_type = item->type; 4438 switch (item_type) { 4439 case RTE_FLOW_ITEM_TYPE_ETH: 4440 if (item->spec || item->mask) { 4441 rte_flow_error_set(error, EINVAL, 4442 RTE_FLOW_ERROR_TYPE_ITEM, 4443 item, 4444 "Invalid ETH item"); 4445 return -rte_errno; 4446 } 4447 break; 4448 case RTE_FLOW_ITEM_TYPE_VLAN: 4449 vlan_spec = item->spec; 4450 vlan_mask = item->mask; 4451 4452 if (!(vlan_spec && vlan_mask) || 4453 vlan_mask->inner_type) { 4454 rte_flow_error_set(error, EINVAL, 4455 RTE_FLOW_ERROR_TYPE_ITEM, 4456 item, 4457 "Invalid vlan item"); 4458 return -rte_errno; 4459 } 4460 4461 if (!vlan_flag) { 4462 o_vlan_spec = vlan_spec; 4463 o_vlan_mask = vlan_mask; 4464 vlan_flag = 1; 4465 } else { 4466 i_vlan_spec = vlan_spec; 4467 i_vlan_mask = vlan_mask; 4468 vlan_flag = 0; 4469 } 4470 break; 4471 4472 default: 4473 break; 4474 } 4475 } 4476 4477 /* Get filter specification */ 4478 if (o_vlan_mask != NULL && i_vlan_mask != NULL) { 4479 filter->outer_vlan = rte_be_to_cpu_16(o_vlan_spec->tci); 4480 filter->inner_vlan = rte_be_to_cpu_16(i_vlan_spec->tci); 4481 } else { 4482 rte_flow_error_set(error, EINVAL, 4483 RTE_FLOW_ERROR_TYPE_ITEM, 4484 NULL, 4485 "Invalid filter type"); 4486 return -rte_errno; 4487 } 4488 4489 filter->tunnel_type = I40E_TUNNEL_TYPE_QINQ; 4490 return 0; 4491 } 4492 4493 static int 4494 i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev, 4495 const struct rte_flow_attr *attr, 4496 const struct rte_flow_item pattern[], 4497 const struct rte_flow_action actions[], 4498 struct rte_flow_error *error, 4499 union i40e_filter_t *filter) 4500 { 4501 struct i40e_tunnel_filter_conf *tunnel_filter = 4502 &filter->consistent_tunnel_filter; 4503 int ret; 4504 4505 ret = i40e_flow_parse_qinq_pattern(dev, pattern, 4506 error, tunnel_filter); 4507 if (ret) 4508 return ret; 4509 4510 ret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter); 4511 if (ret) 4512 return ret; 4513 4514 ret = i40e_flow_parse_attr(attr, error); 4515 if (ret) 4516 return ret; 4517 4518 cons_filter_type = RTE_ETH_FILTER_TUNNEL; 4519 4520 return ret; 4521 } 4522 4523 static int 4524 i40e_flow_validate(struct rte_eth_dev *dev, 4525 const struct rte_flow_attr *attr, 4526 const struct rte_flow_item pattern[], 4527 const struct rte_flow_action actions[], 4528 struct rte_flow_error *error) 4529 { 4530 struct rte_flow_item *items; /* internal pattern w/o VOID items */ 4531 parse_filter_t parse_filter; 4532 uint32_t item_num = 0; /* non-void item number of pattern*/ 4533 uint32_t i = 0; 4534 bool flag = false; 4535 int ret = I40E_NOT_SUPPORTED; 4536 4537 if (!pattern) { 4538 rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_NUM, 4539 NULL, "NULL pattern."); 4540 return -rte_errno; 4541 } 4542 4543 if (!actions) { 4544 rte_flow_error_set(error, EINVAL, 4545 RTE_FLOW_ERROR_TYPE_ACTION_NUM, 4546 NULL, "NULL action."); 4547 return -rte_errno; 4548 } 4549 4550 if (!attr) { 4551 rte_flow_error_set(error, EINVAL, 4552 RTE_FLOW_ERROR_TYPE_ATTR, 4553 NULL, "NULL attribute."); 4554 return -rte_errno; 4555 } 4556 memset(&cons_filter, 0, sizeof(cons_filter)); 4557 4558 /* Get the non-void item of action */ 4559 while ((actions + i)->type == RTE_FLOW_ACTION_TYPE_VOID) 4560 i++; 4561 4562 if ((actions + i)->type == RTE_FLOW_ACTION_TYPE_RSS) { 4563 ret = i40e_flow_parse_attr(attr, error); 4564 if (ret) 4565 return ret; 4566 4567 cons_filter_type = RTE_ETH_FILTER_HASH; 4568 return i40e_hash_parse(dev, pattern, actions + i, 4569 &cons_filter.rss_conf, error); 4570 } 4571 4572 i = 0; 4573 /* Get the non-void item number of pattern */ 4574 while ((pattern + i)->type != RTE_FLOW_ITEM_TYPE_END) { 4575 if ((pattern + i)->type != RTE_FLOW_ITEM_TYPE_VOID) 4576 item_num++; 4577 i++; 4578 } 4579 item_num++; 4580 4581 if (item_num <= ARRAY_SIZE(g_items)) { 4582 items = g_items; 4583 } else { 4584 items = rte_zmalloc("i40e_pattern", 4585 item_num * sizeof(struct rte_flow_item), 0); 4586 if (!items) { 4587 rte_flow_error_set(error, ENOMEM, 4588 RTE_FLOW_ERROR_TYPE_ITEM_NUM, 4589 NULL, 4590 "No memory for PMD internal items."); 4591 return -ENOMEM; 4592 } 4593 } 4594 4595 i40e_pattern_skip_void_item(items, pattern); 4596 4597 i = 0; 4598 do { 4599 parse_filter = i40e_find_parse_filter_func(items, &i); 4600 if (!parse_filter && !flag) { 4601 rte_flow_error_set(error, EINVAL, 4602 RTE_FLOW_ERROR_TYPE_ITEM, 4603 pattern, "Unsupported pattern"); 4604 4605 if (items != g_items) 4606 rte_free(items); 4607 return -rte_errno; 4608 } 4609 4610 if (parse_filter) 4611 ret = parse_filter(dev, attr, items, actions, 4612 error, &cons_filter); 4613 4614 flag = true; 4615 } while ((ret < 0) && (i < RTE_DIM(i40e_supported_patterns))); 4616 4617 if (items != g_items) 4618 rte_free(items); 4619 4620 return ret; 4621 } 4622 4623 static struct rte_flow * 4624 i40e_flow_create(struct rte_eth_dev *dev, 4625 const struct rte_flow_attr *attr, 4626 const struct rte_flow_item pattern[], 4627 const struct rte_flow_action actions[], 4628 struct rte_flow_error *error) 4629 { 4630 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 4631 struct rte_flow *flow = NULL; 4632 struct i40e_fdir_info *fdir_info = &pf->fdir; 4633 int ret; 4634 4635 ret = i40e_flow_validate(dev, attr, pattern, actions, error); 4636 if (ret < 0) 4637 return NULL; 4638 4639 if (cons_filter_type == RTE_ETH_FILTER_FDIR) { 4640 flow = i40e_fdir_entry_pool_get(fdir_info); 4641 if (flow == NULL) { 4642 rte_flow_error_set(error, ENOBUFS, 4643 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4644 "Fdir space full"); 4645 4646 return flow; 4647 } 4648 } else { 4649 flow = rte_zmalloc("i40e_flow", sizeof(struct rte_flow), 0); 4650 if (!flow) { 4651 rte_flow_error_set(error, ENOMEM, 4652 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4653 "Failed to allocate memory"); 4654 return flow; 4655 } 4656 } 4657 4658 switch (cons_filter_type) { 4659 case RTE_ETH_FILTER_ETHERTYPE: 4660 ret = i40e_ethertype_filter_set(pf, 4661 &cons_filter.ethertype_filter, 1); 4662 if (ret) 4663 goto free_flow; 4664 flow->rule = TAILQ_LAST(&pf->ethertype.ethertype_list, 4665 i40e_ethertype_filter_list); 4666 break; 4667 case RTE_ETH_FILTER_FDIR: 4668 ret = i40e_flow_add_del_fdir_filter(dev, 4669 &cons_filter.fdir_filter, 1); 4670 if (ret) 4671 goto free_flow; 4672 flow->rule = TAILQ_LAST(&pf->fdir.fdir_list, 4673 i40e_fdir_filter_list); 4674 break; 4675 case RTE_ETH_FILTER_TUNNEL: 4676 ret = i40e_dev_consistent_tunnel_filter_set(pf, 4677 &cons_filter.consistent_tunnel_filter, 1); 4678 if (ret) 4679 goto free_flow; 4680 flow->rule = TAILQ_LAST(&pf->tunnel.tunnel_list, 4681 i40e_tunnel_filter_list); 4682 break; 4683 case RTE_ETH_FILTER_HASH: 4684 ret = i40e_hash_filter_create(pf, &cons_filter.rss_conf); 4685 if (ret) 4686 goto free_flow; 4687 flow->rule = TAILQ_LAST(&pf->rss_config_list, 4688 i40e_rss_conf_list); 4689 break; 4690 default: 4691 goto free_flow; 4692 } 4693 4694 flow->filter_type = cons_filter_type; 4695 TAILQ_INSERT_TAIL(&pf->flow_list, flow, node); 4696 return flow; 4697 4698 free_flow: 4699 rte_flow_error_set(error, -ret, 4700 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4701 "Failed to create flow."); 4702 4703 if (cons_filter_type != RTE_ETH_FILTER_FDIR) 4704 rte_free(flow); 4705 else 4706 i40e_fdir_entry_pool_put(fdir_info, flow); 4707 4708 return NULL; 4709 } 4710 4711 static int 4712 i40e_flow_destroy(struct rte_eth_dev *dev, 4713 struct rte_flow *flow, 4714 struct rte_flow_error *error) 4715 { 4716 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 4717 enum rte_filter_type filter_type = flow->filter_type; 4718 struct i40e_fdir_info *fdir_info = &pf->fdir; 4719 int ret = 0; 4720 4721 switch (filter_type) { 4722 case RTE_ETH_FILTER_ETHERTYPE: 4723 ret = i40e_flow_destroy_ethertype_filter(pf, 4724 (struct i40e_ethertype_filter *)flow->rule); 4725 break; 4726 case RTE_ETH_FILTER_TUNNEL: 4727 ret = i40e_flow_destroy_tunnel_filter(pf, 4728 (struct i40e_tunnel_filter *)flow->rule); 4729 break; 4730 case RTE_ETH_FILTER_FDIR: 4731 ret = i40e_flow_add_del_fdir_filter(dev, 4732 &((struct i40e_fdir_filter *)flow->rule)->fdir, 4733 0); 4734 4735 /* If the last flow is destroyed, disable fdir. */ 4736 if (!ret && TAILQ_EMPTY(&pf->fdir.fdir_list)) { 4737 i40e_fdir_rx_proc_enable(dev, 0); 4738 } 4739 break; 4740 case RTE_ETH_FILTER_HASH: 4741 ret = i40e_hash_filter_destroy(pf, flow->rule); 4742 break; 4743 default: 4744 PMD_DRV_LOG(WARNING, "Filter type (%d) not supported", 4745 filter_type); 4746 ret = -EINVAL; 4747 break; 4748 } 4749 4750 if (!ret) { 4751 TAILQ_REMOVE(&pf->flow_list, flow, node); 4752 if (filter_type == RTE_ETH_FILTER_FDIR) 4753 i40e_fdir_entry_pool_put(fdir_info, flow); 4754 else 4755 rte_free(flow); 4756 4757 } else 4758 rte_flow_error_set(error, -ret, 4759 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4760 "Failed to destroy flow."); 4761 4762 return ret; 4763 } 4764 4765 static int 4766 i40e_flow_destroy_ethertype_filter(struct i40e_pf *pf, 4767 struct i40e_ethertype_filter *filter) 4768 { 4769 struct i40e_hw *hw = I40E_PF_TO_HW(pf); 4770 struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype; 4771 struct i40e_ethertype_filter *node; 4772 struct i40e_control_filter_stats stats; 4773 uint16_t flags = 0; 4774 int ret = 0; 4775 4776 if (!(filter->flags & RTE_ETHTYPE_FLAGS_MAC)) 4777 flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC; 4778 if (filter->flags & RTE_ETHTYPE_FLAGS_DROP) 4779 flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_DROP; 4780 flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TO_QUEUE; 4781 4782 memset(&stats, 0, sizeof(stats)); 4783 ret = i40e_aq_add_rem_control_packet_filter(hw, 4784 filter->input.mac_addr.addr_bytes, 4785 filter->input.ether_type, 4786 flags, pf->main_vsi->seid, 4787 filter->queue, 0, &stats, NULL); 4788 if (ret < 0) 4789 return ret; 4790 4791 node = i40e_sw_ethertype_filter_lookup(ethertype_rule, &filter->input); 4792 if (!node) 4793 return -EINVAL; 4794 4795 ret = i40e_sw_ethertype_filter_del(pf, &node->input); 4796 4797 return ret; 4798 } 4799 4800 static int 4801 i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, 4802 struct i40e_tunnel_filter *filter) 4803 { 4804 struct i40e_hw *hw = I40E_PF_TO_HW(pf); 4805 struct i40e_vsi *vsi; 4806 struct i40e_pf_vf *vf; 4807 struct i40e_aqc_cloud_filters_element_bb cld_filter; 4808 struct i40e_tunnel_rule *tunnel_rule = &pf->tunnel; 4809 struct i40e_tunnel_filter *node; 4810 bool big_buffer = 0; 4811 int ret = 0; 4812 4813 memset(&cld_filter, 0, sizeof(cld_filter)); 4814 rte_ether_addr_copy((struct rte_ether_addr *)&filter->input.outer_mac, 4815 (struct rte_ether_addr *)&cld_filter.element.outer_mac); 4816 rte_ether_addr_copy((struct rte_ether_addr *)&filter->input.inner_mac, 4817 (struct rte_ether_addr *)&cld_filter.element.inner_mac); 4818 cld_filter.element.inner_vlan = filter->input.inner_vlan; 4819 cld_filter.element.flags = filter->input.flags; 4820 cld_filter.element.tenant_id = filter->input.tenant_id; 4821 cld_filter.element.queue_number = filter->queue; 4822 rte_memcpy(cld_filter.general_fields, 4823 filter->input.general_fields, 4824 sizeof(cld_filter.general_fields)); 4825 4826 if (!filter->is_to_vf) 4827 vsi = pf->main_vsi; 4828 else { 4829 vf = &pf->vfs[filter->vf_id]; 4830 vsi = vf->vsi; 4831 } 4832 4833 if (((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_0X11) == 4834 I40E_AQC_ADD_CLOUD_FILTER_0X11) || 4835 ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_0X12) == 4836 I40E_AQC_ADD_CLOUD_FILTER_0X12) || 4837 ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_0X10) == 4838 I40E_AQC_ADD_CLOUD_FILTER_0X10)) 4839 big_buffer = 1; 4840 4841 if (big_buffer) 4842 ret = i40e_aq_rem_cloud_filters_bb(hw, vsi->seid, 4843 &cld_filter, 1); 4844 else 4845 ret = i40e_aq_rem_cloud_filters(hw, vsi->seid, 4846 &cld_filter.element, 1); 4847 if (ret < 0) 4848 return -ENOTSUP; 4849 4850 node = i40e_sw_tunnel_filter_lookup(tunnel_rule, &filter->input); 4851 if (!node) 4852 return -EINVAL; 4853 4854 ret = i40e_sw_tunnel_filter_del(pf, &node->input); 4855 4856 return ret; 4857 } 4858 4859 static int 4860 i40e_flow_flush(struct rte_eth_dev *dev, struct rte_flow_error *error) 4861 { 4862 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); 4863 int ret; 4864 4865 ret = i40e_flow_flush_fdir_filter(pf); 4866 if (ret) { 4867 rte_flow_error_set(error, -ret, 4868 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4869 "Failed to flush FDIR flows."); 4870 return -rte_errno; 4871 } 4872 4873 ret = i40e_flow_flush_ethertype_filter(pf); 4874 if (ret) { 4875 rte_flow_error_set(error, -ret, 4876 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4877 "Failed to ethertype flush flows."); 4878 return -rte_errno; 4879 } 4880 4881 ret = i40e_flow_flush_tunnel_filter(pf); 4882 if (ret) { 4883 rte_flow_error_set(error, -ret, 4884 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4885 "Failed to flush tunnel flows."); 4886 return -rte_errno; 4887 } 4888 4889 ret = i40e_hash_filter_flush(pf); 4890 if (ret) 4891 rte_flow_error_set(error, -ret, 4892 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 4893 "Failed to flush RSS flows."); 4894 return ret; 4895 } 4896 4897 static int 4898 i40e_flow_flush_fdir_filter(struct i40e_pf *pf) 4899 { 4900 struct rte_eth_dev *dev = &rte_eth_devices[pf->dev_data->port_id]; 4901 struct i40e_fdir_info *fdir_info = &pf->fdir; 4902 struct i40e_fdir_filter *fdir_filter; 4903 enum i40e_filter_pctype pctype; 4904 struct rte_flow *flow; 4905 void *temp; 4906 int ret; 4907 uint32_t i = 0; 4908 4909 ret = i40e_fdir_flush(dev); 4910 if (!ret) { 4911 /* Delete FDIR filters in FDIR list. */ 4912 while ((fdir_filter = TAILQ_FIRST(&fdir_info->fdir_list))) { 4913 ret = i40e_sw_fdir_filter_del(pf, 4914 &fdir_filter->fdir.input); 4915 if (ret < 0) 4916 return ret; 4917 } 4918 4919 /* Delete FDIR flows in flow list. */ 4920 TAILQ_FOREACH_SAFE(flow, &pf->flow_list, node, temp) { 4921 if (flow->filter_type == RTE_ETH_FILTER_FDIR) { 4922 TAILQ_REMOVE(&pf->flow_list, flow, node); 4923 } 4924 } 4925 4926 /* reset bitmap */ 4927 rte_bitmap_reset(fdir_info->fdir_flow_pool.bitmap); 4928 for (i = 0; i < fdir_info->fdir_space_size; i++) { 4929 fdir_info->fdir_flow_pool.pool[i].idx = i; 4930 rte_bitmap_set(fdir_info->fdir_flow_pool.bitmap, i); 4931 } 4932 4933 fdir_info->fdir_actual_cnt = 0; 4934 fdir_info->fdir_guarantee_free_space = 4935 fdir_info->fdir_guarantee_total_space; 4936 memset(fdir_info->fdir_filter_array, 4937 0, 4938 sizeof(struct i40e_fdir_filter) * 4939 I40E_MAX_FDIR_FILTER_NUM); 4940 4941 for (pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4942 pctype <= I40E_FILTER_PCTYPE_L2_PAYLOAD; pctype++) { 4943 pf->fdir.flow_count[pctype] = 0; 4944 pf->fdir.flex_mask_flag[pctype] = 0; 4945 } 4946 4947 for (i = 0; i < I40E_MAX_FLXPLD_LAYER; i++) 4948 pf->fdir.flex_pit_flag[i] = 0; 4949 4950 /* Disable FDIR processing as all FDIR rules are now flushed */ 4951 i40e_fdir_rx_proc_enable(dev, 0); 4952 } 4953 4954 return ret; 4955 } 4956 4957 /* Flush all ethertype filters */ 4958 static int 4959 i40e_flow_flush_ethertype_filter(struct i40e_pf *pf) 4960 { 4961 struct i40e_ethertype_filter_list 4962 *ethertype_list = &pf->ethertype.ethertype_list; 4963 struct i40e_ethertype_filter *filter; 4964 struct rte_flow *flow; 4965 void *temp; 4966 int ret = 0; 4967 4968 while ((filter = TAILQ_FIRST(ethertype_list))) { 4969 ret = i40e_flow_destroy_ethertype_filter(pf, filter); 4970 if (ret) 4971 return ret; 4972 } 4973 4974 /* Delete ethertype flows in flow list. */ 4975 TAILQ_FOREACH_SAFE(flow, &pf->flow_list, node, temp) { 4976 if (flow->filter_type == RTE_ETH_FILTER_ETHERTYPE) { 4977 TAILQ_REMOVE(&pf->flow_list, flow, node); 4978 rte_free(flow); 4979 } 4980 } 4981 4982 return ret; 4983 } 4984 4985 /* Flush all tunnel filters */ 4986 static int 4987 i40e_flow_flush_tunnel_filter(struct i40e_pf *pf) 4988 { 4989 struct i40e_tunnel_filter_list 4990 *tunnel_list = &pf->tunnel.tunnel_list; 4991 struct i40e_tunnel_filter *filter; 4992 struct rte_flow *flow; 4993 void *temp; 4994 int ret = 0; 4995 4996 while ((filter = TAILQ_FIRST(tunnel_list))) { 4997 ret = i40e_flow_destroy_tunnel_filter(pf, filter); 4998 if (ret) 4999 return ret; 5000 } 5001 5002 /* Delete tunnel flows in flow list. */ 5003 TAILQ_FOREACH_SAFE(flow, &pf->flow_list, node, temp) { 5004 if (flow->filter_type == RTE_ETH_FILTER_TUNNEL) { 5005 TAILQ_REMOVE(&pf->flow_list, flow, node); 5006 rte_free(flow); 5007 } 5008 } 5009 5010 return ret; 5011 } 5012 5013 static int 5014 i40e_flow_query(struct rte_eth_dev *dev __rte_unused, 5015 struct rte_flow *flow, 5016 const struct rte_flow_action *actions, 5017 void *data, struct rte_flow_error *error) 5018 { 5019 struct i40e_rss_filter *rss_rule = (struct i40e_rss_filter *)flow->rule; 5020 enum rte_filter_type filter_type = flow->filter_type; 5021 struct rte_flow_action_rss *rss_conf = data; 5022 5023 if (!rss_rule) { 5024 rte_flow_error_set(error, EINVAL, 5025 RTE_FLOW_ERROR_TYPE_HANDLE, 5026 NULL, "Invalid rule"); 5027 return -rte_errno; 5028 } 5029 5030 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5031 switch (actions->type) { 5032 case RTE_FLOW_ACTION_TYPE_VOID: 5033 break; 5034 case RTE_FLOW_ACTION_TYPE_RSS: 5035 if (filter_type != RTE_ETH_FILTER_HASH) { 5036 rte_flow_error_set(error, ENOTSUP, 5037 RTE_FLOW_ERROR_TYPE_ACTION, 5038 actions, 5039 "action not supported"); 5040 return -rte_errno; 5041 } 5042 rte_memcpy(rss_conf, 5043 &rss_rule->rss_filter_info.conf, 5044 sizeof(struct rte_flow_action_rss)); 5045 break; 5046 default: 5047 return rte_flow_error_set(error, ENOTSUP, 5048 RTE_FLOW_ERROR_TYPE_ACTION, 5049 actions, 5050 "action not supported"); 5051 } 5052 } 5053 5054 return 0; 5055 } 5056