1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2001-2020 Intel Corporation 3 */ 4 5 #ifndef _I40E_ADMINQ_H_ 6 #define _I40E_ADMINQ_H_ 7 8 #include "i40e_osdep.h" 9 #include "i40e_status.h" 10 #include "i40e_adminq_cmd.h" 11 12 #define I40E_ADMINQ_DESC(R, i) \ 13 (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) 14 15 #define I40E_ADMINQ_DESC_ALIGNMENT 4096 16 17 struct i40e_adminq_ring { 18 struct i40e_virt_mem dma_head; /* space for dma structures */ 19 struct i40e_dma_mem desc_buf; /* descriptor ring memory */ 20 struct i40e_virt_mem cmd_buf; /* command buffer memory */ 21 22 union { 23 struct i40e_dma_mem *asq_bi; 24 struct i40e_dma_mem *arq_bi; 25 } r; 26 27 u16 count; /* Number of descriptors */ 28 u16 rx_buf_len; /* Admin Receive Queue buffer length */ 29 30 /* used for interrupt processing */ 31 u16 next_to_use; 32 u16 next_to_clean; 33 34 /* used for queue tracking */ 35 u32 head; 36 u32 tail; 37 u32 len; 38 u32 bah; 39 u32 bal; 40 }; 41 42 /* ASQ transaction details */ 43 struct i40e_asq_cmd_details { 44 void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ 45 u64 cookie; 46 u16 flags_ena; 47 u16 flags_dis; 48 bool async; 49 bool postpone; 50 struct i40e_aq_desc *wb_desc; 51 }; 52 53 #define I40E_ADMINQ_DETAILS(R, i) \ 54 (&(((struct i40e_asq_cmd_details *)((R).cmd_buf.va))[i])) 55 56 /* ARQ event information */ 57 struct i40e_arq_event_info { 58 struct i40e_aq_desc desc; 59 u16 msg_len; 60 u16 buf_len; 61 u8 *msg_buf; 62 }; 63 64 /* Admin Queue information */ 65 struct i40e_adminq_info { 66 struct i40e_adminq_ring arq; /* receive queue */ 67 struct i40e_adminq_ring asq; /* send queue */ 68 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/ 69 u16 num_arq_entries; /* receive queue depth */ 70 u16 num_asq_entries; /* send queue depth */ 71 u16 arq_buf_size; /* receive queue buffer size */ 72 u16 asq_buf_size; /* send queue buffer size */ 73 u16 fw_maj_ver; /* firmware major version */ 74 u16 fw_min_ver; /* firmware minor version */ 75 u32 fw_build; /* firmware build number */ 76 u16 api_maj_ver; /* api major version */ 77 u16 api_min_ver; /* api minor version */ 78 79 struct i40e_spinlock asq_spinlock; /* Send queue spinlock */ 80 struct i40e_spinlock arq_spinlock; /* Receive queue spinlock */ 81 82 /* last status values on send and receive queues */ 83 enum i40e_admin_queue_err asq_last_status; 84 enum i40e_admin_queue_err arq_last_status; 85 }; 86 87 /** 88 * i40e_aq_rc_to_posix - convert errors to user-land codes 89 * aq_ret: AdminQ handler error code can override aq_rc 90 * aq_rc: AdminQ firmware error code to convert 91 **/ 92 STATIC INLINE int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) 93 { 94 int aq_to_posix[] = { 95 0, /* I40E_AQ_RC_OK */ 96 -EPERM, /* I40E_AQ_RC_EPERM */ 97 -ENOENT, /* I40E_AQ_RC_ENOENT */ 98 -ESRCH, /* I40E_AQ_RC_ESRCH */ 99 -EINTR, /* I40E_AQ_RC_EINTR */ 100 -EIO, /* I40E_AQ_RC_EIO */ 101 -ENXIO, /* I40E_AQ_RC_ENXIO */ 102 -E2BIG, /* I40E_AQ_RC_E2BIG */ 103 -EAGAIN, /* I40E_AQ_RC_EAGAIN */ 104 -ENOMEM, /* I40E_AQ_RC_ENOMEM */ 105 -EACCES, /* I40E_AQ_RC_EACCES */ 106 -EFAULT, /* I40E_AQ_RC_EFAULT */ 107 -EBUSY, /* I40E_AQ_RC_EBUSY */ 108 -EEXIST, /* I40E_AQ_RC_EEXIST */ 109 -EINVAL, /* I40E_AQ_RC_EINVAL */ 110 -ENOTTY, /* I40E_AQ_RC_ENOTTY */ 111 -ENOSPC, /* I40E_AQ_RC_ENOSPC */ 112 -ENOSYS, /* I40E_AQ_RC_ENOSYS */ 113 -ERANGE, /* I40E_AQ_RC_ERANGE */ 114 -EPIPE, /* I40E_AQ_RC_EFLUSHED */ 115 -ESPIPE, /* I40E_AQ_RC_BAD_ADDR */ 116 -EROFS, /* I40E_AQ_RC_EMODE */ 117 -EFBIG, /* I40E_AQ_RC_EFBIG */ 118 }; 119 120 /* aq_rc is invalid if AQ timed out */ 121 if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT) 122 return -EAGAIN; 123 124 if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) 125 return -ERANGE; 126 127 return aq_to_posix[aq_rc]; 128 } 129 130 /* general information */ 131 #define I40E_AQ_LARGE_BUF 512 132 #define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */ 133 134 void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, 135 u16 opcode); 136 137 #endif /* _I40E_ADMINQ_H_ */ 138