1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Huawei Technologies Co., Ltd 3 */ 4 5 #include <rte_pci.h> 6 #include <rte_bus_pci.h> 7 #include <rte_ethdev_pci.h> 8 #include <rte_mbuf.h> 9 #include <rte_malloc.h> 10 #include <rte_memcpy.h> 11 #include <rte_mempool.h> 12 #include <rte_errno.h> 13 #include <rte_ether.h> 14 15 #include "base/hinic_compat.h" 16 #include "base/hinic_pmd_hwdev.h" 17 #include "base/hinic_pmd_hwif.h" 18 #include "base/hinic_pmd_wq.h" 19 #include "base/hinic_pmd_cfg.h" 20 #include "base/hinic_pmd_mgmt.h" 21 #include "base/hinic_pmd_cmdq.h" 22 #include "base/hinic_pmd_niccfg.h" 23 #include "base/hinic_pmd_nicio.h" 24 #include "base/hinic_pmd_mbox.h" 25 #include "hinic_pmd_ethdev.h" 26 #include "hinic_pmd_tx.h" 27 #include "hinic_pmd_rx.h" 28 29 /* Vendor ID used by Huawei devices */ 30 #define HINIC_HUAWEI_VENDOR_ID 0x19E5 31 32 /* Hinic devices */ 33 #define HINIC_DEV_ID_PRD 0x1822 34 #define HINIC_DEV_ID_VF 0x375E 35 #define HINIC_DEV_ID_VF_HV 0x379E 36 37 /* Mezz card for Blade Server */ 38 #define HINIC_DEV_ID_MEZZ_25GE 0x0210 39 #define HINIC_DEV_ID_MEZZ_100GE 0x0205 40 41 /* 2*25G and 2*100G card */ 42 #define HINIC_DEV_ID_1822_DUAL_25GE 0x0206 43 #define HINIC_DEV_ID_1822_100GE 0x0200 44 45 #define HINIC_SERVICE_MODE_NIC 2 46 47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10 48 49 #define DEFAULT_BASE_COS 4 50 #define NR_MAX_COS 8 51 52 #define HINIC_MIN_RX_BUF_SIZE 1024 53 #define HINIC_MAX_UC_MAC_ADDRS 128 54 #define HINIC_MAX_MC_MAC_ADDRS 2048 55 56 #define HINIC_DEFAULT_BURST_SIZE 32 57 #define HINIC_DEFAULT_NB_QUEUES 1 58 #define HINIC_DEFAULT_RING_SIZE 1024 59 #define HINIC_MAX_LRO_SIZE 65536 60 61 /* 62 * vlan_id is a 12 bit number. 63 * The VFTA array is actually a 4096 bit array, 128 of 32bit elements. 64 * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element. 65 * The higher 7 bit val specifies VFTA array index. 66 */ 67 #define HINIC_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F)) 68 #define HINIC_VFTA_IDX(vlan_id) ((vlan_id) >> 5) 69 70 #define HINIC_VLAN_FILTER_EN (1U << 0) 71 72 #define HINIC_MTU_TO_PKTLEN(mtu) \ 73 ((mtu) + ETH_HLEN + ETH_CRC_LEN) 74 75 #define HINIC_PKTLEN_TO_MTU(pktlen) \ 76 ((pktlen) - (ETH_HLEN + ETH_CRC_LEN)) 77 78 /* lro numer limit for one packet */ 79 #define HINIC_LRO_WQE_NUM_DEFAULT 8 80 81 struct hinic_xstats_name_off { 82 char name[RTE_ETH_XSTATS_NAME_SIZE]; 83 u32 offset; 84 }; 85 86 #define HINIC_FUNC_STAT(_stat_item) { \ 87 .name = #_stat_item, \ 88 .offset = offsetof(struct hinic_vport_stats, _stat_item) \ 89 } 90 91 #define HINIC_PORT_STAT(_stat_item) { \ 92 .name = #_stat_item, \ 93 .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \ 94 } 95 96 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = { 97 HINIC_FUNC_STAT(tx_unicast_pkts_vport), 98 HINIC_FUNC_STAT(tx_unicast_bytes_vport), 99 HINIC_FUNC_STAT(tx_multicast_pkts_vport), 100 HINIC_FUNC_STAT(tx_multicast_bytes_vport), 101 HINIC_FUNC_STAT(tx_broadcast_pkts_vport), 102 HINIC_FUNC_STAT(tx_broadcast_bytes_vport), 103 104 HINIC_FUNC_STAT(rx_unicast_pkts_vport), 105 HINIC_FUNC_STAT(rx_unicast_bytes_vport), 106 HINIC_FUNC_STAT(rx_multicast_pkts_vport), 107 HINIC_FUNC_STAT(rx_multicast_bytes_vport), 108 HINIC_FUNC_STAT(rx_broadcast_pkts_vport), 109 HINIC_FUNC_STAT(rx_broadcast_bytes_vport), 110 111 HINIC_FUNC_STAT(tx_discard_vport), 112 HINIC_FUNC_STAT(rx_discard_vport), 113 HINIC_FUNC_STAT(tx_err_vport), 114 HINIC_FUNC_STAT(rx_err_vport), 115 }; 116 117 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \ 118 sizeof(hinic_vport_stats_strings[0])) 119 120 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = { 121 HINIC_PORT_STAT(mac_rx_total_pkt_num), 122 HINIC_PORT_STAT(mac_rx_total_oct_num), 123 HINIC_PORT_STAT(mac_rx_bad_pkt_num), 124 HINIC_PORT_STAT(mac_rx_bad_oct_num), 125 HINIC_PORT_STAT(mac_rx_good_pkt_num), 126 HINIC_PORT_STAT(mac_rx_good_oct_num), 127 HINIC_PORT_STAT(mac_rx_uni_pkt_num), 128 HINIC_PORT_STAT(mac_rx_multi_pkt_num), 129 HINIC_PORT_STAT(mac_rx_broad_pkt_num), 130 HINIC_PORT_STAT(mac_tx_total_pkt_num), 131 HINIC_PORT_STAT(mac_tx_total_oct_num), 132 HINIC_PORT_STAT(mac_tx_bad_pkt_num), 133 HINIC_PORT_STAT(mac_tx_bad_oct_num), 134 HINIC_PORT_STAT(mac_tx_good_pkt_num), 135 HINIC_PORT_STAT(mac_tx_good_oct_num), 136 HINIC_PORT_STAT(mac_tx_uni_pkt_num), 137 HINIC_PORT_STAT(mac_tx_multi_pkt_num), 138 HINIC_PORT_STAT(mac_tx_broad_pkt_num), 139 HINIC_PORT_STAT(mac_rx_fragment_pkt_num), 140 HINIC_PORT_STAT(mac_rx_undersize_pkt_num), 141 HINIC_PORT_STAT(mac_rx_undermin_pkt_num), 142 HINIC_PORT_STAT(mac_rx_64_oct_pkt_num), 143 HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num), 144 HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num), 145 HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num), 146 HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num), 147 HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num), 148 HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num), 149 HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num), 150 HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num), 151 HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num), 152 HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num), 153 HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num), 154 HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num), 155 HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num), 156 HINIC_PORT_STAT(mac_rx_oversize_pkt_num), 157 HINIC_PORT_STAT(mac_rx_jabber_pkt_num), 158 HINIC_PORT_STAT(mac_rx_mac_pause_num), 159 HINIC_PORT_STAT(mac_rx_pfc_pkt_num), 160 HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num), 161 HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num), 162 HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num), 163 HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num), 164 HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num), 165 HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num), 166 HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num), 167 HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num), 168 HINIC_PORT_STAT(mac_rx_mac_control_pkt_num), 169 HINIC_PORT_STAT(mac_rx_sym_err_pkt_num), 170 HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num), 171 HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num), 172 HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num), 173 HINIC_PORT_STAT(mac_tx_fragment_pkt_num), 174 HINIC_PORT_STAT(mac_tx_undersize_pkt_num), 175 HINIC_PORT_STAT(mac_tx_undermin_pkt_num), 176 HINIC_PORT_STAT(mac_tx_64_oct_pkt_num), 177 HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num), 178 HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num), 179 HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num), 180 HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num), 181 HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num), 182 HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num), 183 HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num), 184 HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num), 185 HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num), 186 HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num), 187 HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num), 188 HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num), 189 HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num), 190 HINIC_PORT_STAT(mac_tx_oversize_pkt_num), 191 HINIC_PORT_STAT(mac_trans_jabber_pkt_num), 192 HINIC_PORT_STAT(mac_tx_mac_pause_num), 193 HINIC_PORT_STAT(mac_tx_pfc_pkt_num), 194 HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num), 195 HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num), 196 HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num), 197 HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num), 198 HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num), 199 HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num), 200 HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num), 201 HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num), 202 HINIC_PORT_STAT(mac_tx_mac_control_pkt_num), 203 HINIC_PORT_STAT(mac_tx_err_all_pkt_num), 204 HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num), 205 HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num), 206 }; 207 208 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \ 209 sizeof(hinic_phyport_stats_strings[0])) 210 211 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = { 212 {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)}, 213 {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)}, 214 }; 215 216 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \ 217 sizeof(hinic_rxq_stats_strings[0])) 218 219 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = { 220 {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)}, 221 {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)}, 222 {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)}, 223 {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)}, 224 {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)}, 225 {"sge_len0", offsetof(struct hinic_txq_stats, sge_len0)}, 226 {"mbuf_null", offsetof(struct hinic_txq_stats, mbuf_null)}, 227 }; 228 229 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \ 230 sizeof(hinic_txq_stats_strings[0])) 231 232 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev) 233 { 234 if (HINIC_IS_VF(nic_dev->hwdev)) { 235 return (HINIC_VPORT_XSTATS_NUM + 236 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq + 237 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq); 238 } else { 239 return (HINIC_VPORT_XSTATS_NUM + 240 HINIC_PHYPORT_XSTATS_NUM + 241 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq + 242 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq); 243 } 244 } 245 246 static const struct rte_eth_desc_lim hinic_rx_desc_lim = { 247 .nb_max = HINIC_MAX_QUEUE_DEPTH, 248 .nb_min = HINIC_MIN_QUEUE_DEPTH, 249 .nb_align = HINIC_RXD_ALIGN, 250 }; 251 252 static const struct rte_eth_desc_lim hinic_tx_desc_lim = { 253 .nb_max = HINIC_MAX_QUEUE_DEPTH, 254 .nb_min = HINIC_MIN_QUEUE_DEPTH, 255 .nb_align = HINIC_TXD_ALIGN, 256 }; 257 258 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask); 259 260 /** 261 * Interrupt handler triggered by NIC for handling 262 * specific event. 263 * 264 * @param: The address of parameter (struct rte_eth_dev *) regsitered before. 265 */ 266 static void hinic_dev_interrupt_handler(void *param) 267 { 268 struct rte_eth_dev *dev = param; 269 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 270 271 if (!rte_bit_relaxed_get32(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) { 272 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d", 273 nic_dev->proc_dev_name, dev->data->port_id); 274 return; 275 } 276 277 /* aeq0 msg handler */ 278 hinic_dev_handle_aeq_event(nic_dev->hwdev, param); 279 } 280 281 /** 282 * Ethernet device configuration. 283 * 284 * Prepare the driver for a given number of TX and RX queues, mtu size 285 * and configure RSS. 286 * 287 * @param dev 288 * Pointer to Ethernet device structure. 289 * 290 * @return 291 * 0 on success, negative error value otherwise. 292 */ 293 static int hinic_dev_configure(struct rte_eth_dev *dev) 294 { 295 struct hinic_nic_dev *nic_dev; 296 struct hinic_nic_io *nic_io; 297 int err; 298 299 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 300 nic_io = nic_dev->hwdev->nic_io; 301 302 nic_dev->num_sq = dev->data->nb_tx_queues; 303 nic_dev->num_rq = dev->data->nb_rx_queues; 304 305 nic_io->num_sqs = dev->data->nb_tx_queues; 306 nic_io->num_rqs = dev->data->nb_rx_queues; 307 308 /* queue pair is max_num(sq, rq) */ 309 nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ? 310 nic_dev->num_sq : nic_dev->num_rq; 311 nic_io->num_qps = nic_dev->num_qps; 312 313 if (nic_dev->num_qps > nic_io->max_qps) { 314 PMD_DRV_LOG(ERR, 315 "Queue number out of range, get queue_num:%d, max_queue_num:%d", 316 nic_dev->num_qps, nic_io->max_qps); 317 return -EINVAL; 318 } 319 320 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 321 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 322 323 /* mtu size is 256~9600 */ 324 if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE || 325 dev->data->dev_conf.rxmode.max_rx_pkt_len > 326 HINIC_MAX_JUMBO_FRAME_SIZE) { 327 PMD_DRV_LOG(ERR, 328 "Max rx pkt len out of range, get max_rx_pkt_len:%d, " 329 "expect between %d and %d", 330 dev->data->dev_conf.rxmode.max_rx_pkt_len, 331 HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE); 332 return -EINVAL; 333 } 334 335 nic_dev->mtu_size = 336 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len); 337 338 /* rss template */ 339 err = hinic_config_mq_mode(dev, TRUE); 340 if (err) { 341 PMD_DRV_LOG(ERR, "Config multi-queue failed"); 342 return err; 343 } 344 345 /* init vlan offoad */ 346 err = hinic_vlan_offload_set(dev, 347 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK); 348 if (err) { 349 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed"); 350 (void)hinic_config_mq_mode(dev, FALSE); 351 return err; 352 } 353 354 /* clear fdir filter flag in function table */ 355 hinic_free_fdir_filter(nic_dev); 356 357 return HINIC_OK; 358 } 359 360 /** 361 * DPDK callback to create the receive queue. 362 * 363 * @param dev 364 * Pointer to Ethernet device structure. 365 * @param queue_idx 366 * RX queue index. 367 * @param nb_desc 368 * Number of descriptors for receive queue. 369 * @param socket_id 370 * NUMA socket on which memory must be allocated. 371 * @param rx_conf 372 * Thresholds parameters (unused_). 373 * @param mp 374 * Memory pool for buffer allocations. 375 * 376 * @return 377 * 0 on success, negative error value otherwise. 378 */ 379 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 380 uint16_t nb_desc, unsigned int socket_id, 381 __rte_unused const struct rte_eth_rxconf *rx_conf, 382 struct rte_mempool *mp) 383 { 384 int rc; 385 struct hinic_nic_dev *nic_dev; 386 struct hinic_hwdev *hwdev; 387 struct hinic_rxq *rxq; 388 u16 rq_depth, rx_free_thresh; 389 u32 buf_size; 390 391 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 392 hwdev = nic_dev->hwdev; 393 394 /* queue depth must be power of 2, otherwise will be aligned up */ 395 rq_depth = (nb_desc & (nb_desc - 1)) ? 396 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc; 397 398 /* 399 * Validate number of receive descriptors. 400 * It must not exceed hardware maximum and minimum. 401 */ 402 if (rq_depth > HINIC_MAX_QUEUE_DEPTH || 403 rq_depth < HINIC_MIN_QUEUE_DEPTH) { 404 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)", 405 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH, 406 (int)nb_desc, (int)rq_depth, 407 (int)dev->data->port_id, (int)queue_idx); 408 return -EINVAL; 409 } 410 411 /* 412 * The RX descriptor ring will be cleaned after rxq->rx_free_thresh 413 * descriptors are used or if the number of descriptors required 414 * to transmit a packet is greater than the number of free RX 415 * descriptors. 416 * The following constraints must be satisfied: 417 * rx_free_thresh must be greater than 0. 418 * rx_free_thresh must be less than the size of the ring minus 1. 419 * When set to zero use default values. 420 */ 421 rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ? 422 rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH); 423 if (rx_free_thresh >= (rq_depth - 1)) { 424 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)", 425 (unsigned int)rx_free_thresh, 426 (int)dev->data->port_id, 427 (int)queue_idx); 428 return -EINVAL; 429 } 430 431 rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq), 432 RTE_CACHE_LINE_SIZE, socket_id); 433 if (!rxq) { 434 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s", 435 queue_idx, dev->data->name); 436 return -ENOMEM; 437 } 438 nic_dev->rxqs[queue_idx] = rxq; 439 440 /* alloc rx sq hw wqe page */ 441 rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id); 442 if (rc) { 443 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d", 444 queue_idx, dev->data->name, rq_depth); 445 goto ceate_rq_fail; 446 } 447 448 /* mbuf pool must be assigned before setup rx resources */ 449 rxq->mb_pool = mp; 450 451 rc = 452 hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) - 453 RTE_PKTMBUF_HEADROOM, &buf_size); 454 if (rc) { 455 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s", 456 dev->data->name); 457 goto adjust_bufsize_fail; 458 } 459 460 /* rx queue info, rearm control */ 461 rxq->wq = &hwdev->nic_io->rq_wq[queue_idx]; 462 rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr; 463 rxq->nic_dev = nic_dev; 464 rxq->q_id = queue_idx; 465 rxq->q_depth = rq_depth; 466 rxq->buf_len = (u16)buf_size; 467 rxq->rx_free_thresh = rx_free_thresh; 468 rxq->socket_id = socket_id; 469 470 /* the last point cant do mbuf rearm in bulk */ 471 rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh; 472 473 /* device port identifier */ 474 rxq->port_id = dev->data->port_id; 475 476 /* alloc rx_cqe and prepare rq_wqe */ 477 rc = hinic_setup_rx_resources(rxq); 478 if (rc) { 479 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name: %s", 480 queue_idx, dev->data->name); 481 goto setup_rx_res_err; 482 } 483 484 /* record nic_dev rxq in rte_eth rx_queues */ 485 dev->data->rx_queues[queue_idx] = rxq; 486 487 return 0; 488 489 setup_rx_res_err: 490 adjust_bufsize_fail: 491 hinic_destroy_rq(hwdev, queue_idx); 492 493 ceate_rq_fail: 494 rte_free(rxq); 495 496 return rc; 497 } 498 499 static void hinic_reset_rx_queue(struct rte_eth_dev *dev) 500 { 501 struct hinic_rxq *rxq; 502 struct hinic_nic_dev *nic_dev; 503 int q_id = 0; 504 505 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 506 507 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) { 508 rxq = dev->data->rx_queues[q_id]; 509 510 rxq->wq->cons_idx = 0; 511 rxq->wq->prod_idx = 0; 512 rxq->wq->delta = rxq->q_depth; 513 rxq->wq->mask = rxq->q_depth - 1; 514 515 /* alloc mbuf to rq */ 516 hinic_rx_alloc_pkts(rxq); 517 } 518 } 519 520 /** 521 * DPDK callback to configure the transmit queue. 522 * 523 * @param dev 524 * Pointer to Ethernet device structure. 525 * @param queue_idx 526 * Transmit queue index. 527 * @param nb_desc 528 * Number of descriptors for transmit queue. 529 * @param socket_id 530 * NUMA socket on which memory must be allocated. 531 * @param tx_conf 532 * Tx queue configuration parameters. 533 * 534 * @return 535 * 0 on success, negative error value otherwise. 536 */ 537 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 538 uint16_t nb_desc, unsigned int socket_id, 539 __rte_unused const struct rte_eth_txconf *tx_conf) 540 { 541 int rc; 542 struct hinic_nic_dev *nic_dev; 543 struct hinic_hwdev *hwdev; 544 struct hinic_txq *txq; 545 u16 sq_depth, tx_free_thresh; 546 547 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 548 hwdev = nic_dev->hwdev; 549 550 /* queue depth must be power of 2, otherwise will be aligned up */ 551 sq_depth = (nb_desc & (nb_desc - 1)) ? 552 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc; 553 554 /* 555 * Validate number of transmit descriptors. 556 * It must not exceed hardware maximum and minimum. 557 */ 558 if (sq_depth > HINIC_MAX_QUEUE_DEPTH || 559 sq_depth < HINIC_MIN_QUEUE_DEPTH) { 560 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)", 561 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH, 562 (int)nb_desc, (int)sq_depth, 563 (int)dev->data->port_id, (int)queue_idx); 564 return -EINVAL; 565 } 566 567 /* 568 * The TX descriptor ring will be cleaned after txq->tx_free_thresh 569 * descriptors are used or if the number of descriptors required 570 * to transmit a packet is greater than the number of free TX 571 * descriptors. 572 * The following constraints must be satisfied: 573 * tx_free_thresh must be greater than 0. 574 * tx_free_thresh must be less than the size of the ring minus 1. 575 * When set to zero use default values. 576 */ 577 tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ? 578 tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH); 579 if (tx_free_thresh >= (sq_depth - 1)) { 580 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)", 581 (unsigned int)tx_free_thresh, (int)dev->data->port_id, 582 (int)queue_idx); 583 return -EINVAL; 584 } 585 586 txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq), 587 RTE_CACHE_LINE_SIZE, socket_id); 588 if (!txq) { 589 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s", 590 queue_idx, dev->data->name); 591 return -ENOMEM; 592 } 593 nic_dev->txqs[queue_idx] = txq; 594 595 /* alloc tx sq hw wqepage */ 596 rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id); 597 if (rc) { 598 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d", 599 queue_idx, dev->data->name, sq_depth); 600 goto create_sq_fail; 601 } 602 603 txq->q_id = queue_idx; 604 txq->q_depth = sq_depth; 605 txq->port_id = dev->data->port_id; 606 txq->tx_free_thresh = tx_free_thresh; 607 txq->nic_dev = nic_dev; 608 txq->wq = &hwdev->nic_io->sq_wq[queue_idx]; 609 txq->sq = &hwdev->nic_io->qps[queue_idx].sq; 610 txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr; 611 txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq); 612 txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) - 613 sizeof(struct hinic_sq_bufdesc); 614 txq->cos = nic_dev->default_cos; 615 txq->socket_id = socket_id; 616 617 /* alloc software txinfo */ 618 rc = hinic_setup_tx_resources(txq); 619 if (rc) { 620 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s", 621 queue_idx, dev->data->name); 622 goto setup_tx_res_fail; 623 } 624 625 /* record nic_dev txq in rte_eth tx_queues */ 626 dev->data->tx_queues[queue_idx] = txq; 627 628 return HINIC_OK; 629 630 setup_tx_res_fail: 631 hinic_destroy_sq(hwdev, queue_idx); 632 633 create_sq_fail: 634 rte_free(txq); 635 636 return rc; 637 } 638 639 static void hinic_reset_tx_queue(struct rte_eth_dev *dev) 640 { 641 struct hinic_nic_dev *nic_dev; 642 struct hinic_txq *txq; 643 struct hinic_nic_io *nic_io; 644 struct hinic_hwdev *hwdev; 645 volatile u32 *ci_addr; 646 int q_id = 0; 647 648 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 649 hwdev = nic_dev->hwdev; 650 nic_io = hwdev->nic_io; 651 652 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) { 653 txq = dev->data->tx_queues[q_id]; 654 655 txq->wq->cons_idx = 0; 656 txq->wq->prod_idx = 0; 657 txq->wq->delta = txq->q_depth; 658 txq->wq->mask = txq->q_depth - 1; 659 660 /* clear hardware ci */ 661 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base, 662 q_id); 663 *ci_addr = 0; 664 } 665 } 666 667 /** 668 * Get link speed from NIC. 669 * 670 * @param dev 671 * Pointer to Ethernet device structure. 672 * @param speed_capa 673 * Pointer to link speed structure. 674 */ 675 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa) 676 { 677 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 678 u32 supported_link, advertised_link; 679 int err; 680 681 #define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX) 682 683 #define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR) 684 685 #define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \ 686 (1U << HINIC_25GE_BASE_CR_S) | \ 687 (1U << HINIC_25GE_BASE_KR) | \ 688 (1U << HINIC_25GE_BASE_CR)) 689 690 #define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \ 691 (1U << HINIC_40GE_BASE_CR4)) 692 693 #define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \ 694 (1U << HINIC_100GE_BASE_CR4)) 695 696 err = hinic_get_link_mode(nic_dev->hwdev, 697 &supported_link, &advertised_link); 698 if (err || supported_link == HINIC_SUPPORTED_UNKNOWN || 699 advertised_link == HINIC_SUPPORTED_UNKNOWN) { 700 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u", 701 nic_dev->proc_dev_name, dev->data->port_id); 702 } else { 703 *speed_capa = 0; 704 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G)) 705 *speed_capa |= ETH_LINK_SPEED_1G; 706 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G)) 707 *speed_capa |= ETH_LINK_SPEED_10G; 708 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G)) 709 *speed_capa |= ETH_LINK_SPEED_25G; 710 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G)) 711 *speed_capa |= ETH_LINK_SPEED_40G; 712 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G)) 713 *speed_capa |= ETH_LINK_SPEED_100G; 714 } 715 } 716 717 /** 718 * DPDK callback to get information about the device. 719 * 720 * @param dev 721 * Pointer to Ethernet device structure. 722 * @param info 723 * Pointer to Info structure output buffer. 724 */ 725 static int 726 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 727 { 728 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 729 730 info->max_rx_queues = nic_dev->nic_cap.max_rqs; 731 info->max_tx_queues = nic_dev->nic_cap.max_sqs; 732 info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE; 733 info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE; 734 info->max_mac_addrs = HINIC_MAX_UC_MAC_ADDRS; 735 info->min_mtu = HINIC_MIN_MTU_SIZE; 736 info->max_mtu = HINIC_MAX_MTU_SIZE; 737 info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE; 738 739 hinic_get_speed_capa(dev, &info->speed_capa); 740 info->rx_queue_offload_capa = 0; 741 info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP | 742 DEV_RX_OFFLOAD_IPV4_CKSUM | 743 DEV_RX_OFFLOAD_UDP_CKSUM | 744 DEV_RX_OFFLOAD_TCP_CKSUM | 745 DEV_RX_OFFLOAD_VLAN_FILTER | 746 DEV_RX_OFFLOAD_SCATTER | 747 DEV_RX_OFFLOAD_JUMBO_FRAME | 748 DEV_RX_OFFLOAD_TCP_LRO | 749 DEV_RX_OFFLOAD_RSS_HASH; 750 751 info->tx_queue_offload_capa = 0; 752 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT | 753 DEV_TX_OFFLOAD_IPV4_CKSUM | 754 DEV_TX_OFFLOAD_UDP_CKSUM | 755 DEV_TX_OFFLOAD_TCP_CKSUM | 756 DEV_TX_OFFLOAD_SCTP_CKSUM | 757 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 758 DEV_TX_OFFLOAD_TCP_TSO | 759 DEV_TX_OFFLOAD_MULTI_SEGS; 760 761 info->hash_key_size = HINIC_RSS_KEY_SIZE; 762 info->reta_size = HINIC_RSS_INDIR_SIZE; 763 info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL; 764 info->rx_desc_lim = hinic_rx_desc_lim; 765 info->tx_desc_lim = hinic_tx_desc_lim; 766 767 /* Driver-preferred Rx/Tx parameters */ 768 info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE; 769 info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE; 770 info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES; 771 info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES; 772 info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE; 773 info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE; 774 775 return 0; 776 } 777 778 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version, 779 size_t fw_size) 780 { 781 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 782 char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0}; 783 int err; 784 785 err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver); 786 if (err) { 787 PMD_DRV_LOG(ERR, "Failed to get fw version"); 788 return -EINVAL; 789 } 790 791 if (fw_size < strlen(fw_ver) + 1) 792 return (strlen(fw_ver) + 1); 793 794 snprintf(fw_version, fw_size, "%s", fw_ver); 795 796 return 0; 797 } 798 799 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl) 800 { 801 int err; 802 803 err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl); 804 if (err) { 805 PMD_DRV_LOG(ERR, "Failed to set rx mode"); 806 return -EINVAL; 807 } 808 nic_dev->rx_mode_status = rx_mode_ctrl; 809 810 return 0; 811 } 812 813 static int hinic_rxtx_configure(struct rte_eth_dev *dev) 814 { 815 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 816 int err; 817 818 /* rx configure, if rss enable, need to init default configuration */ 819 err = hinic_rx_configure(dev); 820 if (err) { 821 PMD_DRV_LOG(ERR, "Configure rss failed"); 822 return err; 823 } 824 825 /* rx mode init */ 826 err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE); 827 if (err) { 828 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed", 829 HINIC_DEFAULT_RX_MODE); 830 goto set_rx_mode_fail; 831 } 832 833 return HINIC_OK; 834 835 set_rx_mode_fail: 836 hinic_rx_remove_configure(dev); 837 838 return err; 839 } 840 841 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev) 842 { 843 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 844 845 (void)hinic_config_rx_mode(nic_dev, 0); 846 hinic_rx_remove_configure(dev); 847 } 848 849 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev, 850 struct rte_eth_link *link) 851 { 852 int rc; 853 u8 port_link_status = 0; 854 struct nic_port_info port_link_info; 855 struct hinic_hwdev *nic_hwdev = nic_dev->hwdev; 856 uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M, 857 ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G, 858 ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G, 859 ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G}; 860 861 rc = hinic_get_link_status(nic_hwdev, &port_link_status); 862 if (rc) 863 return rc; 864 865 if (!port_link_status) { 866 link->link_status = ETH_LINK_DOWN; 867 link->link_speed = 0; 868 link->link_duplex = ETH_LINK_HALF_DUPLEX; 869 link->link_autoneg = ETH_LINK_FIXED; 870 return HINIC_OK; 871 } 872 873 memset(&port_link_info, 0, sizeof(port_link_info)); 874 rc = hinic_get_port_info(nic_hwdev, &port_link_info); 875 if (rc) 876 return rc; 877 878 link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX]; 879 link->link_duplex = port_link_info.duplex; 880 link->link_autoneg = port_link_info.autoneg_state; 881 link->link_status = port_link_status; 882 883 return HINIC_OK; 884 } 885 886 /** 887 * DPDK callback to retrieve physical link information. 888 * 889 * @param dev 890 * Pointer to Ethernet device structure. 891 * @param wait_to_complete 892 * Wait for request completion. 893 * 894 * @return 895 * 0 link status changed, -1 link status not changed 896 */ 897 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete) 898 { 899 #define CHECK_INTERVAL 10 /* 10ms */ 900 #define MAX_REPEAT_TIME 100 /* 1s (100 * 10ms) in total */ 901 int rc = HINIC_OK; 902 struct rte_eth_link link; 903 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 904 unsigned int rep_cnt = MAX_REPEAT_TIME; 905 906 memset(&link, 0, sizeof(link)); 907 do { 908 /* Get link status information from hardware */ 909 rc = hinic_priv_get_dev_link_status(nic_dev, &link); 910 if (rc != HINIC_OK) { 911 link.link_speed = ETH_SPEED_NUM_NONE; 912 link.link_duplex = ETH_LINK_FULL_DUPLEX; 913 PMD_DRV_LOG(ERR, "Get link status failed"); 914 goto out; 915 } 916 917 if (!wait_to_complete || link.link_status) 918 break; 919 920 rte_delay_ms(CHECK_INTERVAL); 921 } while (rep_cnt--); 922 923 out: 924 rc = rte_eth_linkstatus_set(dev, &link); 925 return rc; 926 } 927 928 /** 929 * DPDK callback to bring the link UP. 930 * 931 * @param dev 932 * Pointer to Ethernet device structure. 933 * 934 * @return 935 * 0 on success, negative errno value on failure. 936 */ 937 static int hinic_dev_set_link_up(struct rte_eth_dev *dev) 938 { 939 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 940 int ret; 941 942 ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true); 943 if (ret) { 944 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d", 945 nic_dev->proc_dev_name, dev->data->port_id); 946 return ret; 947 } 948 949 /* link status follow phy port status, up will open pma */ 950 ret = hinic_set_port_enable(nic_dev->hwdev, true); 951 if (ret) 952 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d", 953 nic_dev->proc_dev_name, dev->data->port_id); 954 955 return ret; 956 } 957 958 /** 959 * DPDK callback to bring the link DOWN. 960 * 961 * @param dev 962 * Pointer to Ethernet device structure. 963 * 964 * @return 965 * 0 on success, negative errno value on failure. 966 */ 967 static int hinic_dev_set_link_down(struct rte_eth_dev *dev) 968 { 969 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 970 int ret; 971 972 ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false); 973 if (ret) { 974 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d", 975 nic_dev->proc_dev_name, dev->data->port_id); 976 return ret; 977 } 978 979 /* link status follow phy port status, up will close pma */ 980 ret = hinic_set_port_enable(nic_dev->hwdev, false); 981 if (ret) 982 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d", 983 nic_dev->proc_dev_name, dev->data->port_id); 984 985 return ret; 986 } 987 988 /** 989 * DPDK callback to start the device. 990 * 991 * @param dev 992 * Pointer to Ethernet device structure. 993 * 994 * @return 995 * 0 on success, negative errno value on failure. 996 */ 997 static int hinic_dev_start(struct rte_eth_dev *dev) 998 { 999 int rc; 1000 char *name; 1001 struct hinic_nic_dev *nic_dev; 1002 1003 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1004 name = dev->data->name; 1005 1006 /* reset rx and tx queue */ 1007 hinic_reset_rx_queue(dev); 1008 hinic_reset_tx_queue(dev); 1009 1010 /* get func rx buf size */ 1011 hinic_get_func_rx_buf_size(nic_dev); 1012 1013 /* init txq and rxq context */ 1014 rc = hinic_init_qp_ctxts(nic_dev->hwdev); 1015 if (rc) { 1016 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name: %s", 1017 name); 1018 goto init_qp_fail; 1019 } 1020 1021 /* rss template */ 1022 rc = hinic_config_mq_mode(dev, TRUE); 1023 if (rc) { 1024 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s", 1025 name); 1026 goto cfg_mq_mode_fail; 1027 } 1028 1029 /* set default mtu */ 1030 rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size); 1031 if (rc) { 1032 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s", 1033 nic_dev->mtu_size, name); 1034 goto set_mtu_fail; 1035 } 1036 1037 /* configure rss rx_mode and other rx or tx default feature */ 1038 rc = hinic_rxtx_configure(dev); 1039 if (rc) { 1040 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s", 1041 name); 1042 goto cfg_rxtx_fail; 1043 } 1044 1045 /* reactive pf status, so that uP report asyn event */ 1046 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG); 1047 1048 /* open virtual port and ready to start packet receiving */ 1049 rc = hinic_set_vport_enable(nic_dev->hwdev, true); 1050 if (rc) { 1051 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name); 1052 goto en_vport_fail; 1053 } 1054 1055 /* open physical port and start packet receiving */ 1056 rc = hinic_set_port_enable(nic_dev->hwdev, true); 1057 if (rc) { 1058 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s", 1059 name); 1060 goto en_port_fail; 1061 } 1062 1063 /* update eth_dev link status */ 1064 if (dev->data->dev_conf.intr_conf.lsc != 0) 1065 (void)hinic_link_update(dev, 0); 1066 1067 rte_bit_relaxed_set32(HINIC_DEV_START, &nic_dev->dev_status); 1068 1069 return 0; 1070 1071 en_port_fail: 1072 (void)hinic_set_vport_enable(nic_dev->hwdev, false); 1073 1074 en_vport_fail: 1075 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT); 1076 1077 /* Flush tx && rx chip resources in case of set vport fake fail */ 1078 (void)hinic_flush_qp_res(nic_dev->hwdev); 1079 rte_delay_ms(100); 1080 1081 hinic_remove_rxtx_configure(dev); 1082 1083 cfg_rxtx_fail: 1084 set_mtu_fail: 1085 cfg_mq_mode_fail: 1086 hinic_free_qp_ctxts(nic_dev->hwdev); 1087 1088 init_qp_fail: 1089 hinic_free_all_rx_mbuf(dev); 1090 hinic_free_all_tx_mbuf(dev); 1091 1092 return rc; 1093 } 1094 1095 /** 1096 * DPDK callback to release the receive queue. 1097 * 1098 * @param queue 1099 * Generic receive queue pointer. 1100 */ 1101 static void hinic_rx_queue_release(void *queue) 1102 { 1103 struct hinic_rxq *rxq = queue; 1104 struct hinic_nic_dev *nic_dev; 1105 1106 if (!rxq) { 1107 PMD_DRV_LOG(WARNING, "Rxq is null when release"); 1108 return; 1109 } 1110 nic_dev = rxq->nic_dev; 1111 1112 /* free rxq_pkt mbuf */ 1113 hinic_free_all_rx_mbufs(rxq); 1114 1115 /* free rxq_cqe, rxq_info */ 1116 hinic_free_rx_resources(rxq); 1117 1118 /* free root rq wq */ 1119 hinic_destroy_rq(nic_dev->hwdev, rxq->q_id); 1120 1121 nic_dev->rxqs[rxq->q_id] = NULL; 1122 1123 /* free rxq */ 1124 rte_free(rxq); 1125 } 1126 1127 /** 1128 * DPDK callback to release the transmit queue. 1129 * 1130 * @param queue 1131 * Generic transmit queue pointer. 1132 */ 1133 static void hinic_tx_queue_release(void *queue) 1134 { 1135 struct hinic_txq *txq = queue; 1136 struct hinic_nic_dev *nic_dev; 1137 1138 if (!txq) { 1139 PMD_DRV_LOG(WARNING, "Txq is null when release"); 1140 return; 1141 } 1142 nic_dev = txq->nic_dev; 1143 1144 /* free txq_pkt mbuf */ 1145 hinic_free_all_tx_mbufs(txq); 1146 1147 /* free txq_info */ 1148 hinic_free_tx_resources(txq); 1149 1150 /* free root sq wq */ 1151 hinic_destroy_sq(nic_dev->hwdev, txq->q_id); 1152 nic_dev->txqs[txq->q_id] = NULL; 1153 1154 /* free txq */ 1155 rte_free(txq); 1156 } 1157 1158 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev) 1159 { 1160 u16 q_id; 1161 1162 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) 1163 hinic_destroy_rq(nic_dev->hwdev, q_id); 1164 } 1165 1166 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev) 1167 { 1168 u16 q_id; 1169 1170 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) 1171 hinic_destroy_sq(nic_dev->hwdev, q_id); 1172 } 1173 1174 /** 1175 * DPDK callback to stop the device. 1176 * 1177 * @param dev 1178 * Pointer to Ethernet device structure. 1179 */ 1180 static void hinic_dev_stop(struct rte_eth_dev *dev) 1181 { 1182 int rc; 1183 char *name; 1184 uint16_t port_id; 1185 struct hinic_nic_dev *nic_dev; 1186 struct rte_eth_link link; 1187 1188 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1189 name = dev->data->name; 1190 port_id = dev->data->port_id; 1191 1192 if (!rte_bit_relaxed_test_and_clear32(HINIC_DEV_START, 1193 &nic_dev->dev_status)) { 1194 PMD_DRV_LOG(INFO, "Device %s already stopped", name); 1195 return; 1196 } 1197 1198 /* just stop phy port and vport */ 1199 rc = hinic_set_port_enable(nic_dev->hwdev, false); 1200 if (rc) 1201 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d", 1202 rc, name, port_id); 1203 1204 rc = hinic_set_vport_enable(nic_dev->hwdev, false); 1205 if (rc) 1206 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name: %s, port_id: %d", 1207 rc, name, port_id); 1208 1209 /* Clear recorded link status */ 1210 memset(&link, 0, sizeof(link)); 1211 (void)rte_eth_linkstatus_set(dev, &link); 1212 1213 /* flush pending io request */ 1214 rc = hinic_rx_tx_flush(nic_dev->hwdev); 1215 if (rc) 1216 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d", 1217 rc, name, port_id); 1218 1219 /* clean rss table and rx_mode */ 1220 hinic_remove_rxtx_configure(dev); 1221 1222 /* clean root context */ 1223 hinic_free_qp_ctxts(nic_dev->hwdev); 1224 1225 hinic_destroy_fdir_filter(dev); 1226 1227 /* free mbuf */ 1228 hinic_free_all_rx_mbuf(dev); 1229 hinic_free_all_tx_mbuf(dev); 1230 } 1231 1232 static void hinic_disable_interrupt(struct rte_eth_dev *dev) 1233 { 1234 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1235 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1236 int ret, retries = 0; 1237 1238 rte_bit_relaxed_clear32(HINIC_DEV_INTR_EN, &nic_dev->dev_status); 1239 1240 /* disable msix interrupt in hardware */ 1241 hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE); 1242 1243 /* disable rte interrupt */ 1244 ret = rte_intr_disable(&pci_dev->intr_handle); 1245 if (ret) 1246 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret); 1247 1248 do { 1249 ret = 1250 rte_intr_callback_unregister(&pci_dev->intr_handle, 1251 hinic_dev_interrupt_handler, dev); 1252 if (ret >= 0) { 1253 break; 1254 } else if (ret == -EAGAIN) { 1255 rte_delay_ms(100); 1256 retries++; 1257 } else { 1258 PMD_DRV_LOG(ERR, "intr callback unregister failed: %d", 1259 ret); 1260 break; 1261 } 1262 } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES); 1263 1264 if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES) 1265 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries", 1266 retries); 1267 } 1268 1269 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable) 1270 { 1271 u32 rx_mode_ctrl = nic_dev->rx_mode_status; 1272 1273 if (enable) 1274 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC; 1275 else 1276 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC); 1277 1278 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl); 1279 } 1280 1281 /** 1282 * DPDK callback to get device statistics. 1283 * 1284 * @param dev 1285 * Pointer to Ethernet device structure. 1286 * @param stats 1287 * Stats structure output buffer. 1288 * 1289 * @return 1290 * 0 on success and stats is filled, 1291 * negative error value otherwise. 1292 */ 1293 static int 1294 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1295 { 1296 int i, err, q_num; 1297 u64 rx_discards_pmd = 0; 1298 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1299 struct hinic_vport_stats vport_stats; 1300 struct hinic_rxq *rxq = NULL; 1301 struct hinic_rxq_stats rxq_stats; 1302 struct hinic_txq *txq = NULL; 1303 struct hinic_txq_stats txq_stats; 1304 1305 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats); 1306 if (err) { 1307 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s", 1308 nic_dev->proc_dev_name); 1309 return err; 1310 } 1311 1312 /* rx queue stats */ 1313 q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ? 1314 nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS; 1315 for (i = 0; i < q_num; i++) { 1316 rxq = nic_dev->rxqs[i]; 1317 hinic_rxq_get_stats(rxq, &rxq_stats); 1318 stats->q_ipackets[i] = rxq_stats.packets; 1319 stats->q_ibytes[i] = rxq_stats.bytes; 1320 stats->q_errors[i] = rxq_stats.rx_discards; 1321 1322 stats->ierrors += rxq_stats.errors; 1323 rx_discards_pmd += rxq_stats.rx_discards; 1324 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf; 1325 } 1326 1327 /* tx queue stats */ 1328 q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ? 1329 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS; 1330 for (i = 0; i < q_num; i++) { 1331 txq = nic_dev->txqs[i]; 1332 hinic_txq_get_stats(txq, &txq_stats); 1333 stats->q_opackets[i] = txq_stats.packets; 1334 stats->q_obytes[i] = txq_stats.bytes; 1335 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs); 1336 } 1337 1338 /* vport stats */ 1339 stats->oerrors += vport_stats.tx_discard_vport; 1340 1341 stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd; 1342 1343 stats->ipackets = (vport_stats.rx_unicast_pkts_vport + 1344 vport_stats.rx_multicast_pkts_vport + 1345 vport_stats.rx_broadcast_pkts_vport - 1346 rx_discards_pmd); 1347 1348 stats->opackets = (vport_stats.tx_unicast_pkts_vport + 1349 vport_stats.tx_multicast_pkts_vport + 1350 vport_stats.tx_broadcast_pkts_vport); 1351 1352 stats->ibytes = (vport_stats.rx_unicast_bytes_vport + 1353 vport_stats.rx_multicast_bytes_vport + 1354 vport_stats.rx_broadcast_bytes_vport); 1355 1356 stats->obytes = (vport_stats.tx_unicast_bytes_vport + 1357 vport_stats.tx_multicast_bytes_vport + 1358 vport_stats.tx_broadcast_bytes_vport); 1359 return 0; 1360 } 1361 1362 /** 1363 * DPDK callback to clear device statistics. 1364 * 1365 * @param dev 1366 * Pointer to Ethernet device structure. 1367 */ 1368 static int hinic_dev_stats_reset(struct rte_eth_dev *dev) 1369 { 1370 int qid; 1371 struct hinic_rxq *rxq = NULL; 1372 struct hinic_txq *txq = NULL; 1373 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1374 int ret; 1375 1376 ret = hinic_clear_vport_stats(nic_dev->hwdev); 1377 if (ret != 0) 1378 return ret; 1379 1380 for (qid = 0; qid < nic_dev->num_rq; qid++) { 1381 rxq = nic_dev->rxqs[qid]; 1382 hinic_rxq_stats_reset(rxq); 1383 } 1384 1385 for (qid = 0; qid < nic_dev->num_sq; qid++) { 1386 txq = nic_dev->txqs[qid]; 1387 hinic_txq_stats_reset(txq); 1388 } 1389 1390 return 0; 1391 } 1392 1393 /** 1394 * DPDK callback to clear device extended statistics. 1395 * 1396 * @param dev 1397 * Pointer to Ethernet device structure. 1398 */ 1399 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev) 1400 { 1401 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1402 int ret; 1403 1404 ret = hinic_dev_stats_reset(dev); 1405 if (ret != 0) 1406 return ret; 1407 1408 if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) { 1409 ret = hinic_clear_phy_port_stats(nic_dev->hwdev); 1410 if (ret != 0) 1411 return ret; 1412 } 1413 1414 return 0; 1415 } 1416 1417 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr) 1418 { 1419 uint64_t random_value; 1420 1421 /* Set Organizationally Unique Identifier (OUI) prefix */ 1422 mac_addr->addr_bytes[0] = 0x00; 1423 mac_addr->addr_bytes[1] = 0x09; 1424 mac_addr->addr_bytes[2] = 0xC0; 1425 /* Force indication of locally assigned MAC address. */ 1426 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR; 1427 /* Generate the last 3 bytes of the MAC address with a random number. */ 1428 random_value = rte_rand(); 1429 memcpy(&mac_addr->addr_bytes[3], &random_value, 3); 1430 } 1431 1432 /** 1433 * Init mac_vlan table in NIC. 1434 * 1435 * @param dev 1436 * Pointer to Ethernet device structure. 1437 * 1438 * @return 1439 * 0 on success and stats is filled, 1440 * negative error value otherwise. 1441 */ 1442 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev) 1443 { 1444 struct hinic_nic_dev *nic_dev = 1445 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); 1446 uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; 1447 u16 func_id = 0; 1448 int rc = 0; 1449 1450 rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes); 1451 if (rc) 1452 return rc; 1453 1454 rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes, 1455 ð_dev->data->mac_addrs[0]); 1456 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[0])) 1457 hinic_gen_random_mac_addr(ð_dev->data->mac_addrs[0]); 1458 1459 func_id = hinic_global_func_id(nic_dev->hwdev); 1460 rc = hinic_set_mac(nic_dev->hwdev, 1461 eth_dev->data->mac_addrs[0].addr_bytes, 1462 0, func_id); 1463 if (rc && rc != HINIC_PF_SET_VF_ALREADY) 1464 return rc; 1465 1466 rte_ether_addr_copy(ð_dev->data->mac_addrs[0], 1467 &nic_dev->default_addr); 1468 1469 return 0; 1470 } 1471 1472 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev) 1473 { 1474 u16 func_id; 1475 u32 i; 1476 1477 func_id = hinic_global_func_id(nic_dev->hwdev); 1478 1479 for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) { 1480 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i])) 1481 break; 1482 1483 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes, 1484 0, func_id); 1485 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr)); 1486 } 1487 } 1488 1489 /** 1490 * Deinit mac_vlan table in NIC. 1491 * 1492 * @param dev 1493 * Pointer to Ethernet device structure. 1494 * 1495 * @return 1496 * 0 on success and stats is filled, 1497 * negative error value otherwise. 1498 */ 1499 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev) 1500 { 1501 struct hinic_nic_dev *nic_dev = 1502 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); 1503 u16 func_id = 0; 1504 int rc; 1505 int i; 1506 1507 func_id = hinic_global_func_id(nic_dev->hwdev); 1508 1509 for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) { 1510 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[i])) 1511 continue; 1512 1513 rc = hinic_del_mac(nic_dev->hwdev, 1514 eth_dev->data->mac_addrs[i].addr_bytes, 1515 0, func_id); 1516 if (rc && rc != HINIC_PF_SET_VF_ALREADY) 1517 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s", 1518 eth_dev->data->name); 1519 1520 memset(ð_dev->data->mac_addrs[i], 0, 1521 sizeof(struct rte_ether_addr)); 1522 } 1523 1524 /* delete multicast mac addrs */ 1525 hinic_delete_mc_addr_list(nic_dev); 1526 } 1527 1528 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1529 { 1530 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1531 uint32_t frame_size; 1532 int ret = 0; 1533 1534 PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d", 1535 dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu)); 1536 1537 if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) { 1538 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d", 1539 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE); 1540 return -EINVAL; 1541 } 1542 1543 ret = hinic_set_port_mtu(nic_dev->hwdev, mtu); 1544 if (ret) { 1545 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret); 1546 return ret; 1547 } 1548 1549 /* update max frame size */ 1550 frame_size = HINIC_MTU_TO_PKTLEN(mtu); 1551 if (frame_size > RTE_ETHER_MAX_LEN) 1552 dev->data->dev_conf.rxmode.offloads |= 1553 DEV_RX_OFFLOAD_JUMBO_FRAME; 1554 else 1555 dev->data->dev_conf.rxmode.offloads &= 1556 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1557 1558 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1559 nic_dev->mtu_size = mtu; 1560 1561 return ret; 1562 } 1563 1564 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev, 1565 u16 vlan_id, bool on) 1566 { 1567 u32 vid_idx, vid_bit; 1568 1569 vid_idx = HINIC_VFTA_IDX(vlan_id); 1570 vid_bit = HINIC_VFTA_BIT(vlan_id); 1571 1572 if (on) 1573 nic_dev->vfta[vid_idx] |= vid_bit; 1574 else 1575 nic_dev->vfta[vid_idx] &= ~vid_bit; 1576 } 1577 1578 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev, 1579 uint16_t vlan_id) 1580 { 1581 u32 vid_idx, vid_bit; 1582 1583 vid_idx = HINIC_VFTA_IDX(vlan_id); 1584 vid_bit = HINIC_VFTA_BIT(vlan_id); 1585 1586 return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE; 1587 } 1588 1589 /** 1590 * DPDK callback to set vlan filter. 1591 * 1592 * @param dev 1593 * Pointer to Ethernet device structure. 1594 * @param vlan_id 1595 * vlan id is used to filter vlan packets 1596 * @param enable 1597 * enable disable or enable vlan filter function 1598 */ 1599 static int hinic_vlan_filter_set(struct rte_eth_dev *dev, 1600 uint16_t vlan_id, int enable) 1601 { 1602 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1603 int err = 0; 1604 u16 func_id; 1605 1606 if (vlan_id > RTE_ETHER_MAX_VLAN_ID) 1607 return -EINVAL; 1608 1609 func_id = hinic_global_func_id(nic_dev->hwdev); 1610 1611 if (enable) { 1612 /* If vlanid is already set, just return */ 1613 if (hinic_find_vlan_filter(nic_dev, vlan_id)) { 1614 PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s", 1615 vlan_id, nic_dev->proc_dev_name); 1616 return 0; 1617 } 1618 1619 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id, 1620 func_id, TRUE); 1621 } else { 1622 /* If vlanid can't be found, just return */ 1623 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) { 1624 PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s", 1625 vlan_id, nic_dev->proc_dev_name); 1626 return 0; 1627 } 1628 1629 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id, 1630 func_id, FALSE); 1631 } 1632 1633 if (err) { 1634 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d", 1635 enable ? "Add" : "Remove", func_id, vlan_id, err); 1636 return err; 1637 } 1638 1639 hinic_store_vlan_filter(nic_dev, vlan_id, enable); 1640 1641 PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s", 1642 enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name); 1643 return 0; 1644 } 1645 1646 /** 1647 * DPDK callback to enable or disable vlan offload. 1648 * 1649 * @param dev 1650 * Pointer to Ethernet device structure. 1651 * @param mask 1652 * Definitions used for VLAN setting 1653 */ 1654 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask) 1655 { 1656 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1657 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1658 bool on; 1659 int err; 1660 1661 /* Enable or disable VLAN filter */ 1662 if (mask & ETH_VLAN_FILTER_MASK) { 1663 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ? 1664 TRUE : FALSE; 1665 err = hinic_config_vlan_filter(nic_dev->hwdev, on); 1666 if (err == HINIC_MGMT_CMD_UNSUPPORTED) { 1667 PMD_DRV_LOG(WARNING, 1668 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d", 1669 nic_dev->proc_dev_name, dev->data->port_id); 1670 } else if (err) { 1671 PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d", 1672 on ? "enable" : "disable", 1673 nic_dev->proc_dev_name, 1674 dev->data->port_id, err); 1675 return err; 1676 } 1677 1678 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d", 1679 on ? "Enable" : "Disable", 1680 nic_dev->proc_dev_name, dev->data->port_id); 1681 } 1682 1683 /* Enable or disable VLAN stripping */ 1684 if (mask & ETH_VLAN_STRIP_MASK) { 1685 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ? 1686 TRUE : FALSE; 1687 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on); 1688 if (err) { 1689 PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d", 1690 on ? "enable" : "disable", 1691 nic_dev->proc_dev_name, 1692 dev->data->port_id, err); 1693 return err; 1694 } 1695 1696 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d", 1697 on ? "Enable" : "Disable", 1698 nic_dev->proc_dev_name, dev->data->port_id); 1699 } 1700 1701 if (mask & ETH_VLAN_EXTEND_MASK) { 1702 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d", 1703 nic_dev->proc_dev_name, dev->data->port_id); 1704 return -ENOTSUP; 1705 } 1706 1707 return 0; 1708 } 1709 1710 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev) 1711 { 1712 struct hinic_nic_dev *nic_dev = 1713 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); 1714 u16 func_id; 1715 int i; 1716 1717 func_id = hinic_global_func_id(nic_dev->hwdev); 1718 for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) { 1719 /* If can't find it, continue */ 1720 if (!hinic_find_vlan_filter(nic_dev, i)) 1721 continue; 1722 1723 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE); 1724 hinic_store_vlan_filter(nic_dev, i, false); 1725 } 1726 } 1727 1728 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev, 1729 bool enable) 1730 { 1731 u32 rx_mode_ctrl = nic_dev->rx_mode_status; 1732 1733 if (enable) 1734 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL; 1735 else 1736 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL); 1737 1738 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl); 1739 } 1740 1741 /** 1742 * DPDK callback to enable allmulticast mode. 1743 * 1744 * @param dev 1745 * Pointer to Ethernet device structure. 1746 * 1747 * @return 1748 * 0 on success, 1749 * negative error value otherwise. 1750 */ 1751 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev) 1752 { 1753 int ret = HINIC_OK; 1754 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1755 1756 ret = hinic_set_dev_allmulticast(nic_dev, true); 1757 if (ret) { 1758 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret); 1759 return ret; 1760 } 1761 1762 PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d", 1763 nic_dev->proc_dev_name, dev->data->port_id); 1764 return 0; 1765 } 1766 1767 /** 1768 * DPDK callback to disable allmulticast mode. 1769 * 1770 * @param dev 1771 * Pointer to Ethernet device structure. 1772 * 1773 * @return 1774 * 0 on success, 1775 * negative error value otherwise. 1776 */ 1777 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev) 1778 { 1779 int ret = HINIC_OK; 1780 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1781 1782 ret = hinic_set_dev_allmulticast(nic_dev, false); 1783 if (ret) { 1784 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret); 1785 return ret; 1786 } 1787 1788 PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d", 1789 nic_dev->proc_dev_name, dev->data->port_id); 1790 return 0; 1791 } 1792 1793 /** 1794 * DPDK callback to enable promiscuous mode. 1795 * 1796 * @param dev 1797 * Pointer to Ethernet device structure. 1798 * 1799 * @return 1800 * 0 on success, 1801 * negative error value otherwise. 1802 */ 1803 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev) 1804 { 1805 int rc = HINIC_OK; 1806 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1807 1808 PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d", 1809 nic_dev->proc_dev_name, dev->data->port_id, 1810 dev->data->promiscuous); 1811 1812 rc = hinic_set_dev_promiscuous(nic_dev, true); 1813 if (rc) 1814 PMD_DRV_LOG(ERR, "Enable promiscuous failed"); 1815 1816 return rc; 1817 } 1818 1819 /** 1820 * DPDK callback to disable promiscuous mode. 1821 * 1822 * @param dev 1823 * Pointer to Ethernet device structure. 1824 * 1825 * @return 1826 * 0 on success, 1827 * negative error value otherwise. 1828 */ 1829 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev) 1830 { 1831 int rc = HINIC_OK; 1832 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1833 1834 PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d", 1835 nic_dev->proc_dev_name, dev->data->port_id, 1836 dev->data->promiscuous); 1837 1838 rc = hinic_set_dev_promiscuous(nic_dev, false); 1839 if (rc) 1840 PMD_DRV_LOG(ERR, "Disable promiscuous failed"); 1841 1842 return rc; 1843 } 1844 1845 static int hinic_flow_ctrl_get(struct rte_eth_dev *dev, 1846 struct rte_eth_fc_conf *fc_conf) 1847 { 1848 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1849 struct nic_pause_config nic_pause; 1850 int err; 1851 1852 memset(&nic_pause, 0, sizeof(nic_pause)); 1853 1854 err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause); 1855 if (err) 1856 return err; 1857 1858 if (nic_dev->pause_set || !nic_pause.auto_neg) { 1859 nic_pause.rx_pause = nic_dev->nic_pause.rx_pause; 1860 nic_pause.tx_pause = nic_dev->nic_pause.tx_pause; 1861 } 1862 1863 fc_conf->autoneg = nic_pause.auto_neg; 1864 1865 if (nic_pause.tx_pause && nic_pause.rx_pause) 1866 fc_conf->mode = RTE_FC_FULL; 1867 else if (nic_pause.tx_pause) 1868 fc_conf->mode = RTE_FC_TX_PAUSE; 1869 else if (nic_pause.rx_pause) 1870 fc_conf->mode = RTE_FC_RX_PAUSE; 1871 else 1872 fc_conf->mode = RTE_FC_NONE; 1873 1874 return 0; 1875 } 1876 1877 static int hinic_flow_ctrl_set(struct rte_eth_dev *dev, 1878 struct rte_eth_fc_conf *fc_conf) 1879 { 1880 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1881 struct nic_pause_config nic_pause; 1882 int err; 1883 1884 nic_pause.auto_neg = fc_conf->autoneg; 1885 1886 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 1887 (fc_conf->mode & RTE_FC_TX_PAUSE)) 1888 nic_pause.tx_pause = true; 1889 else 1890 nic_pause.tx_pause = false; 1891 1892 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 1893 (fc_conf->mode & RTE_FC_RX_PAUSE)) 1894 nic_pause.rx_pause = true; 1895 else 1896 nic_pause.rx_pause = false; 1897 1898 err = hinic_set_pause_config(nic_dev->hwdev, nic_pause); 1899 if (err) 1900 return err; 1901 1902 nic_dev->pause_set = true; 1903 nic_dev->nic_pause.auto_neg = nic_pause.auto_neg; 1904 nic_dev->nic_pause.rx_pause = nic_pause.rx_pause; 1905 nic_dev->nic_pause.tx_pause = nic_pause.tx_pause; 1906 1907 PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n", 1908 nic_pause.tx_pause ? "on" : "off", 1909 nic_pause.rx_pause ? "on" : "off", 1910 nic_pause.auto_neg ? "on" : "off"); 1911 1912 return 0; 1913 } 1914 1915 /** 1916 * DPDK callback to update the RSS hash key and RSS hash type. 1917 * 1918 * @param dev 1919 * Pointer to Ethernet device structure. 1920 * @param rss_conf 1921 * RSS configuration data. 1922 * 1923 * @return 1924 * 0 on success, negative error value otherwise. 1925 */ 1926 static int hinic_rss_hash_update(struct rte_eth_dev *dev, 1927 struct rte_eth_rss_conf *rss_conf) 1928 { 1929 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1930 u8 tmpl_idx = nic_dev->rss_tmpl_idx; 1931 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0}; 1932 u8 prio_tc[HINIC_DCB_UP_MAX] = {0}; 1933 u64 rss_hf = rss_conf->rss_hf; 1934 struct nic_rss_type rss_type = {0}; 1935 int err = 0; 1936 1937 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) { 1938 PMD_DRV_LOG(WARNING, "RSS is not enabled"); 1939 return HINIC_OK; 1940 } 1941 1942 if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) { 1943 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d", 1944 rss_conf->rss_key_len); 1945 return HINIC_ERROR; 1946 } 1947 1948 if (rss_conf->rss_key) { 1949 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len); 1950 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx, 1951 hashkey); 1952 if (err) { 1953 PMD_DRV_LOG(ERR, "Set rss template table failed"); 1954 goto disable_rss; 1955 } 1956 } 1957 1958 rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0; 1959 rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0; 1960 rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0; 1961 rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0; 1962 rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0; 1963 rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0; 1964 rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0; 1965 rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0; 1966 1967 err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type); 1968 if (err) { 1969 PMD_DRV_LOG(ERR, "Set rss type table failed"); 1970 goto disable_rss; 1971 } 1972 1973 return 0; 1974 1975 disable_rss: 1976 memset(prio_tc, 0, sizeof(prio_tc)); 1977 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc); 1978 return err; 1979 } 1980 1981 /** 1982 * DPDK callback to get the RSS hash configuration. 1983 * 1984 * @param dev 1985 * Pointer to Ethernet device structure. 1986 * @param rss_conf 1987 * RSS configuration data. 1988 * 1989 * @return 1990 * 0 on success, negative error value otherwise. 1991 */ 1992 static int hinic_rss_conf_get(struct rte_eth_dev *dev, 1993 struct rte_eth_rss_conf *rss_conf) 1994 { 1995 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 1996 u8 tmpl_idx = nic_dev->rss_tmpl_idx; 1997 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0}; 1998 struct nic_rss_type rss_type = {0}; 1999 int err; 2000 2001 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) { 2002 PMD_DRV_LOG(WARNING, "RSS is not enabled"); 2003 return HINIC_ERROR; 2004 } 2005 2006 err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey); 2007 if (err) 2008 return err; 2009 2010 if (rss_conf->rss_key && 2011 rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) { 2012 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey)); 2013 rss_conf->rss_key_len = sizeof(hashkey); 2014 } 2015 2016 err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type); 2017 if (err) 2018 return err; 2019 2020 rss_conf->rss_hf = 0; 2021 rss_conf->rss_hf |= rss_type.ipv4 ? 2022 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0; 2023 rss_conf->rss_hf |= rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0; 2024 rss_conf->rss_hf |= rss_type.ipv6 ? 2025 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0; 2026 rss_conf->rss_hf |= rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0; 2027 rss_conf->rss_hf |= rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0; 2028 rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0; 2029 rss_conf->rss_hf |= rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0; 2030 rss_conf->rss_hf |= rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0; 2031 2032 return HINIC_OK; 2033 } 2034 2035 /** 2036 * DPDK callback to update the RSS redirection table. 2037 * 2038 * @param dev 2039 * Pointer to Ethernet device structure. 2040 * @param reta_conf 2041 * Pointer to RSS reta configuration data. 2042 * @param reta_size 2043 * Size of the RETA table. 2044 * 2045 * @return 2046 * 0 on success, negative error value otherwise. 2047 */ 2048 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev, 2049 struct rte_eth_rss_reta_entry64 *reta_conf, 2050 uint16_t reta_size) 2051 { 2052 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2053 u8 tmpl_idx = nic_dev->rss_tmpl_idx; 2054 u8 prio_tc[HINIC_DCB_UP_MAX] = {0}; 2055 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0}; 2056 int err = 0; 2057 u16 i = 0; 2058 u16 idx, shift; 2059 2060 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) 2061 return HINIC_OK; 2062 2063 if (reta_size != NIC_RSS_INDIR_SIZE) { 2064 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size); 2065 return HINIC_ERROR; 2066 } 2067 2068 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl); 2069 if (err) 2070 return err; 2071 2072 /* update rss indir_tbl */ 2073 for (i = 0; i < reta_size; i++) { 2074 idx = i / RTE_RETA_GROUP_SIZE; 2075 shift = i % RTE_RETA_GROUP_SIZE; 2076 2077 if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) { 2078 PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d " 2079 "exceeds the maximum rxq num: %d", i, 2080 reta_conf[idx].reta[shift], nic_dev->num_rq); 2081 return -EINVAL; 2082 } 2083 2084 if (reta_conf[idx].mask & (1ULL << shift)) 2085 indirtbl[i] = reta_conf[idx].reta[shift]; 2086 } 2087 2088 err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl); 2089 if (err) 2090 goto disable_rss; 2091 2092 nic_dev->rss_indir_flag = true; 2093 2094 return 0; 2095 2096 disable_rss: 2097 memset(prio_tc, 0, sizeof(prio_tc)); 2098 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc); 2099 2100 return HINIC_ERROR; 2101 } 2102 2103 /** 2104 * DPDK callback to get the RSS indirection table. 2105 * 2106 * @param dev 2107 * Pointer to Ethernet device structure. 2108 * @param reta_conf 2109 * Pointer to RSS reta configuration data. 2110 * @param reta_size 2111 * Size of the RETA table. 2112 * 2113 * @return 2114 * 0 on success, negative error value otherwise. 2115 */ 2116 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev, 2117 struct rte_eth_rss_reta_entry64 *reta_conf, 2118 uint16_t reta_size) 2119 { 2120 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2121 u8 tmpl_idx = nic_dev->rss_tmpl_idx; 2122 int err = 0; 2123 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0}; 2124 u16 idx, shift; 2125 u16 i = 0; 2126 2127 if (reta_size != NIC_RSS_INDIR_SIZE) { 2128 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size); 2129 return HINIC_ERROR; 2130 } 2131 2132 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl); 2133 if (err) { 2134 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d", 2135 err); 2136 return err; 2137 } 2138 2139 for (i = 0; i < reta_size; i++) { 2140 idx = i / RTE_RETA_GROUP_SIZE; 2141 shift = i % RTE_RETA_GROUP_SIZE; 2142 if (reta_conf[idx].mask & (1ULL << shift)) 2143 reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i]; 2144 } 2145 2146 return HINIC_OK; 2147 } 2148 2149 /** 2150 * DPDK callback to get extended device statistics. 2151 * 2152 * @param dev 2153 * Pointer to Ethernet device. 2154 * @param xstats 2155 * Pointer to rte extended stats table. 2156 * @param n 2157 * The size of the stats table. 2158 * 2159 * @return 2160 * Number of extended stats on success and stats is filled, 2161 * negative error value otherwise. 2162 */ 2163 static int hinic_dev_xstats_get(struct rte_eth_dev *dev, 2164 struct rte_eth_xstat *xstats, 2165 unsigned int n) 2166 { 2167 u16 qid = 0; 2168 u32 i; 2169 int err, count; 2170 struct hinic_nic_dev *nic_dev; 2171 struct hinic_phy_port_stats port_stats; 2172 struct hinic_vport_stats vport_stats; 2173 struct hinic_rxq *rxq = NULL; 2174 struct hinic_rxq_stats rxq_stats; 2175 struct hinic_txq *txq = NULL; 2176 struct hinic_txq_stats txq_stats; 2177 2178 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2179 count = hinic_xstats_calc_num(nic_dev); 2180 if ((int)n < count) 2181 return count; 2182 2183 count = 0; 2184 2185 /* Get stats from hinic_rxq_stats */ 2186 for (qid = 0; qid < nic_dev->num_rq; qid++) { 2187 rxq = nic_dev->rxqs[qid]; 2188 hinic_rxq_get_stats(rxq, &rxq_stats); 2189 2190 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) { 2191 xstats[count].value = 2192 *(uint64_t *)(((char *)&rxq_stats) + 2193 hinic_rxq_stats_strings[i].offset); 2194 xstats[count].id = count; 2195 count++; 2196 } 2197 } 2198 2199 /* Get stats from hinic_txq_stats */ 2200 for (qid = 0; qid < nic_dev->num_sq; qid++) { 2201 txq = nic_dev->txqs[qid]; 2202 hinic_txq_get_stats(txq, &txq_stats); 2203 2204 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) { 2205 xstats[count].value = 2206 *(uint64_t *)(((char *)&txq_stats) + 2207 hinic_txq_stats_strings[i].offset); 2208 xstats[count].id = count; 2209 count++; 2210 } 2211 } 2212 2213 /* Get stats from hinic_vport_stats */ 2214 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats); 2215 if (err) 2216 return err; 2217 2218 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) { 2219 xstats[count].value = 2220 *(uint64_t *)(((char *)&vport_stats) + 2221 hinic_vport_stats_strings[i].offset); 2222 xstats[count].id = count; 2223 count++; 2224 } 2225 2226 if (HINIC_IS_VF(nic_dev->hwdev)) 2227 return count; 2228 2229 /* Get stats from hinic_phy_port_stats */ 2230 err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats); 2231 if (err) 2232 return err; 2233 2234 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) { 2235 xstats[count].value = *(uint64_t *)(((char *)&port_stats) + 2236 hinic_phyport_stats_strings[i].offset); 2237 xstats[count].id = count; 2238 count++; 2239 } 2240 2241 return count; 2242 } 2243 2244 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 2245 struct rte_eth_rxq_info *qinfo) 2246 { 2247 struct hinic_rxq *rxq = dev->data->rx_queues[queue_id]; 2248 2249 qinfo->mp = rxq->mb_pool; 2250 qinfo->nb_desc = rxq->q_depth; 2251 } 2252 2253 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 2254 struct rte_eth_txq_info *qinfo) 2255 { 2256 struct hinic_txq *txq = dev->data->tx_queues[queue_id]; 2257 2258 qinfo->nb_desc = txq->q_depth; 2259 } 2260 2261 /** 2262 * DPDK callback to retrieve names of extended device statistics 2263 * 2264 * @param dev 2265 * Pointer to Ethernet device structure. 2266 * @param xstats_names 2267 * Buffer to insert names into. 2268 * 2269 * @return 2270 * Number of xstats names. 2271 */ 2272 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev, 2273 struct rte_eth_xstat_name *xstats_names, 2274 __rte_unused unsigned int limit) 2275 { 2276 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2277 int count = 0; 2278 u16 i = 0, q_num; 2279 2280 if (xstats_names == NULL) 2281 return hinic_xstats_calc_num(nic_dev); 2282 2283 /* get pmd rxq stats */ 2284 for (q_num = 0; q_num < nic_dev->num_rq; q_num++) { 2285 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) { 2286 snprintf(xstats_names[count].name, 2287 sizeof(xstats_names[count].name), 2288 "rxq%d_%s_pmd", 2289 q_num, hinic_rxq_stats_strings[i].name); 2290 count++; 2291 } 2292 } 2293 2294 /* get pmd txq stats */ 2295 for (q_num = 0; q_num < nic_dev->num_sq; q_num++) { 2296 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) { 2297 snprintf(xstats_names[count].name, 2298 sizeof(xstats_names[count].name), 2299 "txq%d_%s_pmd", 2300 q_num, hinic_txq_stats_strings[i].name); 2301 count++; 2302 } 2303 } 2304 2305 /* get vport stats */ 2306 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) { 2307 snprintf(xstats_names[count].name, 2308 sizeof(xstats_names[count].name), 2309 "%s", hinic_vport_stats_strings[i].name); 2310 count++; 2311 } 2312 2313 if (HINIC_IS_VF(nic_dev->hwdev)) 2314 return count; 2315 2316 /* get phy port stats */ 2317 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) { 2318 snprintf(xstats_names[count].name, 2319 sizeof(xstats_names[count].name), 2320 "%s", hinic_phyport_stats_strings[i].name); 2321 count++; 2322 } 2323 2324 return count; 2325 } 2326 2327 /** 2328 * DPDK callback to set mac address 2329 * 2330 * @param dev 2331 * Pointer to Ethernet device structure. 2332 * @param addr 2333 * Pointer to mac address 2334 * @return 2335 * 0 on success, negative error value otherwise. 2336 */ 2337 static int hinic_set_mac_addr(struct rte_eth_dev *dev, 2338 struct rte_ether_addr *addr) 2339 { 2340 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2341 u16 func_id; 2342 int err; 2343 2344 func_id = hinic_global_func_id(nic_dev->hwdev); 2345 err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes, 2346 addr->addr_bytes, 0, func_id); 2347 if (err) 2348 return err; 2349 2350 rte_ether_addr_copy(addr, &nic_dev->default_addr); 2351 2352 PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x", 2353 addr->addr_bytes[0], addr->addr_bytes[1], 2354 addr->addr_bytes[2], addr->addr_bytes[3], 2355 addr->addr_bytes[4], addr->addr_bytes[5]); 2356 2357 return 0; 2358 } 2359 2360 /** 2361 * DPDK callback to remove a MAC address. 2362 * 2363 * @param dev 2364 * Pointer to Ethernet device structure. 2365 * @param index 2366 * MAC address index, should less than 128. 2367 */ 2368 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2369 { 2370 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2371 u16 func_id; 2372 int ret; 2373 2374 if (index >= HINIC_MAX_UC_MAC_ADDRS) { 2375 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range", 2376 index); 2377 return; 2378 } 2379 2380 func_id = hinic_global_func_id(nic_dev->hwdev); 2381 ret = hinic_del_mac(nic_dev->hwdev, 2382 dev->data->mac_addrs[index].addr_bytes, 0, func_id); 2383 if (ret) 2384 return; 2385 2386 memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr)); 2387 } 2388 2389 /** 2390 * DPDK callback to add a MAC address. 2391 * 2392 * @param dev 2393 * Pointer to Ethernet device structure. 2394 * @param mac_addr 2395 * Pointer to MAC address 2396 * @param index 2397 * MAC address index, should less than 128. 2398 * @param vmdq 2399 * VMDq pool index(not used). 2400 * 2401 * @return 2402 * 0 on success, negative error value otherwise. 2403 */ 2404 static int hinic_mac_addr_add(struct rte_eth_dev *dev, 2405 struct rte_ether_addr *mac_addr, uint32_t index, 2406 __rte_unused uint32_t vmdq) 2407 { 2408 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2409 unsigned int i; 2410 u16 func_id; 2411 int ret; 2412 2413 if (index >= HINIC_MAX_UC_MAC_ADDRS) { 2414 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index); 2415 return -EINVAL; 2416 } 2417 2418 /* First, make sure this address isn't already configured. */ 2419 for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) { 2420 /* Skip this index, it's going to be reconfigured. */ 2421 if (i == index) 2422 continue; 2423 2424 if (memcmp(&dev->data->mac_addrs[i], 2425 mac_addr, sizeof(*mac_addr))) 2426 continue; 2427 2428 PMD_DRV_LOG(INFO, "MAC address already configured"); 2429 return -EADDRINUSE; 2430 } 2431 2432 func_id = hinic_global_func_id(nic_dev->hwdev); 2433 ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id); 2434 if (ret) 2435 return ret; 2436 2437 dev->data->mac_addrs[index] = *mac_addr; 2438 return 0; 2439 } 2440 2441 /** 2442 * DPDK callback to set multicast mac address 2443 * 2444 * @param dev 2445 * Pointer to Ethernet device structure. 2446 * @param mc_addr_set 2447 * Pointer to multicast mac address 2448 * @param nb_mc_addr 2449 * mc addr count 2450 * @return 2451 * 0 on success, negative error value otherwise. 2452 */ 2453 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev, 2454 struct rte_ether_addr *mc_addr_set, 2455 uint32_t nb_mc_addr) 2456 { 2457 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2458 u16 func_id; 2459 int ret; 2460 u32 i; 2461 2462 func_id = hinic_global_func_id(nic_dev->hwdev); 2463 2464 /* delete old multi_cast addrs firstly */ 2465 hinic_delete_mc_addr_list(nic_dev); 2466 2467 if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS) 2468 goto allmulti; 2469 2470 for (i = 0; i < nb_mc_addr; i++) { 2471 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes, 2472 0, func_id); 2473 /* if add mc addr failed, set all multi_cast */ 2474 if (ret) { 2475 hinic_delete_mc_addr_list(nic_dev); 2476 goto allmulti; 2477 } 2478 2479 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]); 2480 } 2481 2482 return 0; 2483 2484 allmulti: 2485 hinic_dev_allmulticast_enable(dev); 2486 2487 return 0; 2488 } 2489 2490 /** 2491 * DPDK callback to manage filter control operations 2492 * 2493 * @param dev 2494 * Pointer to Ethernet device structure. 2495 * @param filter_type 2496 * Filter type, which just supports generic type. 2497 * @param filter_op 2498 * Filter operation to perform. 2499 * @param arg 2500 * Pointer to operation-specific structure. 2501 * 2502 * @return 2503 * 0 on success, negative error value otherwise. 2504 */ 2505 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev, 2506 enum rte_filter_type filter_type, 2507 enum rte_filter_op filter_op, 2508 void *arg) 2509 { 2510 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2511 int func_id = hinic_global_func_id(nic_dev->hwdev); 2512 2513 switch (filter_type) { 2514 case RTE_ETH_FILTER_GENERIC: 2515 if (filter_op != RTE_ETH_FILTER_GET) 2516 return -EINVAL; 2517 *(const void **)arg = &hinic_flow_ops; 2518 break; 2519 default: 2520 PMD_DRV_LOG(INFO, "Filter type (%d) not supported", 2521 filter_type); 2522 return -EINVAL; 2523 } 2524 2525 PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x," 2526 "filter_op: 0x%x.", func_id, filter_type, filter_op); 2527 return 0; 2528 } 2529 2530 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev) 2531 { 2532 struct nic_pause_config pause_config = {0}; 2533 int err; 2534 2535 pause_config.auto_neg = 0; 2536 pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG; 2537 pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG; 2538 2539 err = hinic_set_pause_config(nic_dev->hwdev, pause_config); 2540 if (err) 2541 return err; 2542 2543 nic_dev->pause_set = true; 2544 nic_dev->nic_pause.auto_neg = pause_config.auto_neg; 2545 nic_dev->nic_pause.rx_pause = pause_config.rx_pause; 2546 nic_dev->nic_pause.tx_pause = pause_config.tx_pause; 2547 2548 return 0; 2549 } 2550 2551 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev) 2552 { 2553 u8 up_tc[HINIC_DCB_UP_MAX] = {0}; 2554 u8 up_pgid[HINIC_DCB_UP_MAX] = {0}; 2555 u8 up_bw[HINIC_DCB_UP_MAX] = {0}; 2556 u8 pg_bw[HINIC_DCB_UP_MAX] = {0}; 2557 u8 up_strict[HINIC_DCB_UP_MAX] = {0}; 2558 int i = 0; 2559 2560 pg_bw[0] = 100; 2561 for (i = 0; i < HINIC_DCB_UP_MAX; i++) 2562 up_bw[i] = 100; 2563 2564 return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw, 2565 up_pgid, up_bw, up_strict); 2566 } 2567 2568 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev) 2569 { 2570 u8 cos_id = 0; 2571 int err; 2572 2573 if (!HINIC_IS_VF(nic_dev->hwdev)) { 2574 nic_dev->default_cos = 2575 (hinic_global_func_id(nic_dev->hwdev) + 2576 DEFAULT_BASE_COS) % NR_MAX_COS; 2577 } else { 2578 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id); 2579 if (err) { 2580 PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d", 2581 err); 2582 return HINIC_ERROR; 2583 } 2584 2585 nic_dev->default_cos = cos_id; 2586 } 2587 2588 return 0; 2589 } 2590 2591 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev) 2592 { 2593 int err; 2594 2595 err = hinic_init_default_cos(nic_dev); 2596 if (err) 2597 return err; 2598 2599 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF) 2600 return 0; 2601 2602 /* Restore DCB configure to default status */ 2603 err = hinic_set_default_dcb_feature(nic_dev); 2604 if (err) 2605 return err; 2606 2607 /* Set pause enable, and up will disable pfc. */ 2608 err = hinic_set_default_pause_feature(nic_dev); 2609 if (err) 2610 return err; 2611 2612 err = hinic_reset_port_link_cfg(nic_dev->hwdev); 2613 if (err) 2614 return err; 2615 2616 err = hinic_set_link_status_follow(nic_dev->hwdev, 2617 HINIC_LINK_FOLLOW_PORT); 2618 if (err == HINIC_MGMT_CMD_UNSUPPORTED) 2619 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status"); 2620 else if (err) 2621 return err; 2622 2623 return hinic_set_anti_attack(nic_dev->hwdev, true); 2624 } 2625 2626 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev) 2627 { 2628 struct hinic_board_info info = { 0 }; 2629 int rc; 2630 2631 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF) 2632 return 0; 2633 2634 rc = hinic_get_board_info(nic_dev->hwdev, &info); 2635 if (rc) 2636 return rc; 2637 2638 return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK : 2639 HINIC_ERROR); 2640 } 2641 2642 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev) 2643 { 2644 nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name); 2645 if (nic_dev->cpy_mpool == NULL) { 2646 nic_dev->cpy_mpool = 2647 rte_pktmbuf_pool_create(nic_dev->proc_dev_name, 2648 HINIC_COPY_MEMPOOL_DEPTH, 2649 0, 0, 2650 HINIC_COPY_MBUF_SIZE, 2651 rte_socket_id()); 2652 if (!nic_dev->cpy_mpool) { 2653 PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s", 2654 rte_errno, nic_dev->proc_dev_name); 2655 return -ENOMEM; 2656 } 2657 } 2658 2659 return 0; 2660 } 2661 2662 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev) 2663 { 2664 if (nic_dev->cpy_mpool != NULL) 2665 rte_mempool_free(nic_dev->cpy_mpool); 2666 } 2667 2668 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev) 2669 { 2670 u32 txq_size; 2671 u32 rxq_size; 2672 2673 /* allocate software txq array */ 2674 txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs); 2675 nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL); 2676 if (!nic_dev->txqs) { 2677 PMD_DRV_LOG(ERR, "Allocate txqs failed"); 2678 return -ENOMEM; 2679 } 2680 2681 /* allocate software rxq array */ 2682 rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs); 2683 nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL); 2684 if (!nic_dev->rxqs) { 2685 /* free txqs */ 2686 kfree(nic_dev->txqs); 2687 nic_dev->txqs = NULL; 2688 2689 PMD_DRV_LOG(ERR, "Allocate rxqs failed"); 2690 return -ENOMEM; 2691 } 2692 2693 return HINIC_OK; 2694 } 2695 2696 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev) 2697 { 2698 kfree(nic_dev->txqs); 2699 nic_dev->txqs = NULL; 2700 2701 kfree(nic_dev->rxqs); 2702 nic_dev->rxqs = NULL; 2703 } 2704 2705 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev) 2706 { 2707 struct hinic_nic_dev *nic_dev = 2708 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); 2709 int rc; 2710 2711 nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev), 2712 RTE_CACHE_LINE_SIZE); 2713 if (!nic_dev->hwdev) { 2714 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s", 2715 eth_dev->data->name); 2716 return -ENOMEM; 2717 } 2718 nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev); 2719 2720 /* init osdep*/ 2721 rc = hinic_osdep_init(nic_dev->hwdev); 2722 if (rc) { 2723 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s", 2724 eth_dev->data->name); 2725 goto init_osdep_fail; 2726 } 2727 2728 /* init_hwif */ 2729 rc = hinic_hwif_res_init(nic_dev->hwdev); 2730 if (rc) { 2731 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s", 2732 eth_dev->data->name); 2733 goto init_hwif_fail; 2734 } 2735 2736 /* init_cfg_mgmt */ 2737 rc = init_cfg_mgmt(nic_dev->hwdev); 2738 if (rc) { 2739 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s", 2740 eth_dev->data->name); 2741 goto init_cfgmgnt_fail; 2742 } 2743 2744 /* init_aeqs */ 2745 rc = hinic_comm_aeqs_init(nic_dev->hwdev); 2746 if (rc) { 2747 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s", 2748 eth_dev->data->name); 2749 goto init_aeqs_fail; 2750 } 2751 2752 /* init_pf_to_mgnt */ 2753 rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev); 2754 if (rc) { 2755 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s", 2756 eth_dev->data->name); 2757 goto init_pf_to_mgmt_fail; 2758 } 2759 2760 /* init mailbox */ 2761 rc = hinic_comm_func_to_func_init(nic_dev->hwdev); 2762 if (rc) { 2763 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s", 2764 eth_dev->data->name); 2765 goto init_func_to_func_fail; 2766 } 2767 2768 rc = hinic_card_workmode_check(nic_dev); 2769 if (rc) { 2770 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s", 2771 eth_dev->data->name); 2772 goto workmode_check_fail; 2773 } 2774 2775 /* do l2nic reset to make chip clear */ 2776 rc = hinic_l2nic_reset(nic_dev->hwdev); 2777 if (rc) { 2778 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s", 2779 eth_dev->data->name); 2780 goto l2nic_reset_fail; 2781 } 2782 2783 /* init dma and aeq msix attribute table */ 2784 (void)hinic_init_attr_table(nic_dev->hwdev); 2785 2786 /* init_cmdqs */ 2787 rc = hinic_comm_cmdqs_init(nic_dev->hwdev); 2788 if (rc) { 2789 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s", 2790 eth_dev->data->name); 2791 goto init_cmdq_fail; 2792 } 2793 2794 /* set hardware state active */ 2795 rc = hinic_activate_hwdev_state(nic_dev->hwdev); 2796 if (rc) { 2797 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s", 2798 eth_dev->data->name); 2799 goto init_resources_state_fail; 2800 } 2801 2802 /* init_capability */ 2803 rc = hinic_init_capability(nic_dev->hwdev); 2804 if (rc) { 2805 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s", 2806 eth_dev->data->name); 2807 goto init_cap_fail; 2808 } 2809 2810 /* get nic capability */ 2811 if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap)) { 2812 PMD_DRV_LOG(ERR, "Hw doesn't support nic, dev_name: %s", 2813 eth_dev->data->name); 2814 rc = -EINVAL; 2815 goto nic_check_fail; 2816 } 2817 2818 /* init root cla and function table */ 2819 rc = hinic_init_nicio(nic_dev->hwdev); 2820 if (rc) { 2821 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s", 2822 eth_dev->data->name); 2823 goto init_nicio_fail; 2824 } 2825 2826 /* init_software_txrxq */ 2827 rc = hinic_init_sw_rxtxqs(nic_dev); 2828 if (rc) { 2829 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s", 2830 eth_dev->data->name); 2831 goto init_sw_rxtxqs_fail; 2832 } 2833 2834 rc = hinic_copy_mempool_init(nic_dev); 2835 if (rc) { 2836 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s", 2837 eth_dev->data->name); 2838 goto init_mpool_fail; 2839 } 2840 2841 /* set hardware feature to default status */ 2842 rc = hinic_set_default_hw_feature(nic_dev); 2843 if (rc) { 2844 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s", 2845 eth_dev->data->name); 2846 goto set_default_hw_feature_fail; 2847 } 2848 2849 return 0; 2850 2851 set_default_hw_feature_fail: 2852 hinic_copy_mempool_uninit(nic_dev); 2853 2854 init_mpool_fail: 2855 hinic_deinit_sw_rxtxqs(nic_dev); 2856 2857 init_sw_rxtxqs_fail: 2858 hinic_deinit_nicio(nic_dev->hwdev); 2859 2860 nic_check_fail: 2861 init_nicio_fail: 2862 init_cap_fail: 2863 hinic_deactivate_hwdev_state(nic_dev->hwdev); 2864 2865 init_resources_state_fail: 2866 hinic_comm_cmdqs_free(nic_dev->hwdev); 2867 2868 init_cmdq_fail: 2869 l2nic_reset_fail: 2870 workmode_check_fail: 2871 hinic_comm_func_to_func_free(nic_dev->hwdev); 2872 2873 init_func_to_func_fail: 2874 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev); 2875 2876 init_pf_to_mgmt_fail: 2877 hinic_comm_aeqs_free(nic_dev->hwdev); 2878 2879 init_aeqs_fail: 2880 free_cfg_mgmt(nic_dev->hwdev); 2881 2882 init_cfgmgnt_fail: 2883 hinic_hwif_res_free(nic_dev->hwdev); 2884 2885 init_hwif_fail: 2886 hinic_osdep_deinit(nic_dev->hwdev); 2887 2888 init_osdep_fail: 2889 rte_free(nic_dev->hwdev); 2890 nic_dev->hwdev = NULL; 2891 2892 return rc; 2893 } 2894 2895 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev) 2896 { 2897 struct hinic_nic_dev *nic_dev = 2898 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); 2899 2900 (void)hinic_set_link_status_follow(nic_dev->hwdev, 2901 HINIC_LINK_FOLLOW_DEFAULT); 2902 hinic_copy_mempool_uninit(nic_dev); 2903 hinic_deinit_sw_rxtxqs(nic_dev); 2904 hinic_deinit_nicio(nic_dev->hwdev); 2905 hinic_deactivate_hwdev_state(nic_dev->hwdev); 2906 hinic_comm_cmdqs_free(nic_dev->hwdev); 2907 hinic_comm_func_to_func_free(nic_dev->hwdev); 2908 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev); 2909 hinic_comm_aeqs_free(nic_dev->hwdev); 2910 free_cfg_mgmt(nic_dev->hwdev); 2911 hinic_hwif_res_free(nic_dev->hwdev); 2912 hinic_osdep_deinit(nic_dev->hwdev); 2913 rte_free(nic_dev->hwdev); 2914 nic_dev->hwdev = NULL; 2915 } 2916 2917 /** 2918 * DPDK callback to close the device. 2919 * 2920 * @param dev 2921 * Pointer to Ethernet device structure. 2922 */ 2923 static void hinic_dev_close(struct rte_eth_dev *dev) 2924 { 2925 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 2926 2927 if (rte_bit_relaxed_test_and_set32(HINIC_DEV_CLOSE, 2928 &nic_dev->dev_status)) { 2929 PMD_DRV_LOG(WARNING, "Device %s already closed", 2930 dev->data->name); 2931 return; 2932 } 2933 2934 /* stop device first */ 2935 hinic_dev_stop(dev); 2936 2937 /* rx_cqe, rx_info */ 2938 hinic_free_all_rx_resources(dev); 2939 2940 /* tx_info */ 2941 hinic_free_all_tx_resources(dev); 2942 2943 /* free wq, pi_dma_addr */ 2944 hinic_free_all_rq(nic_dev); 2945 2946 /* free wq, db_addr */ 2947 hinic_free_all_sq(nic_dev); 2948 2949 /* deinit mac vlan tbl */ 2950 hinic_deinit_mac_addr(dev); 2951 hinic_remove_all_vlanid(dev); 2952 2953 /* disable hardware and uio interrupt */ 2954 hinic_disable_interrupt(dev); 2955 2956 /* deinit nic hardware device */ 2957 hinic_nic_dev_destroy(dev); 2958 } 2959 2960 static const struct eth_dev_ops hinic_pmd_ops = { 2961 .dev_configure = hinic_dev_configure, 2962 .dev_infos_get = hinic_dev_infos_get, 2963 .fw_version_get = hinic_fw_version_get, 2964 .rx_queue_setup = hinic_rx_queue_setup, 2965 .tx_queue_setup = hinic_tx_queue_setup, 2966 .dev_start = hinic_dev_start, 2967 .dev_set_link_up = hinic_dev_set_link_up, 2968 .dev_set_link_down = hinic_dev_set_link_down, 2969 .link_update = hinic_link_update, 2970 .rx_queue_release = hinic_rx_queue_release, 2971 .tx_queue_release = hinic_tx_queue_release, 2972 .dev_stop = hinic_dev_stop, 2973 .dev_close = hinic_dev_close, 2974 .mtu_set = hinic_dev_set_mtu, 2975 .vlan_filter_set = hinic_vlan_filter_set, 2976 .vlan_offload_set = hinic_vlan_offload_set, 2977 .allmulticast_enable = hinic_dev_allmulticast_enable, 2978 .allmulticast_disable = hinic_dev_allmulticast_disable, 2979 .promiscuous_enable = hinic_dev_promiscuous_enable, 2980 .promiscuous_disable = hinic_dev_promiscuous_disable, 2981 .flow_ctrl_get = hinic_flow_ctrl_get, 2982 .flow_ctrl_set = hinic_flow_ctrl_set, 2983 .rss_hash_update = hinic_rss_hash_update, 2984 .rss_hash_conf_get = hinic_rss_conf_get, 2985 .reta_update = hinic_rss_indirtbl_update, 2986 .reta_query = hinic_rss_indirtbl_query, 2987 .stats_get = hinic_dev_stats_get, 2988 .stats_reset = hinic_dev_stats_reset, 2989 .xstats_get = hinic_dev_xstats_get, 2990 .xstats_reset = hinic_dev_xstats_reset, 2991 .xstats_get_names = hinic_dev_xstats_get_names, 2992 .rxq_info_get = hinic_rxq_info_get, 2993 .txq_info_get = hinic_txq_info_get, 2994 .mac_addr_set = hinic_set_mac_addr, 2995 .mac_addr_remove = hinic_mac_addr_remove, 2996 .mac_addr_add = hinic_mac_addr_add, 2997 .set_mc_addr_list = hinic_set_mc_addr_list, 2998 .filter_ctrl = hinic_dev_filter_ctrl, 2999 }; 3000 3001 static const struct eth_dev_ops hinic_pmd_vf_ops = { 3002 .dev_configure = hinic_dev_configure, 3003 .dev_infos_get = hinic_dev_infos_get, 3004 .fw_version_get = hinic_fw_version_get, 3005 .rx_queue_setup = hinic_rx_queue_setup, 3006 .tx_queue_setup = hinic_tx_queue_setup, 3007 .dev_start = hinic_dev_start, 3008 .link_update = hinic_link_update, 3009 .rx_queue_release = hinic_rx_queue_release, 3010 .tx_queue_release = hinic_tx_queue_release, 3011 .dev_stop = hinic_dev_stop, 3012 .dev_close = hinic_dev_close, 3013 .mtu_set = hinic_dev_set_mtu, 3014 .vlan_filter_set = hinic_vlan_filter_set, 3015 .vlan_offload_set = hinic_vlan_offload_set, 3016 .allmulticast_enable = hinic_dev_allmulticast_enable, 3017 .allmulticast_disable = hinic_dev_allmulticast_disable, 3018 .rss_hash_update = hinic_rss_hash_update, 3019 .rss_hash_conf_get = hinic_rss_conf_get, 3020 .reta_update = hinic_rss_indirtbl_update, 3021 .reta_query = hinic_rss_indirtbl_query, 3022 .stats_get = hinic_dev_stats_get, 3023 .stats_reset = hinic_dev_stats_reset, 3024 .xstats_get = hinic_dev_xstats_get, 3025 .xstats_reset = hinic_dev_xstats_reset, 3026 .xstats_get_names = hinic_dev_xstats_get_names, 3027 .rxq_info_get = hinic_rxq_info_get, 3028 .txq_info_get = hinic_txq_info_get, 3029 .mac_addr_set = hinic_set_mac_addr, 3030 .mac_addr_remove = hinic_mac_addr_remove, 3031 .mac_addr_add = hinic_mac_addr_add, 3032 .set_mc_addr_list = hinic_set_mc_addr_list, 3033 .filter_ctrl = hinic_dev_filter_ctrl, 3034 }; 3035 3036 static int hinic_func_init(struct rte_eth_dev *eth_dev) 3037 { 3038 struct rte_pci_device *pci_dev; 3039 struct rte_ether_addr *eth_addr; 3040 struct hinic_nic_dev *nic_dev; 3041 struct hinic_filter_info *filter_info; 3042 struct hinic_tcam_info *tcam_info; 3043 u32 mac_size; 3044 int rc; 3045 3046 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 3047 3048 /* EAL is SECONDARY and eth_dev is already created */ 3049 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 3050 PMD_DRV_LOG(INFO, "Initialize %s in secondary process", 3051 eth_dev->data->name); 3052 3053 return 0; 3054 } 3055 3056 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); 3057 memset(nic_dev, 0, sizeof(*nic_dev)); 3058 3059 snprintf(nic_dev->proc_dev_name, 3060 sizeof(nic_dev->proc_dev_name), 3061 "hinic-%.4x:%.2x:%.2x.%x", 3062 pci_dev->addr.domain, pci_dev->addr.bus, 3063 pci_dev->addr.devid, pci_dev->addr.function); 3064 3065 /* alloc mac_addrs */ 3066 mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr); 3067 eth_addr = rte_zmalloc("hinic_mac", mac_size, 0); 3068 if (!eth_addr) { 3069 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s", 3070 eth_dev->data->name); 3071 rc = -ENOMEM; 3072 goto eth_addr_fail; 3073 } 3074 eth_dev->data->mac_addrs = eth_addr; 3075 3076 mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr); 3077 nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0); 3078 if (!nic_dev->mc_list) { 3079 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s", 3080 eth_dev->data->name); 3081 rc = -ENOMEM; 3082 goto mc_addr_fail; 3083 } 3084 3085 /* 3086 * Pass the information to the rte_eth_dev_close() that it should also 3087 * release the private port resources. 3088 */ 3089 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; 3090 3091 /* create hardware nic_device */ 3092 rc = hinic_nic_dev_create(eth_dev); 3093 if (rc) { 3094 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s", 3095 eth_dev->data->name); 3096 goto create_nic_dev_fail; 3097 } 3098 3099 if (HINIC_IS_VF(nic_dev->hwdev)) 3100 eth_dev->dev_ops = &hinic_pmd_vf_ops; 3101 else 3102 eth_dev->dev_ops = &hinic_pmd_ops; 3103 3104 rc = hinic_init_mac_addr(eth_dev); 3105 if (rc) { 3106 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s", 3107 eth_dev->data->name); 3108 goto init_mac_fail; 3109 } 3110 3111 /* register callback func to eal lib */ 3112 rc = rte_intr_callback_register(&pci_dev->intr_handle, 3113 hinic_dev_interrupt_handler, 3114 (void *)eth_dev); 3115 if (rc) { 3116 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s", 3117 eth_dev->data->name); 3118 goto reg_intr_cb_fail; 3119 } 3120 3121 /* enable uio/vfio intr/eventfd mapping */ 3122 rc = rte_intr_enable(&pci_dev->intr_handle); 3123 if (rc) { 3124 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s", 3125 eth_dev->data->name); 3126 goto enable_intr_fail; 3127 } 3128 rte_bit_relaxed_set32(HINIC_DEV_INTR_EN, &nic_dev->dev_status); 3129 3130 /* initialize filter info */ 3131 filter_info = &nic_dev->filter; 3132 tcam_info = &nic_dev->tcam; 3133 memset(filter_info, 0, sizeof(struct hinic_filter_info)); 3134 memset(tcam_info, 0, sizeof(struct hinic_tcam_info)); 3135 /* initialize 5tuple filter list */ 3136 TAILQ_INIT(&filter_info->fivetuple_list); 3137 TAILQ_INIT(&tcam_info->tcam_list); 3138 TAILQ_INIT(&nic_dev->filter_ntuple_list); 3139 TAILQ_INIT(&nic_dev->filter_ethertype_list); 3140 TAILQ_INIT(&nic_dev->filter_fdir_rule_list); 3141 TAILQ_INIT(&nic_dev->hinic_flow_list); 3142 3143 rte_bit_relaxed_set32(HINIC_DEV_INIT, &nic_dev->dev_status); 3144 PMD_DRV_LOG(INFO, "Initialize %s in primary successfully", 3145 eth_dev->data->name); 3146 3147 return 0; 3148 3149 enable_intr_fail: 3150 (void)rte_intr_callback_unregister(&pci_dev->intr_handle, 3151 hinic_dev_interrupt_handler, 3152 (void *)eth_dev); 3153 3154 reg_intr_cb_fail: 3155 hinic_deinit_mac_addr(eth_dev); 3156 3157 init_mac_fail: 3158 eth_dev->dev_ops = NULL; 3159 hinic_nic_dev_destroy(eth_dev); 3160 3161 create_nic_dev_fail: 3162 rte_free(nic_dev->mc_list); 3163 nic_dev->mc_list = NULL; 3164 3165 mc_addr_fail: 3166 rte_free(eth_addr); 3167 eth_dev->data->mac_addrs = NULL; 3168 3169 eth_addr_fail: 3170 PMD_DRV_LOG(ERR, "Initialize %s in primary failed", 3171 eth_dev->data->name); 3172 return rc; 3173 } 3174 3175 static int hinic_dev_init(struct rte_eth_dev *eth_dev) 3176 { 3177 struct rte_pci_device *pci_dev; 3178 3179 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 3180 3181 PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process", 3182 pci_dev->addr.domain, pci_dev->addr.bus, 3183 pci_dev->addr.devid, pci_dev->addr.function, 3184 (rte_eal_process_type() == RTE_PROC_PRIMARY) ? 3185 "primary" : "secondary"); 3186 3187 /* rte_eth_dev rx_burst and tx_burst */ 3188 eth_dev->rx_pkt_burst = hinic_recv_pkts; 3189 eth_dev->tx_pkt_burst = hinic_xmit_pkts; 3190 3191 return hinic_func_init(eth_dev); 3192 } 3193 3194 static int hinic_dev_uninit(struct rte_eth_dev *dev) 3195 { 3196 struct hinic_nic_dev *nic_dev; 3197 3198 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); 3199 rte_bit_relaxed_clear32(HINIC_DEV_INIT, &nic_dev->dev_status); 3200 3201 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 3202 return 0; 3203 3204 hinic_dev_close(dev); 3205 3206 dev->dev_ops = NULL; 3207 dev->rx_pkt_burst = NULL; 3208 dev->tx_pkt_burst = NULL; 3209 3210 rte_free(nic_dev->mc_list); 3211 3212 rte_free(dev->data->mac_addrs); 3213 dev->data->mac_addrs = NULL; 3214 3215 return HINIC_OK; 3216 } 3217 3218 static struct rte_pci_id pci_id_hinic_map[] = { 3219 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) }, 3220 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) }, 3221 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) }, 3222 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) }, 3223 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) }, 3224 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) }, 3225 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) }, 3226 {.vendor_id = 0}, 3227 }; 3228 3229 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 3230 struct rte_pci_device *pci_dev) 3231 { 3232 return rte_eth_dev_pci_generic_probe(pci_dev, 3233 sizeof(struct hinic_nic_dev), hinic_dev_init); 3234 } 3235 3236 static int hinic_pci_remove(struct rte_pci_device *pci_dev) 3237 { 3238 return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit); 3239 } 3240 3241 static struct rte_pci_driver rte_hinic_pmd = { 3242 .id_table = pci_id_hinic_map, 3243 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 3244 .probe = hinic_pci_probe, 3245 .remove = hinic_pci_remove, 3246 }; 3247 3248 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd); 3249 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map); 3250 RTE_LOG_REGISTER(hinic_logtype, pmd.net.hinic, INFO); 3251