1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 */ 5 6 #include <stdio.h> 7 #include <stdint.h> 8 9 #include <rte_dev.h> 10 #include <rte_pci.h> 11 #include <rte_bus_pci.h> 12 #include <rte_ethdev_driver.h> 13 #include <rte_ethdev_pci.h> 14 #include <rte_string_fns.h> 15 16 #include "vnic_intr.h" 17 #include "vnic_cq.h" 18 #include "vnic_wq.h" 19 #include "vnic_rq.h" 20 #include "vnic_enet.h" 21 #include "enic.h" 22 23 int enicpmd_logtype_init; 24 int enicpmd_logtype_flow; 25 26 #define PMD_INIT_LOG(level, fmt, args...) \ 27 rte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \ 28 "%s" fmt "\n", __func__, ##args) 29 30 #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>") 31 32 /* 33 * The set of PCI devices this driver supports 34 */ 35 #define CISCO_PCI_VENDOR_ID 0x1137 36 static const struct rte_pci_id pci_id_enic_map[] = { 37 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 38 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 39 {.vendor_id = 0, /* sentinel */}, 40 }; 41 42 #define ENIC_TX_OFFLOAD_CAPA ( \ 43 DEV_TX_OFFLOAD_VLAN_INSERT | \ 44 DEV_TX_OFFLOAD_IPV4_CKSUM | \ 45 DEV_TX_OFFLOAD_UDP_CKSUM | \ 46 DEV_TX_OFFLOAD_TCP_CKSUM | \ 47 DEV_TX_OFFLOAD_TCP_TSO) 48 49 #define ENIC_RX_OFFLOAD_CAPA ( \ 50 DEV_RX_OFFLOAD_VLAN_STRIP | \ 51 DEV_RX_OFFLOAD_IPV4_CKSUM | \ 52 DEV_RX_OFFLOAD_UDP_CKSUM | \ 53 DEV_RX_OFFLOAD_TCP_CKSUM) 54 55 RTE_INIT(enicpmd_init_log); 56 static void 57 enicpmd_init_log(void) 58 { 59 enicpmd_logtype_init = rte_log_register("pmd.net.enic.init"); 60 if (enicpmd_logtype_init >= 0) 61 rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE); 62 enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow"); 63 if (enicpmd_logtype_flow >= 0) 64 rte_log_set_level(enicpmd_logtype_flow, RTE_LOG_NOTICE); 65 } 66 67 static int 68 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev, 69 enum rte_filter_op filter_op, void *arg) 70 { 71 struct enic *enic = pmd_priv(eth_dev); 72 int ret = 0; 73 74 ENICPMD_FUNC_TRACE(); 75 if (filter_op == RTE_ETH_FILTER_NOP) 76 return 0; 77 78 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH) 79 return -EINVAL; 80 81 switch (filter_op) { 82 case RTE_ETH_FILTER_ADD: 83 case RTE_ETH_FILTER_UPDATE: 84 ret = enic_fdir_add_fltr(enic, 85 (struct rte_eth_fdir_filter *)arg); 86 break; 87 88 case RTE_ETH_FILTER_DELETE: 89 ret = enic_fdir_del_fltr(enic, 90 (struct rte_eth_fdir_filter *)arg); 91 break; 92 93 case RTE_ETH_FILTER_STATS: 94 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg); 95 break; 96 97 case RTE_ETH_FILTER_FLUSH: 98 dev_warning(enic, "unsupported operation %u", filter_op); 99 ret = -ENOTSUP; 100 break; 101 case RTE_ETH_FILTER_INFO: 102 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg); 103 break; 104 default: 105 dev_err(enic, "unknown operation %u", filter_op); 106 ret = -EINVAL; 107 break; 108 } 109 return ret; 110 } 111 112 static int 113 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev, 114 enum rte_filter_type filter_type, 115 enum rte_filter_op filter_op, 116 void *arg) 117 { 118 int ret = 0; 119 120 ENICPMD_FUNC_TRACE(); 121 122 switch (filter_type) { 123 case RTE_ETH_FILTER_GENERIC: 124 if (filter_op != RTE_ETH_FILTER_GET) 125 return -EINVAL; 126 *(const void **)arg = &enic_flow_ops; 127 break; 128 case RTE_ETH_FILTER_FDIR: 129 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg); 130 break; 131 default: 132 dev_warning(enic, "Filter type (%d) not supported", 133 filter_type); 134 ret = -EINVAL; 135 break; 136 } 137 138 return ret; 139 } 140 141 static void enicpmd_dev_tx_queue_release(void *txq) 142 { 143 ENICPMD_FUNC_TRACE(); 144 145 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 146 return; 147 148 enic_free_wq(txq); 149 } 150 151 static int enicpmd_dev_setup_intr(struct enic *enic) 152 { 153 int ret; 154 unsigned int index; 155 156 ENICPMD_FUNC_TRACE(); 157 158 /* Are we done with the init of all the queues? */ 159 for (index = 0; index < enic->cq_count; index++) { 160 if (!enic->cq[index].ctrl) 161 break; 162 } 163 if (enic->cq_count != index) 164 return 0; 165 for (index = 0; index < enic->wq_count; index++) { 166 if (!enic->wq[index].ctrl) 167 break; 168 } 169 if (enic->wq_count != index) 170 return 0; 171 /* check start of packet (SOP) RQs only in case scatter is disabled. */ 172 for (index = 0; index < enic->rq_count; index++) { 173 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl) 174 break; 175 } 176 if (enic->rq_count != index) 177 return 0; 178 179 ret = enic_alloc_intr_resources(enic); 180 if (ret) { 181 dev_err(enic, "alloc intr failed\n"); 182 return ret; 183 } 184 enic_init_vnic_resources(enic); 185 186 ret = enic_setup_finish(enic); 187 if (ret) 188 dev_err(enic, "setup could not be finished\n"); 189 190 return ret; 191 } 192 193 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, 194 uint16_t queue_idx, 195 uint16_t nb_desc, 196 unsigned int socket_id, 197 __rte_unused const struct rte_eth_txconf *tx_conf) 198 { 199 int ret; 200 struct enic *enic = pmd_priv(eth_dev); 201 202 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 203 return -E_RTE_SECONDARY; 204 205 ENICPMD_FUNC_TRACE(); 206 RTE_ASSERT(queue_idx < enic->conf_wq_count); 207 eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx]; 208 209 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc); 210 if (ret) { 211 dev_err(enic, "error in allocating wq\n"); 212 return ret; 213 } 214 215 return enicpmd_dev_setup_intr(enic); 216 } 217 218 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev, 219 uint16_t queue_idx) 220 { 221 struct enic *enic = pmd_priv(eth_dev); 222 223 ENICPMD_FUNC_TRACE(); 224 225 enic_start_wq(enic, queue_idx); 226 227 return 0; 228 } 229 230 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, 231 uint16_t queue_idx) 232 { 233 int ret; 234 struct enic *enic = pmd_priv(eth_dev); 235 236 ENICPMD_FUNC_TRACE(); 237 238 ret = enic_stop_wq(enic, queue_idx); 239 if (ret) 240 dev_err(enic, "error in stopping wq %d\n", queue_idx); 241 242 return ret; 243 } 244 245 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev, 246 uint16_t queue_idx) 247 { 248 struct enic *enic = pmd_priv(eth_dev); 249 250 ENICPMD_FUNC_TRACE(); 251 252 enic_start_rq(enic, queue_idx); 253 254 return 0; 255 } 256 257 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, 258 uint16_t queue_idx) 259 { 260 int ret; 261 struct enic *enic = pmd_priv(eth_dev); 262 263 ENICPMD_FUNC_TRACE(); 264 265 ret = enic_stop_rq(enic, queue_idx); 266 if (ret) 267 dev_err(enic, "error in stopping rq %d\n", queue_idx); 268 269 return ret; 270 } 271 272 static void enicpmd_dev_rx_queue_release(void *rxq) 273 { 274 ENICPMD_FUNC_TRACE(); 275 276 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 277 return; 278 279 enic_free_rq(rxq); 280 } 281 282 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev, 283 uint16_t rx_queue_id) 284 { 285 struct enic *enic = pmd_priv(dev); 286 uint32_t queue_count = 0; 287 struct vnic_cq *cq; 288 uint32_t cq_tail; 289 uint16_t cq_idx; 290 int rq_num; 291 292 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id); 293 cq = &enic->cq[enic_cq_rq(enic, rq_num)]; 294 cq_idx = cq->to_clean; 295 296 cq_tail = ioread32(&cq->ctrl->cq_tail); 297 298 if (cq_tail < cq_idx) 299 cq_tail += cq->ring.desc_count; 300 301 queue_count = cq_tail - cq_idx; 302 303 return queue_count; 304 } 305 306 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, 307 uint16_t queue_idx, 308 uint16_t nb_desc, 309 unsigned int socket_id, 310 const struct rte_eth_rxconf *rx_conf, 311 struct rte_mempool *mp) 312 { 313 int ret; 314 struct enic *enic = pmd_priv(eth_dev); 315 316 ENICPMD_FUNC_TRACE(); 317 318 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 319 return -E_RTE_SECONDARY; 320 RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count); 321 eth_dev->data->rx_queues[queue_idx] = 322 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 323 324 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc, 325 rx_conf->rx_free_thresh); 326 if (ret) { 327 dev_err(enic, "error in allocating rq\n"); 328 return ret; 329 } 330 331 return enicpmd_dev_setup_intr(enic); 332 } 333 334 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) 335 { 336 struct enic *enic = pmd_priv(eth_dev); 337 uint64_t offloads; 338 339 ENICPMD_FUNC_TRACE(); 340 341 offloads = eth_dev->data->dev_conf.rxmode.offloads; 342 if (mask & ETH_VLAN_STRIP_MASK) { 343 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 344 enic->ig_vlan_strip_en = 1; 345 else 346 enic->ig_vlan_strip_en = 0; 347 } 348 349 if ((mask & ETH_VLAN_FILTER_MASK) && 350 (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) { 351 dev_warning(enic, 352 "Configuration of VLAN filter is not supported\n"); 353 } 354 355 if ((mask & ETH_VLAN_EXTEND_MASK) && 356 (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) { 357 dev_warning(enic, 358 "Configuration of extended VLAN is not supported\n"); 359 } 360 361 return enic_set_vlan_strip(enic); 362 } 363 364 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev) 365 { 366 int ret; 367 int mask; 368 struct enic *enic = pmd_priv(eth_dev); 369 370 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 371 return -E_RTE_SECONDARY; 372 373 ENICPMD_FUNC_TRACE(); 374 ret = enic_set_vnic_res(enic); 375 if (ret) { 376 dev_err(enic, "Set vNIC resource num failed, aborting\n"); 377 return ret; 378 } 379 380 enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads & 381 DEV_RX_OFFLOAD_CHECKSUM); 382 /* All vlan offload masks to apply the current settings */ 383 mask = ETH_VLAN_STRIP_MASK | 384 ETH_VLAN_FILTER_MASK | 385 ETH_VLAN_EXTEND_MASK; 386 ret = enicpmd_vlan_offload_set(eth_dev, mask); 387 if (ret) { 388 dev_err(enic, "Failed to configure VLAN offloads\n"); 389 return ret; 390 } 391 /* 392 * Initialize RSS with the default reta and key. If the user key is 393 * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the 394 * default key. 395 */ 396 return enic_init_rss_nic_cfg(enic); 397 } 398 399 /* Start the device. 400 * It returns 0 on success. 401 */ 402 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev) 403 { 404 struct enic *enic = pmd_priv(eth_dev); 405 406 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 407 return -E_RTE_SECONDARY; 408 409 ENICPMD_FUNC_TRACE(); 410 return enic_enable(enic); 411 } 412 413 /* 414 * Stop device: disable rx and tx functions to allow for reconfiguring. 415 */ 416 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev) 417 { 418 struct rte_eth_link link; 419 struct enic *enic = pmd_priv(eth_dev); 420 421 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 422 return; 423 424 ENICPMD_FUNC_TRACE(); 425 enic_disable(enic); 426 427 memset(&link, 0, sizeof(link)); 428 rte_eth_linkstatus_set(eth_dev, &link); 429 } 430 431 /* 432 * Stop device. 433 */ 434 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev) 435 { 436 struct enic *enic = pmd_priv(eth_dev); 437 438 ENICPMD_FUNC_TRACE(); 439 enic_remove(enic); 440 } 441 442 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev, 443 __rte_unused int wait_to_complete) 444 { 445 struct enic *enic = pmd_priv(eth_dev); 446 447 ENICPMD_FUNC_TRACE(); 448 return enic_link_update(enic); 449 } 450 451 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev, 452 struct rte_eth_stats *stats) 453 { 454 struct enic *enic = pmd_priv(eth_dev); 455 456 ENICPMD_FUNC_TRACE(); 457 return enic_dev_stats_get(enic, stats); 458 } 459 460 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev) 461 { 462 struct enic *enic = pmd_priv(eth_dev); 463 464 ENICPMD_FUNC_TRACE(); 465 enic_dev_stats_clear(enic); 466 } 467 468 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, 469 struct rte_eth_dev_info *device_info) 470 { 471 struct enic *enic = pmd_priv(eth_dev); 472 473 ENICPMD_FUNC_TRACE(); 474 device_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 475 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */ 476 device_info->max_rx_queues = enic->conf_rq_count / 2; 477 device_info->max_tx_queues = enic->conf_wq_count; 478 device_info->min_rx_bufsize = ENIC_MIN_MTU; 479 /* "Max" mtu is not a typo. HW receives packet sizes up to the 480 * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is 481 * a hint to the driver to size receive buffers accordingly so that 482 * larger-than-vnic-mtu packets get truncated.. For DPDK, we let 483 * the user decide the buffer size via rxmode.max_rx_pkt_len, basically 484 * ignoring vNIC mtu. 485 */ 486 device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu); 487 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR; 488 device_info->rx_offload_capa = ENIC_RX_OFFLOAD_CAPA; 489 device_info->tx_offload_capa = ENIC_TX_OFFLOAD_CAPA; 490 device_info->default_rxconf = (struct rte_eth_rxconf) { 491 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH 492 }; 493 device_info->reta_size = enic->reta_size; 494 device_info->hash_key_size = enic->hash_key_size; 495 device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads; 496 } 497 498 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) 499 { 500 static const uint32_t ptypes[] = { 501 RTE_PTYPE_L2_ETHER, 502 RTE_PTYPE_L2_ETHER_VLAN, 503 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 504 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 505 RTE_PTYPE_L4_TCP, 506 RTE_PTYPE_L4_UDP, 507 RTE_PTYPE_L4_FRAG, 508 RTE_PTYPE_L4_NONFRAG, 509 RTE_PTYPE_UNKNOWN 510 }; 511 512 if (dev->rx_pkt_burst == enic_recv_pkts) 513 return ptypes; 514 return NULL; 515 } 516 517 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev) 518 { 519 struct enic *enic = pmd_priv(eth_dev); 520 521 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 522 return; 523 524 ENICPMD_FUNC_TRACE(); 525 526 enic->promisc = 1; 527 enic_add_packet_filter(enic); 528 } 529 530 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev) 531 { 532 struct enic *enic = pmd_priv(eth_dev); 533 534 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 535 return; 536 537 ENICPMD_FUNC_TRACE(); 538 enic->promisc = 0; 539 enic_add_packet_filter(enic); 540 } 541 542 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev) 543 { 544 struct enic *enic = pmd_priv(eth_dev); 545 546 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 547 return; 548 549 ENICPMD_FUNC_TRACE(); 550 enic->allmulti = 1; 551 enic_add_packet_filter(enic); 552 } 553 554 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev) 555 { 556 struct enic *enic = pmd_priv(eth_dev); 557 558 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 559 return; 560 561 ENICPMD_FUNC_TRACE(); 562 enic->allmulti = 0; 563 enic_add_packet_filter(enic); 564 } 565 566 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev, 567 struct ether_addr *mac_addr, 568 __rte_unused uint32_t index, __rte_unused uint32_t pool) 569 { 570 struct enic *enic = pmd_priv(eth_dev); 571 572 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 573 return -E_RTE_SECONDARY; 574 575 ENICPMD_FUNC_TRACE(); 576 return enic_set_mac_address(enic, mac_addr->addr_bytes); 577 } 578 579 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index) 580 { 581 struct enic *enic = pmd_priv(eth_dev); 582 583 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 584 return; 585 586 ENICPMD_FUNC_TRACE(); 587 enic_del_mac_address(enic, index); 588 } 589 590 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 591 { 592 struct enic *enic = pmd_priv(eth_dev); 593 594 ENICPMD_FUNC_TRACE(); 595 return enic_set_mtu(enic, mtu); 596 } 597 598 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev, 599 struct rte_eth_rss_reta_entry64 600 *reta_conf, 601 uint16_t reta_size) 602 { 603 struct enic *enic = pmd_priv(dev); 604 uint16_t i, idx, shift; 605 606 ENICPMD_FUNC_TRACE(); 607 if (reta_size != ENIC_RSS_RETA_SIZE) { 608 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n", 609 reta_size, ENIC_RSS_RETA_SIZE); 610 return -EINVAL; 611 } 612 613 for (i = 0; i < reta_size; i++) { 614 idx = i / RTE_RETA_GROUP_SIZE; 615 shift = i % RTE_RETA_GROUP_SIZE; 616 if (reta_conf[idx].mask & (1ULL << shift)) 617 reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx( 618 enic->rss_cpu.cpu[i / 4].b[i % 4]); 619 } 620 621 return 0; 622 } 623 624 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev, 625 struct rte_eth_rss_reta_entry64 626 *reta_conf, 627 uint16_t reta_size) 628 { 629 struct enic *enic = pmd_priv(dev); 630 union vnic_rss_cpu rss_cpu; 631 uint16_t i, idx, shift; 632 633 ENICPMD_FUNC_TRACE(); 634 if (reta_size != ENIC_RSS_RETA_SIZE) { 635 dev_err(enic, "reta_update: wrong reta_size. given=%u" 636 " expected=%u\n", 637 reta_size, ENIC_RSS_RETA_SIZE); 638 return -EINVAL; 639 } 640 /* 641 * Start with the current reta and modify it per reta_conf, as we 642 * need to push the entire reta even if we only modify one entry. 643 */ 644 rss_cpu = enic->rss_cpu; 645 for (i = 0; i < reta_size; i++) { 646 idx = i / RTE_RETA_GROUP_SIZE; 647 shift = i % RTE_RETA_GROUP_SIZE; 648 if (reta_conf[idx].mask & (1ULL << shift)) 649 rss_cpu.cpu[i / 4].b[i % 4] = 650 enic_rte_rq_idx_to_sop_idx( 651 reta_conf[idx].reta[shift]); 652 } 653 return enic_set_rss_reta(enic, &rss_cpu); 654 } 655 656 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev, 657 struct rte_eth_rss_conf *rss_conf) 658 { 659 struct enic *enic = pmd_priv(dev); 660 661 ENICPMD_FUNC_TRACE(); 662 return enic_set_rss_conf(enic, rss_conf); 663 } 664 665 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 666 struct rte_eth_rss_conf *rss_conf) 667 { 668 struct enic *enic = pmd_priv(dev); 669 670 ENICPMD_FUNC_TRACE(); 671 if (rss_conf == NULL) 672 return -EINVAL; 673 if (rss_conf->rss_key != NULL && 674 rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) { 675 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u" 676 " expected=%u+\n", 677 rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE); 678 return -EINVAL; 679 } 680 rss_conf->rss_hf = enic->rss_hf; 681 if (rss_conf->rss_key != NULL) { 682 int i; 683 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) { 684 rss_conf->rss_key[i] = 685 enic->rss_key.key[i / 10].b[i % 10]; 686 } 687 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE; 688 } 689 return 0; 690 } 691 692 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev, 693 uint16_t rx_queue_id, 694 struct rte_eth_rxq_info *qinfo) 695 { 696 struct enic *enic = pmd_priv(dev); 697 struct vnic_rq *rq_sop; 698 struct vnic_rq *rq_data; 699 struct rte_eth_rxconf *conf; 700 uint16_t sop_queue_idx; 701 uint16_t data_queue_idx; 702 703 ENICPMD_FUNC_TRACE(); 704 sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id); 705 data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id); 706 rq_sop = &enic->rq[sop_queue_idx]; 707 rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */ 708 qinfo->mp = rq_sop->mp; 709 qinfo->scattered_rx = rq_sop->data_queue_enable; 710 qinfo->nb_desc = rq_sop->ring.desc_count; 711 if (qinfo->scattered_rx) 712 qinfo->nb_desc += rq_data->ring.desc_count; 713 conf = &qinfo->conf; 714 memset(conf, 0, sizeof(*conf)); 715 conf->rx_free_thresh = rq_sop->rx_free_thresh; 716 conf->rx_drop_en = 1; 717 /* 718 * Except VLAN stripping (port setting), all the checksum offloads 719 * are always enabled. 720 */ 721 conf->offloads = ENIC_RX_OFFLOAD_CAPA; 722 if (!enic->ig_vlan_strip_en) 723 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP; 724 /* rx_thresh and other fields are not applicable for enic */ 725 } 726 727 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev, 728 __rte_unused uint16_t tx_queue_id, 729 struct rte_eth_txq_info *qinfo) 730 { 731 struct enic *enic = pmd_priv(dev); 732 733 ENICPMD_FUNC_TRACE(); 734 qinfo->nb_desc = enic->config.wq_desc_count; 735 memset(&qinfo->conf, 0, sizeof(qinfo->conf)); 736 qinfo->conf.offloads = ENIC_TX_OFFLOAD_CAPA; /* not configurable */ 737 /* tx_thresh, and all the other fields are not applicable for enic */ 738 } 739 740 static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev, 741 uint16_t rx_queue_id) 742 { 743 struct enic *enic = pmd_priv(eth_dev); 744 745 ENICPMD_FUNC_TRACE(); 746 vnic_intr_unmask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]); 747 return 0; 748 } 749 750 static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev, 751 uint16_t rx_queue_id) 752 { 753 struct enic *enic = pmd_priv(eth_dev); 754 755 ENICPMD_FUNC_TRACE(); 756 vnic_intr_mask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]); 757 return 0; 758 } 759 760 static const struct eth_dev_ops enicpmd_eth_dev_ops = { 761 .dev_configure = enicpmd_dev_configure, 762 .dev_start = enicpmd_dev_start, 763 .dev_stop = enicpmd_dev_stop, 764 .dev_set_link_up = NULL, 765 .dev_set_link_down = NULL, 766 .dev_close = enicpmd_dev_close, 767 .promiscuous_enable = enicpmd_dev_promiscuous_enable, 768 .promiscuous_disable = enicpmd_dev_promiscuous_disable, 769 .allmulticast_enable = enicpmd_dev_allmulticast_enable, 770 .allmulticast_disable = enicpmd_dev_allmulticast_disable, 771 .link_update = enicpmd_dev_link_update, 772 .stats_get = enicpmd_dev_stats_get, 773 .stats_reset = enicpmd_dev_stats_reset, 774 .queue_stats_mapping_set = NULL, 775 .dev_infos_get = enicpmd_dev_info_get, 776 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get, 777 .mtu_set = enicpmd_mtu_set, 778 .vlan_filter_set = NULL, 779 .vlan_tpid_set = NULL, 780 .vlan_offload_set = enicpmd_vlan_offload_set, 781 .vlan_strip_queue_set = NULL, 782 .rx_queue_start = enicpmd_dev_rx_queue_start, 783 .rx_queue_stop = enicpmd_dev_rx_queue_stop, 784 .tx_queue_start = enicpmd_dev_tx_queue_start, 785 .tx_queue_stop = enicpmd_dev_tx_queue_stop, 786 .rx_queue_setup = enicpmd_dev_rx_queue_setup, 787 .rx_queue_release = enicpmd_dev_rx_queue_release, 788 .rx_queue_count = enicpmd_dev_rx_queue_count, 789 .rx_descriptor_done = NULL, 790 .tx_queue_setup = enicpmd_dev_tx_queue_setup, 791 .tx_queue_release = enicpmd_dev_tx_queue_release, 792 .rx_queue_intr_enable = enicpmd_dev_rx_queue_intr_enable, 793 .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable, 794 .rxq_info_get = enicpmd_dev_rxq_info_get, 795 .txq_info_get = enicpmd_dev_txq_info_get, 796 .dev_led_on = NULL, 797 .dev_led_off = NULL, 798 .flow_ctrl_get = NULL, 799 .flow_ctrl_set = NULL, 800 .priority_flow_ctrl_set = NULL, 801 .mac_addr_add = enicpmd_add_mac_addr, 802 .mac_addr_remove = enicpmd_remove_mac_addr, 803 .filter_ctrl = enicpmd_dev_filter_ctrl, 804 .reta_query = enicpmd_dev_rss_reta_query, 805 .reta_update = enicpmd_dev_rss_reta_update, 806 .rss_hash_conf_get = enicpmd_dev_rss_hash_conf_get, 807 .rss_hash_update = enicpmd_dev_rss_hash_update, 808 }; 809 810 struct enic *enicpmd_list_head = NULL; 811 /* Initialize the driver 812 * It returns 0 on success. 813 */ 814 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev) 815 { 816 struct rte_pci_device *pdev; 817 struct rte_pci_addr *addr; 818 struct enic *enic = pmd_priv(eth_dev); 819 820 ENICPMD_FUNC_TRACE(); 821 822 enic->port_id = eth_dev->data->port_id; 823 enic->rte_dev = eth_dev; 824 eth_dev->dev_ops = &enicpmd_eth_dev_ops; 825 eth_dev->rx_pkt_burst = &enic_recv_pkts; 826 eth_dev->tx_pkt_burst = &enic_xmit_pkts; 827 eth_dev->tx_pkt_prepare = &enic_prep_pkts; 828 829 pdev = RTE_ETH_DEV_TO_PCI(eth_dev); 830 rte_eth_copy_pci_info(eth_dev, pdev); 831 enic->pdev = pdev; 832 addr = &pdev->addr; 833 834 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x", 835 addr->domain, addr->bus, addr->devid, addr->function); 836 837 return enic_probe(enic); 838 } 839 840 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 841 struct rte_pci_device *pci_dev) 842 { 843 return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic), 844 eth_enicpmd_dev_init); 845 } 846 847 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev) 848 { 849 return rte_eth_dev_pci_generic_remove(pci_dev, NULL); 850 } 851 852 static struct rte_pci_driver rte_enic_pmd = { 853 .id_table = pci_id_enic_map, 854 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 855 .probe = eth_enic_pci_probe, 856 .remove = eth_enic_pci_remove, 857 }; 858 859 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd); 860 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); 861 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci"); 862