1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation 3 */ 4 5 #ifndef _E1000_ETHDEV_H_ 6 #define _E1000_ETHDEV_H_ 7 #include <rte_time.h> 8 #include <rte_pci.h> 9 10 #define E1000_INTEL_VENDOR_ID 0x8086 11 12 /* need update link, bit flag */ 13 #define E1000_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0) 14 #define E1000_FLAG_MAILBOX (uint32_t)(1 << 1) 15 16 /* 17 * Defines that were not part of e1000_hw.h as they are not used by the FreeBSD 18 * driver. 19 */ 20 #define E1000_ADVTXD_POPTS_TXSM 0x00000200 /* L4 Checksum offload request */ 21 #define E1000_ADVTXD_POPTS_IXSM 0x00000100 /* IP Checksum offload request */ 22 #define E1000_ADVTXD_TUCMD_L4T_RSV 0x00001800 /* L4 Packet TYPE of Reserved */ 23 #define E1000_RXD_STAT_TMST 0x10000 /* Timestamped Packet indication */ 24 #define E1000_RXD_ERR_CKSUM_BIT 29 25 #define E1000_RXD_ERR_CKSUM_MSK 3 26 #define E1000_ADVTXD_MACLEN_SHIFT 9 /* Bit shift for l2_len */ 27 #define E1000_CTRL_EXT_EXTEND_VLAN (1<<26) /* EXTENDED VLAN */ 28 #define IGB_VFTA_SIZE 128 29 30 #define IGB_MAX_RX_QUEUE_NUM 8 31 #define IGB_MAX_RX_QUEUE_NUM_82576 16 32 33 #define E1000_SYN_FILTER_ENABLE 0x00000001 /* syn filter enable field */ 34 #define E1000_SYN_FILTER_QUEUE 0x0000000E /* syn filter queue field */ 35 #define E1000_SYN_FILTER_QUEUE_SHIFT 1 /* syn filter queue field */ 36 #define E1000_RFCTL_SYNQFP 0x00080000 /* SYNQFP in RFCTL register */ 37 38 #define E1000_ETQF_ETHERTYPE 0x0000FFFF 39 #define E1000_ETQF_QUEUE 0x00070000 40 #define E1000_ETQF_QUEUE_SHIFT 16 41 #define E1000_MAX_ETQF_FILTERS 8 42 43 #define E1000_IMIR_DSTPORT 0x0000FFFF 44 #define E1000_IMIR_PRIORITY 0xE0000000 45 #define E1000_MAX_TTQF_FILTERS 8 46 #define E1000_2TUPLE_MAX_PRI 7 47 48 #define E1000_MAX_FLEX_FILTERS 8 49 #define E1000_MAX_FHFT 4 50 #define E1000_MAX_FHFT_EXT 4 51 #define E1000_FHFT_SIZE_IN_DWD 64 52 #define E1000_MAX_FLEX_FILTER_PRI 7 53 #define E1000_MAX_FLEX_FILTER_LEN 128 54 #define E1000_MAX_FLEX_FILTER_DWDS \ 55 (E1000_MAX_FLEX_FILTER_LEN / sizeof(uint32_t)) 56 #define E1000_FLEX_FILTERS_MASK_SIZE \ 57 (E1000_MAX_FLEX_FILTER_DWDS / 2) 58 #define E1000_FHFT_QUEUEING_LEN 0x0000007F 59 #define E1000_FHFT_QUEUEING_QUEUE 0x00000700 60 #define E1000_FHFT_QUEUEING_PRIO 0x00070000 61 #define E1000_FHFT_QUEUEING_OFFSET 0xFC 62 #define E1000_FHFT_QUEUEING_QUEUE_SHIFT 8 63 #define E1000_FHFT_QUEUEING_PRIO_SHIFT 16 64 #define E1000_WUFC_FLEX_HQ 0x00004000 65 66 #define E1000_SPQF_SRCPORT 0x0000FFFF 67 68 #define E1000_MAX_FTQF_FILTERS 8 69 #define E1000_FTQF_PROTOCOL_MASK 0x000000FF 70 #define E1000_FTQF_5TUPLE_MASK_SHIFT 28 71 #define E1000_FTQF_QUEUE_MASK 0x03ff0000 72 #define E1000_FTQF_QUEUE_SHIFT 16 73 #define E1000_FTQF_QUEUE_ENABLE 0x00000100 74 75 #define IGB_RSS_OFFLOAD_ALL ( \ 76 ETH_RSS_IPV4 | \ 77 ETH_RSS_NONFRAG_IPV4_TCP | \ 78 ETH_RSS_NONFRAG_IPV4_UDP | \ 79 ETH_RSS_IPV6 | \ 80 ETH_RSS_NONFRAG_IPV6_TCP | \ 81 ETH_RSS_NONFRAG_IPV6_UDP | \ 82 ETH_RSS_IPV6_EX | \ 83 ETH_RSS_IPV6_TCP_EX | \ 84 ETH_RSS_IPV6_UDP_EX) 85 86 /* 87 * Maximum number of Ring Descriptors. 88 * 89 * Since RDLEN/TDLEN should be multiple of 128 bytes, the number of ring 90 * desscriptors should meet the following condition: 91 * (num_ring_desc * sizeof(struct e1000_rx/tx_desc)) % 128 == 0 92 */ 93 #define E1000_MIN_RING_DESC 32 94 #define E1000_MAX_RING_DESC 4096 95 96 /* 97 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 98 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. 99 * This will also optimize cache line size effect. 100 * H/W supports up to cache line size 128. 101 */ 102 #define E1000_ALIGN 128 103 104 #define IGB_RXD_ALIGN (E1000_ALIGN / sizeof(union e1000_adv_rx_desc)) 105 #define IGB_TXD_ALIGN (E1000_ALIGN / sizeof(union e1000_adv_tx_desc)) 106 107 #define EM_RXD_ALIGN (E1000_ALIGN / sizeof(struct e1000_rx_desc)) 108 #define EM_TXD_ALIGN (E1000_ALIGN / sizeof(struct e1000_data_desc)) 109 110 #define E1000_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET 111 #define E1000_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET 112 113 #define IGB_TX_MAX_SEG UINT8_MAX 114 #define IGB_TX_MAX_MTU_SEG UINT8_MAX 115 #define EM_TX_MAX_SEG UINT8_MAX 116 #define EM_TX_MAX_MTU_SEG UINT8_MAX 117 118 #define MAC_TYPE_FILTER_SUP(type) do {\ 119 if ((type) != e1000_82580 && (type) != e1000_i350 &&\ 120 (type) != e1000_82576 && (type) != e1000_i210 &&\ 121 (type) != e1000_i211)\ 122 return -ENOTSUP;\ 123 } while (0) 124 125 #define MAC_TYPE_FILTER_SUP_EXT(type) do {\ 126 if ((type) != e1000_82580 && (type) != e1000_i350 &&\ 127 (type) != e1000_i210 && (type) != e1000_i211)\ 128 return -ENOTSUP; \ 129 } while (0) 130 131 /* structure for interrupt relative data */ 132 struct e1000_interrupt { 133 uint32_t flags; 134 uint32_t mask; 135 }; 136 137 /* local vfta copy */ 138 struct e1000_vfta { 139 uint32_t vfta[IGB_VFTA_SIZE]; 140 }; 141 142 /* 143 * VF data which used by PF host only 144 */ 145 #define E1000_MAX_VF_MC_ENTRIES 30 146 struct e1000_vf_info { 147 uint8_t vf_mac_addresses[ETHER_ADDR_LEN]; 148 uint16_t vf_mc_hashes[E1000_MAX_VF_MC_ENTRIES]; 149 uint16_t num_vf_mc_hashes; 150 uint16_t default_vf_vlan_id; 151 uint16_t vlans_enabled; 152 uint16_t pf_qos; 153 uint16_t vlan_count; 154 uint16_t tx_rate; 155 }; 156 157 TAILQ_HEAD(e1000_flex_filter_list, e1000_flex_filter); 158 159 struct e1000_flex_filter_info { 160 uint16_t len; 161 uint32_t dwords[E1000_MAX_FLEX_FILTER_DWDS]; /* flex bytes in dword. */ 162 /* if mask bit is 1b, do not compare corresponding byte in dwords. */ 163 uint8_t mask[E1000_FLEX_FILTERS_MASK_SIZE]; 164 uint8_t priority; 165 }; 166 167 /* Flex filter structure */ 168 struct e1000_flex_filter { 169 TAILQ_ENTRY(e1000_flex_filter) entries; 170 uint16_t index; /* index of flex filter */ 171 struct e1000_flex_filter_info filter_info; 172 uint16_t queue; /* rx queue assigned to */ 173 }; 174 175 TAILQ_HEAD(e1000_5tuple_filter_list, e1000_5tuple_filter); 176 TAILQ_HEAD(e1000_2tuple_filter_list, e1000_2tuple_filter); 177 178 struct e1000_5tuple_filter_info { 179 uint32_t dst_ip; 180 uint32_t src_ip; 181 uint16_t dst_port; 182 uint16_t src_port; 183 uint8_t proto; /* l4 protocol. */ 184 /* the packet matched above 5tuple and contain any set bit will hit this filter. */ 185 uint8_t tcp_flags; 186 uint8_t priority; /* seven levels (001b-111b), 111b is highest, 187 used when more than one filter matches. */ 188 uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */ 189 src_ip_mask:1, /* if mask is 1b, do not compare src ip. */ 190 dst_port_mask:1, /* if mask is 1b, do not compare dst port. */ 191 src_port_mask:1, /* if mask is 1b, do not compare src port. */ 192 proto_mask:1; /* if mask is 1b, do not compare protocol. */ 193 }; 194 195 struct e1000_2tuple_filter_info { 196 uint16_t dst_port; 197 uint8_t proto; /* l4 protocol. */ 198 /* the packet matched above 2tuple and contain any set bit will hit this filter. */ 199 uint8_t tcp_flags; 200 uint8_t priority; /* seven levels (001b-111b), 111b is highest, 201 used when more than one filter matches. */ 202 uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */ 203 src_ip_mask:1, /* if mask is 1b, do not compare src ip. */ 204 dst_port_mask:1, /* if mask is 1b, do not compare dst port. */ 205 src_port_mask:1, /* if mask is 1b, do not compare src port. */ 206 proto_mask:1; /* if mask is 1b, do not compare protocol. */ 207 }; 208 209 /* 5tuple filter structure */ 210 struct e1000_5tuple_filter { 211 TAILQ_ENTRY(e1000_5tuple_filter) entries; 212 uint16_t index; /* the index of 5tuple filter */ 213 struct e1000_5tuple_filter_info filter_info; 214 uint16_t queue; /* rx queue assigned to */ 215 }; 216 217 /* 2tuple filter structure */ 218 struct e1000_2tuple_filter { 219 TAILQ_ENTRY(e1000_2tuple_filter) entries; 220 uint16_t index; /* the index of 2tuple filter */ 221 struct e1000_2tuple_filter_info filter_info; 222 uint16_t queue; /* rx queue assigned to */ 223 }; 224 225 /* ethertype filter structure */ 226 struct igb_ethertype_filter { 227 uint16_t ethertype; 228 uint32_t etqf; 229 }; 230 231 struct igb_rte_flow_rss_conf { 232 struct rte_eth_rss_conf rss_conf; /**< RSS parameters. */ 233 uint16_t num; /**< Number of entries in queue[]. */ 234 uint16_t queue[IGB_MAX_RX_QUEUE_NUM]; /**< Queues indices to use. */ 235 }; 236 237 /* 238 * Structure to store filters'info. 239 */ 240 struct e1000_filter_info { 241 uint8_t ethertype_mask; /* Bit mask for every used ethertype filter */ 242 /* store used ethertype filters*/ 243 struct igb_ethertype_filter ethertype_filters[E1000_MAX_ETQF_FILTERS]; 244 uint8_t flex_mask; /* Bit mask for every used flex filter */ 245 struct e1000_flex_filter_list flex_list; 246 /* Bit mask for every used 5tuple filter */ 247 uint8_t fivetuple_mask; 248 struct e1000_5tuple_filter_list fivetuple_list; 249 /* Bit mask for every used 2tuple filter */ 250 uint8_t twotuple_mask; 251 struct e1000_2tuple_filter_list twotuple_list; 252 /* store the SYN filter info */ 253 uint32_t syn_info; 254 /* store the rss filter info */ 255 struct igb_rte_flow_rss_conf rss_info; 256 }; 257 258 /* 259 * Structure to store private data for each driver instance (for each port). 260 */ 261 struct e1000_adapter { 262 struct e1000_hw hw; 263 struct e1000_hw_stats stats; 264 struct e1000_interrupt intr; 265 struct e1000_vfta shadow_vfta; 266 struct e1000_vf_info *vfdata; 267 struct e1000_filter_info filter; 268 bool stopped; 269 struct rte_timecounter systime_tc; 270 struct rte_timecounter rx_tstamp_tc; 271 struct rte_timecounter tx_tstamp_tc; 272 }; 273 274 #define E1000_DEV_PRIVATE(adapter) \ 275 ((struct e1000_adapter *)adapter) 276 277 #define E1000_DEV_PRIVATE_TO_HW(adapter) \ 278 (&((struct e1000_adapter *)adapter)->hw) 279 280 #define E1000_DEV_PRIVATE_TO_STATS(adapter) \ 281 (&((struct e1000_adapter *)adapter)->stats) 282 283 #define E1000_DEV_PRIVATE_TO_INTR(adapter) \ 284 (&((struct e1000_adapter *)adapter)->intr) 285 286 #define E1000_DEV_PRIVATE_TO_VFTA(adapter) \ 287 (&((struct e1000_adapter *)adapter)->shadow_vfta) 288 289 #define E1000_DEV_PRIVATE_TO_P_VFDATA(adapter) \ 290 (&((struct e1000_adapter *)adapter)->vfdata) 291 292 #define E1000_DEV_PRIVATE_TO_FILTER_INFO(adapter) \ 293 (&((struct e1000_adapter *)adapter)->filter) 294 295 struct rte_flow { 296 enum rte_filter_type filter_type; 297 void *rule; 298 }; 299 300 /* ntuple filter list structure */ 301 struct igb_ntuple_filter_ele { 302 TAILQ_ENTRY(igb_ntuple_filter_ele) entries; 303 struct rte_eth_ntuple_filter filter_info; 304 }; 305 306 /* ethertype filter list structure */ 307 struct igb_ethertype_filter_ele { 308 TAILQ_ENTRY(igb_ethertype_filter_ele) entries; 309 struct rte_eth_ethertype_filter filter_info; 310 }; 311 312 /* syn filter list structure */ 313 struct igb_eth_syn_filter_ele { 314 TAILQ_ENTRY(igb_eth_syn_filter_ele) entries; 315 struct rte_eth_syn_filter filter_info; 316 }; 317 318 /* flex filter list structure */ 319 struct igb_flex_filter_ele { 320 TAILQ_ENTRY(igb_flex_filter_ele) entries; 321 struct rte_eth_flex_filter filter_info; 322 }; 323 324 /* rss filter list structure */ 325 struct igb_rss_conf_ele { 326 TAILQ_ENTRY(igb_rss_conf_ele) entries; 327 struct igb_rte_flow_rss_conf filter_info; 328 }; 329 330 /* igb_flow memory list structure */ 331 struct igb_flow_mem { 332 TAILQ_ENTRY(igb_flow_mem) entries; 333 struct rte_flow *flow; 334 struct rte_eth_dev *dev; 335 }; 336 337 TAILQ_HEAD(igb_ntuple_filter_list, igb_ntuple_filter_ele); 338 struct igb_ntuple_filter_list igb_filter_ntuple_list; 339 TAILQ_HEAD(igb_ethertype_filter_list, igb_ethertype_filter_ele); 340 struct igb_ethertype_filter_list igb_filter_ethertype_list; 341 TAILQ_HEAD(igb_syn_filter_list, igb_eth_syn_filter_ele); 342 struct igb_syn_filter_list igb_filter_syn_list; 343 TAILQ_HEAD(igb_flex_filter_list, igb_flex_filter_ele); 344 struct igb_flex_filter_list igb_filter_flex_list; 345 TAILQ_HEAD(igb_rss_filter_list, igb_rss_conf_ele); 346 struct igb_rss_filter_list igb_filter_rss_list; 347 TAILQ_HEAD(igb_flow_mem_list, igb_flow_mem); 348 struct igb_flow_mem_list igb_flow_list; 349 350 extern const struct rte_flow_ops igb_flow_ops; 351 352 /* 353 * RX/TX IGB function prototypes 354 */ 355 void eth_igb_tx_queue_release(void *txq); 356 void eth_igb_rx_queue_release(void *rxq); 357 void igb_dev_clear_queues(struct rte_eth_dev *dev); 358 void igb_dev_free_queues(struct rte_eth_dev *dev); 359 360 uint64_t igb_get_rx_port_offloads_capa(struct rte_eth_dev *dev); 361 uint64_t igb_get_rx_queue_offloads_capa(struct rte_eth_dev *dev); 362 363 int eth_igb_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 364 uint16_t nb_rx_desc, unsigned int socket_id, 365 const struct rte_eth_rxconf *rx_conf, 366 struct rte_mempool *mb_pool); 367 368 uint32_t eth_igb_rx_queue_count(struct rte_eth_dev *dev, 369 uint16_t rx_queue_id); 370 371 int eth_igb_rx_descriptor_done(void *rx_queue, uint16_t offset); 372 373 int eth_igb_rx_descriptor_status(void *rx_queue, uint16_t offset); 374 int eth_igb_tx_descriptor_status(void *tx_queue, uint16_t offset); 375 376 uint64_t igb_get_tx_port_offloads_capa(struct rte_eth_dev *dev); 377 uint64_t igb_get_tx_queue_offloads_capa(struct rte_eth_dev *dev); 378 379 int eth_igb_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 380 uint16_t nb_tx_desc, unsigned int socket_id, 381 const struct rte_eth_txconf *tx_conf); 382 383 int eth_igb_tx_done_cleanup(void *txq, uint32_t free_cnt); 384 385 int eth_igb_rx_init(struct rte_eth_dev *dev); 386 387 void eth_igb_tx_init(struct rte_eth_dev *dev); 388 389 uint16_t eth_igb_xmit_pkts(void *txq, struct rte_mbuf **tx_pkts, 390 uint16_t nb_pkts); 391 392 uint16_t eth_igb_prep_pkts(void *txq, struct rte_mbuf **tx_pkts, 393 uint16_t nb_pkts); 394 395 uint16_t eth_igb_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, 396 uint16_t nb_pkts); 397 398 uint16_t eth_igb_recv_scattered_pkts(void *rxq, 399 struct rte_mbuf **rx_pkts, uint16_t nb_pkts); 400 401 int eth_igb_rss_hash_update(struct rte_eth_dev *dev, 402 struct rte_eth_rss_conf *rss_conf); 403 404 int eth_igb_rss_hash_conf_get(struct rte_eth_dev *dev, 405 struct rte_eth_rss_conf *rss_conf); 406 407 int eth_igbvf_rx_init(struct rte_eth_dev *dev); 408 409 void eth_igbvf_tx_init(struct rte_eth_dev *dev); 410 411 /* 412 * misc function prototypes 413 */ 414 void igb_pf_host_init(struct rte_eth_dev *eth_dev); 415 416 void igb_pf_mbx_process(struct rte_eth_dev *eth_dev); 417 418 int igb_pf_host_configure(struct rte_eth_dev *eth_dev); 419 420 void igb_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 421 struct rte_eth_rxq_info *qinfo); 422 423 void igb_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 424 struct rte_eth_txq_info *qinfo); 425 426 uint32_t em_get_max_pktlen(struct rte_eth_dev *dev); 427 428 /* 429 * RX/TX EM function prototypes 430 */ 431 void eth_em_tx_queue_release(void *txq); 432 void eth_em_rx_queue_release(void *rxq); 433 434 void em_dev_clear_queues(struct rte_eth_dev *dev); 435 void em_dev_free_queues(struct rte_eth_dev *dev); 436 437 uint64_t em_get_rx_port_offloads_capa(struct rte_eth_dev *dev); 438 uint64_t em_get_rx_queue_offloads_capa(struct rte_eth_dev *dev); 439 440 int eth_em_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 441 uint16_t nb_rx_desc, unsigned int socket_id, 442 const struct rte_eth_rxconf *rx_conf, 443 struct rte_mempool *mb_pool); 444 445 uint32_t eth_em_rx_queue_count(struct rte_eth_dev *dev, 446 uint16_t rx_queue_id); 447 448 int eth_em_rx_descriptor_done(void *rx_queue, uint16_t offset); 449 450 int eth_em_rx_descriptor_status(void *rx_queue, uint16_t offset); 451 int eth_em_tx_descriptor_status(void *tx_queue, uint16_t offset); 452 453 uint64_t em_get_tx_port_offloads_capa(struct rte_eth_dev *dev); 454 uint64_t em_get_tx_queue_offloads_capa(struct rte_eth_dev *dev); 455 456 int eth_em_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 457 uint16_t nb_tx_desc, unsigned int socket_id, 458 const struct rte_eth_txconf *tx_conf); 459 460 int eth_em_rx_init(struct rte_eth_dev *dev); 461 462 void eth_em_tx_init(struct rte_eth_dev *dev); 463 464 uint16_t eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 465 uint16_t nb_pkts); 466 467 uint16_t eth_em_prep_pkts(void *txq, struct rte_mbuf **tx_pkts, 468 uint16_t nb_pkts); 469 470 uint16_t eth_em_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, 471 uint16_t nb_pkts); 472 473 uint16_t eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, 474 uint16_t nb_pkts); 475 476 void em_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 477 struct rte_eth_rxq_info *qinfo); 478 479 void em_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 480 struct rte_eth_txq_info *qinfo); 481 482 void igb_pf_host_uninit(struct rte_eth_dev *dev); 483 484 void igb_filterlist_flush(struct rte_eth_dev *dev); 485 int igb_delete_5tuple_filter_82576(struct rte_eth_dev *dev, 486 struct e1000_5tuple_filter *filter); 487 int igb_delete_2tuple_filter(struct rte_eth_dev *dev, 488 struct e1000_2tuple_filter *filter); 489 void igb_remove_flex_filter(struct rte_eth_dev *dev, 490 struct e1000_flex_filter *filter); 491 int igb_ethertype_filter_remove(struct e1000_filter_info *filter_info, 492 uint8_t idx); 493 int igb_add_del_ntuple_filter(struct rte_eth_dev *dev, 494 struct rte_eth_ntuple_filter *ntuple_filter, bool add); 495 int igb_add_del_ethertype_filter(struct rte_eth_dev *dev, 496 struct rte_eth_ethertype_filter *filter, 497 bool add); 498 int eth_igb_syn_filter_set(struct rte_eth_dev *dev, 499 struct rte_eth_syn_filter *filter, 500 bool add); 501 int eth_igb_add_del_flex_filter(struct rte_eth_dev *dev, 502 struct rte_eth_flex_filter *filter, 503 bool add); 504 int igb_config_rss_filter(struct rte_eth_dev *dev, 505 struct igb_rte_flow_rss_conf *conf, 506 bool add); 507 508 #endif /* _E1000_ETHDEV_H_ */ 509