xref: /dpdk/drivers/net/dpaa2/dpaa2_ethdev.c (revision 70febdcf)
1 /* * SPDX-License-Identifier: BSD-3-Clause
2  *
3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
4  *   Copyright 2016 NXP
5  *
6  */
7 
8 #include <time.h>
9 #include <net/if.h>
10 
11 #include <rte_mbuf.h>
12 #include <rte_ethdev_driver.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
18 #include <rte_dev.h>
19 #include <rte_fslmc.h>
20 #include <rte_flow_driver.h>
21 
22 #include "dpaa2_pmd_logs.h"
23 #include <fslmc_vfio.h>
24 #include <dpaa2_hw_pvt.h>
25 #include <dpaa2_hw_mempool.h>
26 #include <dpaa2_hw_dpio.h>
27 #include <mc/fsl_dpmng.h>
28 #include "dpaa2_ethdev.h"
29 #include <fsl_qbman_debug.h>
30 
31 #define DRIVER_LOOPBACK_MODE "drv_loopback"
32 
33 /* Supported Rx offloads */
34 static uint64_t dev_rx_offloads_sup =
35 		DEV_RX_OFFLOAD_VLAN_STRIP |
36 		DEV_RX_OFFLOAD_IPV4_CKSUM |
37 		DEV_RX_OFFLOAD_UDP_CKSUM |
38 		DEV_RX_OFFLOAD_TCP_CKSUM |
39 		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
40 		DEV_RX_OFFLOAD_VLAN_FILTER |
41 		DEV_RX_OFFLOAD_JUMBO_FRAME;
42 
43 /* Rx offloads which cannot be disabled */
44 static uint64_t dev_rx_offloads_nodis =
45 		DEV_RX_OFFLOAD_SCATTER;
46 
47 /* Supported Tx offloads */
48 static uint64_t dev_tx_offloads_sup =
49 		DEV_TX_OFFLOAD_VLAN_INSERT |
50 		DEV_TX_OFFLOAD_IPV4_CKSUM |
51 		DEV_TX_OFFLOAD_UDP_CKSUM |
52 		DEV_TX_OFFLOAD_TCP_CKSUM |
53 		DEV_TX_OFFLOAD_SCTP_CKSUM |
54 		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
55 
56 /* Tx offloads which cannot be disabled */
57 static uint64_t dev_tx_offloads_nodis =
58 		DEV_TX_OFFLOAD_MULTI_SEGS |
59 		DEV_TX_OFFLOAD_MT_LOCKFREE |
60 		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
61 
62 /* enable timestamp in mbuf */
63 enum pmd_dpaa2_ts dpaa2_enable_ts;
64 
65 struct rte_dpaa2_xstats_name_off {
66 	char name[RTE_ETH_XSTATS_NAME_SIZE];
67 	uint8_t page_id; /* dpni statistics page id */
68 	uint8_t stats_id; /* stats id in the given page */
69 };
70 
71 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
72 	{"ingress_multicast_frames", 0, 2},
73 	{"ingress_multicast_bytes", 0, 3},
74 	{"ingress_broadcast_frames", 0, 4},
75 	{"ingress_broadcast_bytes", 0, 5},
76 	{"egress_multicast_frames", 1, 2},
77 	{"egress_multicast_bytes", 1, 3},
78 	{"egress_broadcast_frames", 1, 4},
79 	{"egress_broadcast_bytes", 1, 5},
80 	{"ingress_filtered_frames", 2, 0},
81 	{"ingress_discarded_frames", 2, 1},
82 	{"ingress_nobuffer_discards", 2, 2},
83 	{"egress_discarded_frames", 2, 3},
84 	{"egress_confirmed_frames", 2, 4},
85 };
86 
87 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
88 	RTE_ETH_FILTER_ADD,
89 	RTE_ETH_FILTER_DELETE,
90 	RTE_ETH_FILTER_UPDATE,
91 	RTE_ETH_FILTER_FLUSH,
92 	RTE_ETH_FILTER_GET
93 };
94 
95 static struct rte_dpaa2_driver rte_dpaa2_pmd;
96 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
97 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
98 				 int wait_to_complete);
99 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
100 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
101 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
102 
103 int dpaa2_logtype_pmd;
104 
105 void
106 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
107 {
108 	dpaa2_enable_ts = enable;
109 }
110 
111 static int
112 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
113 {
114 	int ret;
115 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
116 	struct fsl_mc_io *dpni = priv->hw;
117 
118 	PMD_INIT_FUNC_TRACE();
119 
120 	if (dpni == NULL) {
121 		DPAA2_PMD_ERR("dpni is NULL");
122 		return -1;
123 	}
124 
125 	if (on)
126 		ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
127 				       priv->token, vlan_id);
128 	else
129 		ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
130 					  priv->token, vlan_id);
131 
132 	if (ret < 0)
133 		DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
134 			      ret, vlan_id, priv->hw_id);
135 
136 	return ret;
137 }
138 
139 static int
140 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
141 {
142 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
143 	struct fsl_mc_io *dpni = priv->hw;
144 	int ret;
145 
146 	PMD_INIT_FUNC_TRACE();
147 
148 	if (mask & ETH_VLAN_FILTER_MASK) {
149 		/* VLAN Filter not avaialble */
150 		if (!priv->max_vlan_filters) {
151 			DPAA2_PMD_INFO("VLAN filter not available");
152 			goto next_mask;
153 		}
154 
155 		if (dev->data->dev_conf.rxmode.offloads &
156 			DEV_RX_OFFLOAD_VLAN_FILTER)
157 			ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
158 						      priv->token, true);
159 		else
160 			ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
161 						      priv->token, false);
162 		if (ret < 0)
163 			DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
164 	}
165 next_mask:
166 	if (mask & ETH_VLAN_EXTEND_MASK) {
167 		if (dev->data->dev_conf.rxmode.offloads &
168 			DEV_RX_OFFLOAD_VLAN_EXTEND)
169 			DPAA2_PMD_INFO("VLAN extend offload not supported");
170 	}
171 
172 	return 0;
173 }
174 
175 static int
176 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
177 		      enum rte_vlan_type vlan_type __rte_unused,
178 		      uint16_t tpid)
179 {
180 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
181 	struct fsl_mc_io *dpni = priv->hw;
182 	int ret = -ENOTSUP;
183 
184 	PMD_INIT_FUNC_TRACE();
185 
186 	/* nothing to be done for standard vlan tpids */
187 	if (tpid == 0x8100 || tpid == 0x88A8)
188 		return 0;
189 
190 	ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
191 				   priv->token, tpid);
192 	if (ret < 0)
193 		DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
194 	/* if already configured tpids, remove them first */
195 	if (ret == -EBUSY) {
196 		struct dpni_custom_tpid_cfg tpid_list = {0};
197 
198 		ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
199 				   priv->token, &tpid_list);
200 		if (ret < 0)
201 			goto fail;
202 		ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
203 				   priv->token, tpid_list.tpid1);
204 		if (ret < 0)
205 			goto fail;
206 		ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
207 					   priv->token, tpid);
208 	}
209 fail:
210 	return ret;
211 }
212 
213 static int
214 dpaa2_fw_version_get(struct rte_eth_dev *dev,
215 		     char *fw_version,
216 		     size_t fw_size)
217 {
218 	int ret;
219 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
220 	struct fsl_mc_io *dpni = priv->hw;
221 	struct mc_soc_version mc_plat_info = {0};
222 	struct mc_version mc_ver_info = {0};
223 
224 	PMD_INIT_FUNC_TRACE();
225 
226 	if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
227 		DPAA2_PMD_WARN("\tmc_get_soc_version failed");
228 
229 	if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
230 		DPAA2_PMD_WARN("\tmc_get_version failed");
231 
232 	ret = snprintf(fw_version, fw_size,
233 		       "%x-%d.%d.%d",
234 		       mc_plat_info.svr,
235 		       mc_ver_info.major,
236 		       mc_ver_info.minor,
237 		       mc_ver_info.revision);
238 
239 	ret += 1; /* add the size of '\0' */
240 	if (fw_size < (uint32_t)ret)
241 		return ret;
242 	else
243 		return 0;
244 }
245 
246 static int
247 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
248 {
249 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
250 
251 	PMD_INIT_FUNC_TRACE();
252 
253 	dev_info->if_index = priv->hw_id;
254 
255 	dev_info->max_mac_addrs = priv->max_mac_filters;
256 	dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
257 	dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
258 	dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
259 	dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
260 	dev_info->rx_offload_capa = dev_rx_offloads_sup |
261 					dev_rx_offloads_nodis;
262 	dev_info->tx_offload_capa = dev_tx_offloads_sup |
263 					dev_tx_offloads_nodis;
264 	dev_info->speed_capa = ETH_LINK_SPEED_1G |
265 			ETH_LINK_SPEED_2_5G |
266 			ETH_LINK_SPEED_10G;
267 
268 	dev_info->max_hash_mac_addrs = 0;
269 	dev_info->max_vfs = 0;
270 	dev_info->max_vmdq_pools = ETH_16_POOLS;
271 	dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
272 
273 	return 0;
274 }
275 
276 static int
277 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
278 {
279 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
280 	uint16_t dist_idx;
281 	uint32_t vq_id;
282 	uint8_t num_rxqueue_per_tc;
283 	struct dpaa2_queue *mc_q, *mcq;
284 	uint32_t tot_queues;
285 	int i;
286 	struct dpaa2_queue *dpaa2_q;
287 
288 	PMD_INIT_FUNC_TRACE();
289 
290 	num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
291 	tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
292 	mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
293 			  RTE_CACHE_LINE_SIZE);
294 	if (!mc_q) {
295 		DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
296 		return -1;
297 	}
298 
299 	for (i = 0; i < priv->nb_rx_queues; i++) {
300 		mc_q->eth_data = dev->data;
301 		priv->rx_vq[i] = mc_q++;
302 		dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
303 		dpaa2_q->q_storage = rte_malloc("dq_storage",
304 					sizeof(struct queue_storage_info_t),
305 					RTE_CACHE_LINE_SIZE);
306 		if (!dpaa2_q->q_storage)
307 			goto fail;
308 
309 		memset(dpaa2_q->q_storage, 0,
310 		       sizeof(struct queue_storage_info_t));
311 		if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
312 			goto fail;
313 	}
314 
315 	for (i = 0; i < priv->nb_tx_queues; i++) {
316 		mc_q->eth_data = dev->data;
317 		mc_q->flow_id = 0xffff;
318 		priv->tx_vq[i] = mc_q++;
319 		dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
320 		dpaa2_q->cscn = rte_malloc(NULL,
321 					   sizeof(struct qbman_result), 16);
322 		if (!dpaa2_q->cscn)
323 			goto fail_tx;
324 	}
325 
326 	vq_id = 0;
327 	for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
328 		mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
329 		mcq->tc_index = dist_idx / num_rxqueue_per_tc;
330 		mcq->flow_id = dist_idx % num_rxqueue_per_tc;
331 		vq_id++;
332 	}
333 
334 	return 0;
335 fail_tx:
336 	i -= 1;
337 	while (i >= 0) {
338 		dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
339 		rte_free(dpaa2_q->cscn);
340 		priv->tx_vq[i--] = NULL;
341 	}
342 	i = priv->nb_rx_queues;
343 fail:
344 	i -= 1;
345 	mc_q = priv->rx_vq[0];
346 	while (i >= 0) {
347 		dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
348 		dpaa2_free_dq_storage(dpaa2_q->q_storage);
349 		rte_free(dpaa2_q->q_storage);
350 		priv->rx_vq[i--] = NULL;
351 	}
352 	rte_free(mc_q);
353 	return -1;
354 }
355 
356 static void
357 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
358 {
359 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
360 	struct dpaa2_queue *dpaa2_q;
361 	int i;
362 
363 	PMD_INIT_FUNC_TRACE();
364 
365 	/* Queue allocation base */
366 	if (priv->rx_vq[0]) {
367 		/* cleaning up queue storage */
368 		for (i = 0; i < priv->nb_rx_queues; i++) {
369 			dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
370 			if (dpaa2_q->q_storage)
371 				rte_free(dpaa2_q->q_storage);
372 		}
373 		/* cleanup tx queue cscn */
374 		for (i = 0; i < priv->nb_tx_queues; i++) {
375 			dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
376 			rte_free(dpaa2_q->cscn);
377 		}
378 		/*free memory for all queues (RX+TX) */
379 		rte_free(priv->rx_vq[0]);
380 		priv->rx_vq[0] = NULL;
381 	}
382 }
383 
384 static int
385 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
386 {
387 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
388 	struct fsl_mc_io *dpni = priv->hw;
389 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
390 	uint64_t rx_offloads = eth_conf->rxmode.offloads;
391 	uint64_t tx_offloads = eth_conf->txmode.offloads;
392 	int rx_l3_csum_offload = false;
393 	int rx_l4_csum_offload = false;
394 	int tx_l3_csum_offload = false;
395 	int tx_l4_csum_offload = false;
396 	int ret;
397 
398 	PMD_INIT_FUNC_TRACE();
399 
400 	/* Rx offloads validation */
401 	if (dev_rx_offloads_nodis & ~rx_offloads) {
402 		DPAA2_PMD_WARN(
403 		"Rx offloads non configurable - requested 0x%" PRIx64
404 		" ignored 0x%" PRIx64,
405 			rx_offloads, dev_rx_offloads_nodis);
406 	}
407 
408 	/* Tx offloads validation */
409 	if (dev_tx_offloads_nodis & ~tx_offloads) {
410 		DPAA2_PMD_WARN(
411 		"Tx offloads non configurable - requested 0x%" PRIx64
412 		" ignored 0x%" PRIx64,
413 			tx_offloads, dev_tx_offloads_nodis);
414 	}
415 
416 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
417 		if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
418 			ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
419 				priv->token, eth_conf->rxmode.max_rx_pkt_len);
420 			if (ret) {
421 				DPAA2_PMD_ERR(
422 					"Unable to set mtu. check config");
423 				return ret;
424 			}
425 		} else {
426 			return -1;
427 		}
428 	}
429 
430 	if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
431 		ret = dpaa2_setup_flow_dist(dev,
432 				eth_conf->rx_adv_conf.rss_conf.rss_hf);
433 		if (ret) {
434 			DPAA2_PMD_ERR("Unable to set flow distribution."
435 				      "Check queue config");
436 			return ret;
437 		}
438 	}
439 
440 	if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
441 		rx_l3_csum_offload = true;
442 
443 	if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
444 		(rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
445 		rx_l4_csum_offload = true;
446 
447 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
448 			       DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
449 	if (ret) {
450 		DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
451 		return ret;
452 	}
453 
454 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
455 			       DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
456 	if (ret) {
457 		DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
458 		return ret;
459 	}
460 
461 	if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
462 		tx_l3_csum_offload = true;
463 
464 	if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
465 		(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
466 		(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
467 		tx_l4_csum_offload = true;
468 
469 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
470 			       DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
471 	if (ret) {
472 		DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
473 		return ret;
474 	}
475 
476 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
477 			       DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
478 	if (ret) {
479 		DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
480 		return ret;
481 	}
482 
483 	/* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
484 	 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
485 	 * to 0 for LS2 in the hardware thus disabling data/annotation
486 	 * stashing. For LX2 this is fixed in hardware and thus hash result and
487 	 * parse results can be received in FD using this option.
488 	 */
489 	if (dpaa2_svr_family == SVR_LX2160A) {
490 		ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
491 				       DPNI_FLCTYPE_HASH, true);
492 		if (ret) {
493 			DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
494 			return ret;
495 		}
496 	}
497 
498 	if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
499 		dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
500 
501 	/* update the current status */
502 	dpaa2_dev_link_update(dev, 0);
503 
504 	return 0;
505 }
506 
507 /* Function to setup RX flow information. It contains traffic class ID,
508  * flow ID, destination configuration etc.
509  */
510 static int
511 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
512 			 uint16_t rx_queue_id,
513 			 uint16_t nb_rx_desc __rte_unused,
514 			 unsigned int socket_id __rte_unused,
515 			 const struct rte_eth_rxconf *rx_conf __rte_unused,
516 			 struct rte_mempool *mb_pool)
517 {
518 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
519 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
520 	struct dpaa2_queue *dpaa2_q;
521 	struct dpni_queue cfg;
522 	uint8_t options = 0;
523 	uint8_t flow_id;
524 	uint32_t bpid;
525 	int ret;
526 
527 	PMD_INIT_FUNC_TRACE();
528 
529 	DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
530 			dev, rx_queue_id, mb_pool, rx_conf);
531 
532 	if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
533 		bpid = mempool_to_bpid(mb_pool);
534 		ret = dpaa2_attach_bp_list(priv,
535 					   rte_dpaa2_bpid_info[bpid].bp_list);
536 		if (ret)
537 			return ret;
538 	}
539 	dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
540 	dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
541 	dpaa2_q->bp_array = rte_dpaa2_bpid_info;
542 
543 	/*Get the flow id from given VQ id*/
544 	flow_id = rx_queue_id % priv->nb_rx_queues;
545 	memset(&cfg, 0, sizeof(struct dpni_queue));
546 
547 	options = options | DPNI_QUEUE_OPT_USER_CTX;
548 	cfg.user_context = (size_t)(dpaa2_q);
549 
550 	/*if ls2088 or rev2 device, enable the stashing */
551 
552 	if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
553 		options |= DPNI_QUEUE_OPT_FLC;
554 		cfg.flc.stash_control = true;
555 		cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
556 		/* 00 00 00 - last 6 bit represent annotation, context stashing,
557 		 * data stashing setting 01 01 00 (0x14)
558 		 * (in following order ->DS AS CS)
559 		 * to enable 1 line data, 1 line annotation.
560 		 * For LX2, this setting should be 01 00 00 (0x10)
561 		 */
562 		if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
563 			cfg.flc.value |= 0x10;
564 		else
565 			cfg.flc.value |= 0x14;
566 	}
567 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
568 			     dpaa2_q->tc_index, flow_id, options, &cfg);
569 	if (ret) {
570 		DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
571 		return -1;
572 	}
573 
574 	if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
575 		struct dpni_taildrop taildrop;
576 
577 		taildrop.enable = 1;
578 		/*enabling per rx queue congestion control */
579 		taildrop.threshold = CONG_THRESHOLD_RX_Q;
580 		taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
581 		taildrop.oal = CONG_RX_OAL;
582 		DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
583 				rx_queue_id);
584 		ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
585 					DPNI_CP_QUEUE, DPNI_QUEUE_RX,
586 					dpaa2_q->tc_index, flow_id, &taildrop);
587 		if (ret) {
588 			DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
589 				      ret);
590 			return -1;
591 		}
592 	}
593 
594 	dev->data->rx_queues[rx_queue_id] = dpaa2_q;
595 	return 0;
596 }
597 
598 static int
599 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
600 			 uint16_t tx_queue_id,
601 			 uint16_t nb_tx_desc __rte_unused,
602 			 unsigned int socket_id __rte_unused,
603 			 const struct rte_eth_txconf *tx_conf __rte_unused)
604 {
605 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
606 	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
607 		priv->tx_vq[tx_queue_id];
608 	struct fsl_mc_io *dpni = priv->hw;
609 	struct dpni_queue tx_conf_cfg;
610 	struct dpni_queue tx_flow_cfg;
611 	uint8_t options = 0, flow_id;
612 	uint32_t tc_id;
613 	int ret;
614 
615 	PMD_INIT_FUNC_TRACE();
616 
617 	/* Return if queue already configured */
618 	if (dpaa2_q->flow_id != 0xffff) {
619 		dev->data->tx_queues[tx_queue_id] = dpaa2_q;
620 		return 0;
621 	}
622 
623 	memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
624 	memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
625 
626 	tc_id = tx_queue_id;
627 	flow_id = 0;
628 
629 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
630 			     tc_id, flow_id, options, &tx_flow_cfg);
631 	if (ret) {
632 		DPAA2_PMD_ERR("Error in setting the tx flow: "
633 			      "tc_id=%d, flow=%d err=%d",
634 			      tc_id, flow_id, ret);
635 			return -1;
636 	}
637 
638 	dpaa2_q->flow_id = flow_id;
639 
640 	if (tx_queue_id == 0) {
641 		/*Set tx-conf and error configuration*/
642 		ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
643 						    priv->token,
644 						    DPNI_CONF_DISABLE);
645 		if (ret) {
646 			DPAA2_PMD_ERR("Error in set tx conf mode settings: "
647 				      "err=%d", ret);
648 			return -1;
649 		}
650 	}
651 	dpaa2_q->tc_index = tc_id;
652 
653 	if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
654 		struct dpni_congestion_notification_cfg cong_notif_cfg;
655 
656 		cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
657 		cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
658 		/* Notify that the queue is not congested when the data in
659 		 * the queue is below this thershold.
660 		 */
661 		cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
662 		cong_notif_cfg.message_ctx = 0;
663 		cong_notif_cfg.message_iova =
664 				(size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
665 		cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
666 		cong_notif_cfg.notification_mode =
667 					 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
668 					 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
669 					 DPNI_CONG_OPT_COHERENT_WRITE;
670 		cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
671 
672 		ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
673 						       priv->token,
674 						       DPNI_QUEUE_TX,
675 						       tc_id,
676 						       &cong_notif_cfg);
677 		if (ret) {
678 			DPAA2_PMD_ERR(
679 			   "Error in setting tx congestion notification: "
680 			   "err=%d", ret);
681 			return -ret;
682 		}
683 	}
684 	dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
685 	dev->data->tx_queues[tx_queue_id] = dpaa2_q;
686 	return 0;
687 }
688 
689 static void
690 dpaa2_dev_rx_queue_release(void *q __rte_unused)
691 {
692 	PMD_INIT_FUNC_TRACE();
693 }
694 
695 static void
696 dpaa2_dev_tx_queue_release(void *q __rte_unused)
697 {
698 	PMD_INIT_FUNC_TRACE();
699 }
700 
701 static uint32_t
702 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
703 {
704 	int32_t ret;
705 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
706 	struct dpaa2_queue *dpaa2_q;
707 	struct qbman_swp *swp;
708 	struct qbman_fq_query_np_rslt state;
709 	uint32_t frame_cnt = 0;
710 
711 	PMD_INIT_FUNC_TRACE();
712 
713 	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
714 		ret = dpaa2_affine_qbman_swp();
715 		if (ret) {
716 			DPAA2_PMD_ERR("Failure in affining portal");
717 			return -EINVAL;
718 		}
719 	}
720 	swp = DPAA2_PER_LCORE_PORTAL;
721 
722 	dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
723 
724 	if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
725 		frame_cnt = qbman_fq_state_frame_count(&state);
726 		DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
727 				rx_queue_id, frame_cnt);
728 	}
729 	return frame_cnt;
730 }
731 
732 static const uint32_t *
733 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
734 {
735 	static const uint32_t ptypes[] = {
736 		/*todo -= add more types */
737 		RTE_PTYPE_L2_ETHER,
738 		RTE_PTYPE_L3_IPV4,
739 		RTE_PTYPE_L3_IPV4_EXT,
740 		RTE_PTYPE_L3_IPV6,
741 		RTE_PTYPE_L3_IPV6_EXT,
742 		RTE_PTYPE_L4_TCP,
743 		RTE_PTYPE_L4_UDP,
744 		RTE_PTYPE_L4_SCTP,
745 		RTE_PTYPE_L4_ICMP,
746 		RTE_PTYPE_UNKNOWN
747 	};
748 
749 	if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
750 		dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
751 		return ptypes;
752 	return NULL;
753 }
754 
755 /**
756  * Dpaa2 link Interrupt handler
757  *
758  * @param param
759  *  The address of parameter (struct rte_eth_dev *) regsitered before.
760  *
761  * @return
762  *  void
763  */
764 static void
765 dpaa2_interrupt_handler(void *param)
766 {
767 	struct rte_eth_dev *dev = param;
768 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
769 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
770 	int ret;
771 	int irq_index = DPNI_IRQ_INDEX;
772 	unsigned int status = 0, clear = 0;
773 
774 	PMD_INIT_FUNC_TRACE();
775 
776 	if (dpni == NULL) {
777 		DPAA2_PMD_ERR("dpni is NULL");
778 		return;
779 	}
780 
781 	ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
782 				  irq_index, &status);
783 	if (unlikely(ret)) {
784 		DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
785 		clear = 0xffffffff;
786 		goto out;
787 	}
788 
789 	if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
790 		clear = DPNI_IRQ_EVENT_LINK_CHANGED;
791 		dpaa2_dev_link_update(dev, 0);
792 		/* calling all the apps registered for link status event */
793 		_rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
794 					      NULL);
795 	}
796 out:
797 	ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
798 				    irq_index, clear);
799 	if (unlikely(ret))
800 		DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
801 }
802 
803 static int
804 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
805 {
806 	int err = 0;
807 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
808 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
809 	int irq_index = DPNI_IRQ_INDEX;
810 	unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
811 
812 	PMD_INIT_FUNC_TRACE();
813 
814 	err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
815 				irq_index, mask);
816 	if (err < 0) {
817 		DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
818 			      strerror(-err));
819 		return err;
820 	}
821 
822 	err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
823 				  irq_index, enable);
824 	if (err < 0)
825 		DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
826 			      strerror(-err));
827 
828 	return err;
829 }
830 
831 static int
832 dpaa2_dev_start(struct rte_eth_dev *dev)
833 {
834 	struct rte_device *rdev = dev->device;
835 	struct rte_dpaa2_device *dpaa2_dev;
836 	struct rte_eth_dev_data *data = dev->data;
837 	struct dpaa2_dev_priv *priv = data->dev_private;
838 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
839 	struct dpni_queue cfg;
840 	struct dpni_error_cfg	err_cfg;
841 	uint16_t qdid;
842 	struct dpni_queue_id qid;
843 	struct dpaa2_queue *dpaa2_q;
844 	int ret, i;
845 	struct rte_intr_handle *intr_handle;
846 
847 	dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
848 	intr_handle = &dpaa2_dev->intr_handle;
849 
850 	PMD_INIT_FUNC_TRACE();
851 
852 	ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
853 	if (ret) {
854 		DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
855 			      priv->hw_id, ret);
856 		return ret;
857 	}
858 
859 	/* Power up the phy. Needed to make the link go UP */
860 	dpaa2_dev_set_link_up(dev);
861 
862 	ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
863 			    DPNI_QUEUE_TX, &qdid);
864 	if (ret) {
865 		DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
866 		return ret;
867 	}
868 	priv->qdid = qdid;
869 
870 	for (i = 0; i < data->nb_rx_queues; i++) {
871 		dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
872 		ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
873 				     DPNI_QUEUE_RX, dpaa2_q->tc_index,
874 				       dpaa2_q->flow_id, &cfg, &qid);
875 		if (ret) {
876 			DPAA2_PMD_ERR("Error in getting flow information: "
877 				      "err=%d", ret);
878 			return ret;
879 		}
880 		dpaa2_q->fqid = qid.fqid;
881 	}
882 
883 	/*checksum errors, send them to normal path and set it in annotation */
884 	err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
885 	err_cfg.errors |= DPNI_ERROR_PHE;
886 
887 	err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
888 	err_cfg.set_frame_annotation = true;
889 
890 	ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
891 				       priv->token, &err_cfg);
892 	if (ret) {
893 		DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
894 			      ret);
895 		return ret;
896 	}
897 
898 	/* if the interrupts were configured on this devices*/
899 	if (intr_handle && (intr_handle->fd) &&
900 	    (dev->data->dev_conf.intr_conf.lsc != 0)) {
901 		/* Registering LSC interrupt handler */
902 		rte_intr_callback_register(intr_handle,
903 					   dpaa2_interrupt_handler,
904 					   (void *)dev);
905 
906 		/* enable vfio intr/eventfd mapping
907 		 * Interrupt index 0 is required, so we can not use
908 		 * rte_intr_enable.
909 		 */
910 		rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
911 
912 		/* enable dpni_irqs */
913 		dpaa2_eth_setup_irqs(dev, 1);
914 	}
915 
916 	/* Change the tx burst function if ordered queues are used */
917 	if (priv->en_ordered)
918 		dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
919 
920 	return 0;
921 }
922 
923 /**
924  *  This routine disables all traffic on the adapter by issuing a
925  *  global reset on the MAC.
926  */
927 static void
928 dpaa2_dev_stop(struct rte_eth_dev *dev)
929 {
930 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
931 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
932 	int ret;
933 	struct rte_eth_link link;
934 	struct rte_intr_handle *intr_handle = dev->intr_handle;
935 
936 	PMD_INIT_FUNC_TRACE();
937 
938 	/* reset interrupt callback  */
939 	if (intr_handle && (intr_handle->fd) &&
940 	    (dev->data->dev_conf.intr_conf.lsc != 0)) {
941 		/*disable dpni irqs */
942 		dpaa2_eth_setup_irqs(dev, 0);
943 
944 		/* disable vfio intr before callback unregister */
945 		rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
946 
947 		/* Unregistering LSC interrupt handler */
948 		rte_intr_callback_unregister(intr_handle,
949 					     dpaa2_interrupt_handler,
950 					     (void *)dev);
951 	}
952 
953 	dpaa2_dev_set_link_down(dev);
954 
955 	ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
956 	if (ret) {
957 		DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
958 			      ret, priv->hw_id);
959 		return;
960 	}
961 
962 	/* clear the recorded link status */
963 	memset(&link, 0, sizeof(link));
964 	rte_eth_linkstatus_set(dev, &link);
965 }
966 
967 static void
968 dpaa2_dev_close(struct rte_eth_dev *dev)
969 {
970 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
971 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
972 	int ret;
973 	struct rte_eth_link link;
974 
975 	PMD_INIT_FUNC_TRACE();
976 
977 	dpaa2_flow_clean(dev);
978 
979 	/* Clean the device first */
980 	ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
981 	if (ret) {
982 		DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
983 		return;
984 	}
985 
986 	memset(&link, 0, sizeof(link));
987 	rte_eth_linkstatus_set(dev, &link);
988 }
989 
990 static int
991 dpaa2_dev_promiscuous_enable(
992 		struct rte_eth_dev *dev)
993 {
994 	int ret;
995 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
996 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
997 
998 	PMD_INIT_FUNC_TRACE();
999 
1000 	if (dpni == NULL) {
1001 		DPAA2_PMD_ERR("dpni is NULL");
1002 		return -ENODEV;
1003 	}
1004 
1005 	ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1006 	if (ret < 0)
1007 		DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1008 
1009 	ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1010 	if (ret < 0)
1011 		DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1012 
1013 	return ret;
1014 }
1015 
1016 static int
1017 dpaa2_dev_promiscuous_disable(
1018 		struct rte_eth_dev *dev)
1019 {
1020 	int ret;
1021 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1022 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1023 
1024 	PMD_INIT_FUNC_TRACE();
1025 
1026 	if (dpni == NULL) {
1027 		DPAA2_PMD_ERR("dpni is NULL");
1028 		return -ENODEV;
1029 	}
1030 
1031 	ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1032 	if (ret < 0)
1033 		DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1034 
1035 	if (dev->data->all_multicast == 0) {
1036 		ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1037 						 priv->token, false);
1038 		if (ret < 0)
1039 			DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1040 				      ret);
1041 	}
1042 
1043 	return ret;
1044 }
1045 
1046 static void
1047 dpaa2_dev_allmulticast_enable(
1048 		struct rte_eth_dev *dev)
1049 {
1050 	int ret;
1051 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1052 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1053 
1054 	PMD_INIT_FUNC_TRACE();
1055 
1056 	if (dpni == NULL) {
1057 		DPAA2_PMD_ERR("dpni is NULL");
1058 		return;
1059 	}
1060 
1061 	ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1062 	if (ret < 0)
1063 		DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1064 }
1065 
1066 static void
1067 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1068 {
1069 	int ret;
1070 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1071 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1072 
1073 	PMD_INIT_FUNC_TRACE();
1074 
1075 	if (dpni == NULL) {
1076 		DPAA2_PMD_ERR("dpni is NULL");
1077 		return;
1078 	}
1079 
1080 	/* must remain on for all promiscuous */
1081 	if (dev->data->promiscuous == 1)
1082 		return;
1083 
1084 	ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1085 	if (ret < 0)
1086 		DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1087 }
1088 
1089 static int
1090 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1091 {
1092 	int ret;
1093 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1094 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1095 	uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1096 				+ VLAN_TAG_SIZE;
1097 
1098 	PMD_INIT_FUNC_TRACE();
1099 
1100 	if (dpni == NULL) {
1101 		DPAA2_PMD_ERR("dpni is NULL");
1102 		return -EINVAL;
1103 	}
1104 
1105 	/* check that mtu is within the allowed range */
1106 	if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1107 		return -EINVAL;
1108 
1109 	if (frame_size > RTE_ETHER_MAX_LEN)
1110 		dev->data->dev_conf.rxmode.offloads &=
1111 						DEV_RX_OFFLOAD_JUMBO_FRAME;
1112 	else
1113 		dev->data->dev_conf.rxmode.offloads &=
1114 						~DEV_RX_OFFLOAD_JUMBO_FRAME;
1115 
1116 	dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1117 
1118 	/* Set the Max Rx frame length as 'mtu' +
1119 	 * Maximum Ethernet header length
1120 	 */
1121 	ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1122 					frame_size);
1123 	if (ret) {
1124 		DPAA2_PMD_ERR("Setting the max frame length failed");
1125 		return -1;
1126 	}
1127 	DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1128 	return 0;
1129 }
1130 
1131 static int
1132 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1133 		       struct rte_ether_addr *addr,
1134 		       __rte_unused uint32_t index,
1135 		       __rte_unused uint32_t pool)
1136 {
1137 	int ret;
1138 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1139 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1140 
1141 	PMD_INIT_FUNC_TRACE();
1142 
1143 	if (dpni == NULL) {
1144 		DPAA2_PMD_ERR("dpni is NULL");
1145 		return -1;
1146 	}
1147 
1148 	ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1149 				priv->token, addr->addr_bytes);
1150 	if (ret)
1151 		DPAA2_PMD_ERR(
1152 			"error: Adding the MAC ADDR failed: err = %d", ret);
1153 	return 0;
1154 }
1155 
1156 static void
1157 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1158 			  uint32_t index)
1159 {
1160 	int ret;
1161 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1162 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1163 	struct rte_eth_dev_data *data = dev->data;
1164 	struct rte_ether_addr *macaddr;
1165 
1166 	PMD_INIT_FUNC_TRACE();
1167 
1168 	macaddr = &data->mac_addrs[index];
1169 
1170 	if (dpni == NULL) {
1171 		DPAA2_PMD_ERR("dpni is NULL");
1172 		return;
1173 	}
1174 
1175 	ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1176 				   priv->token, macaddr->addr_bytes);
1177 	if (ret)
1178 		DPAA2_PMD_ERR(
1179 			"error: Removing the MAC ADDR failed: err = %d", ret);
1180 }
1181 
1182 static int
1183 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1184 		       struct rte_ether_addr *addr)
1185 {
1186 	int ret;
1187 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1188 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1189 
1190 	PMD_INIT_FUNC_TRACE();
1191 
1192 	if (dpni == NULL) {
1193 		DPAA2_PMD_ERR("dpni is NULL");
1194 		return -EINVAL;
1195 	}
1196 
1197 	ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1198 					priv->token, addr->addr_bytes);
1199 
1200 	if (ret)
1201 		DPAA2_PMD_ERR(
1202 			"error: Setting the MAC ADDR failed %d", ret);
1203 
1204 	return ret;
1205 }
1206 
1207 static
1208 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1209 			 struct rte_eth_stats *stats)
1210 {
1211 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1212 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1213 	int32_t  retcode;
1214 	uint8_t page0 = 0, page1 = 1, page2 = 2;
1215 	union dpni_statistics value;
1216 	int i;
1217 	struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1218 
1219 	memset(&value, 0, sizeof(union dpni_statistics));
1220 
1221 	PMD_INIT_FUNC_TRACE();
1222 
1223 	if (!dpni) {
1224 		DPAA2_PMD_ERR("dpni is NULL");
1225 		return -EINVAL;
1226 	}
1227 
1228 	if (!stats) {
1229 		DPAA2_PMD_ERR("stats is NULL");
1230 		return -EINVAL;
1231 	}
1232 
1233 	/*Get Counters from page_0*/
1234 	retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1235 				      page0, 0, &value);
1236 	if (retcode)
1237 		goto err;
1238 
1239 	stats->ipackets = value.page_0.ingress_all_frames;
1240 	stats->ibytes = value.page_0.ingress_all_bytes;
1241 
1242 	/*Get Counters from page_1*/
1243 	retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1244 				      page1, 0, &value);
1245 	if (retcode)
1246 		goto err;
1247 
1248 	stats->opackets = value.page_1.egress_all_frames;
1249 	stats->obytes = value.page_1.egress_all_bytes;
1250 
1251 	/*Get Counters from page_2*/
1252 	retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1253 				      page2, 0, &value);
1254 	if (retcode)
1255 		goto err;
1256 
1257 	/* Ingress drop frame count due to configured rules */
1258 	stats->ierrors = value.page_2.ingress_filtered_frames;
1259 	/* Ingress drop frame count due to error */
1260 	stats->ierrors += value.page_2.ingress_discarded_frames;
1261 
1262 	stats->oerrors = value.page_2.egress_discarded_frames;
1263 	stats->imissed = value.page_2.ingress_nobuffer_discards;
1264 
1265 	/* Fill in per queue stats */
1266 	for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1267 		(i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1268 		dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1269 		dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1270 		if (dpaa2_rxq)
1271 			stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1272 		if (dpaa2_txq)
1273 			stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1274 
1275 		/* Byte counting is not implemented */
1276 		stats->q_ibytes[i]   = 0;
1277 		stats->q_obytes[i]   = 0;
1278 	}
1279 
1280 	return 0;
1281 
1282 err:
1283 	DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1284 	return retcode;
1285 };
1286 
1287 static int
1288 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1289 		     unsigned int n)
1290 {
1291 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1292 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1293 	int32_t  retcode;
1294 	union dpni_statistics value[3] = {};
1295 	unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1296 
1297 	if (n < num)
1298 		return num;
1299 
1300 	if (xstats == NULL)
1301 		return 0;
1302 
1303 	/* Get Counters from page_0*/
1304 	retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1305 				      0, 0, &value[0]);
1306 	if (retcode)
1307 		goto err;
1308 
1309 	/* Get Counters from page_1*/
1310 	retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1311 				      1, 0, &value[1]);
1312 	if (retcode)
1313 		goto err;
1314 
1315 	/* Get Counters from page_2*/
1316 	retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1317 				      2, 0, &value[2]);
1318 	if (retcode)
1319 		goto err;
1320 
1321 	for (i = 0; i < num; i++) {
1322 		xstats[i].id = i;
1323 		xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1324 			raw.counter[dpaa2_xstats_strings[i].stats_id];
1325 	}
1326 	return i;
1327 err:
1328 	DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1329 	return retcode;
1330 }
1331 
1332 static int
1333 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1334 		       struct rte_eth_xstat_name *xstats_names,
1335 		       unsigned int limit)
1336 {
1337 	unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1338 
1339 	if (limit < stat_cnt)
1340 		return stat_cnt;
1341 
1342 	if (xstats_names != NULL)
1343 		for (i = 0; i < stat_cnt; i++)
1344 			strlcpy(xstats_names[i].name,
1345 				dpaa2_xstats_strings[i].name,
1346 				sizeof(xstats_names[i].name));
1347 
1348 	return stat_cnt;
1349 }
1350 
1351 static int
1352 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1353 		       uint64_t *values, unsigned int n)
1354 {
1355 	unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1356 	uint64_t values_copy[stat_cnt];
1357 
1358 	if (!ids) {
1359 		struct dpaa2_dev_priv *priv = dev->data->dev_private;
1360 		struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1361 		int32_t  retcode;
1362 		union dpni_statistics value[3] = {};
1363 
1364 		if (n < stat_cnt)
1365 			return stat_cnt;
1366 
1367 		if (!values)
1368 			return 0;
1369 
1370 		/* Get Counters from page_0*/
1371 		retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1372 					      0, 0, &value[0]);
1373 		if (retcode)
1374 			return 0;
1375 
1376 		/* Get Counters from page_1*/
1377 		retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1378 					      1, 0, &value[1]);
1379 		if (retcode)
1380 			return 0;
1381 
1382 		/* Get Counters from page_2*/
1383 		retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1384 					      2, 0, &value[2]);
1385 		if (retcode)
1386 			return 0;
1387 
1388 		for (i = 0; i < stat_cnt; i++) {
1389 			values[i] = value[dpaa2_xstats_strings[i].page_id].
1390 				raw.counter[dpaa2_xstats_strings[i].stats_id];
1391 		}
1392 		return stat_cnt;
1393 	}
1394 
1395 	dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1396 
1397 	for (i = 0; i < n; i++) {
1398 		if (ids[i] >= stat_cnt) {
1399 			DPAA2_PMD_ERR("xstats id value isn't valid");
1400 			return -1;
1401 		}
1402 		values[i] = values_copy[ids[i]];
1403 	}
1404 	return n;
1405 }
1406 
1407 static int
1408 dpaa2_xstats_get_names_by_id(
1409 	struct rte_eth_dev *dev,
1410 	struct rte_eth_xstat_name *xstats_names,
1411 	const uint64_t *ids,
1412 	unsigned int limit)
1413 {
1414 	unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1415 	struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1416 
1417 	if (!ids)
1418 		return dpaa2_xstats_get_names(dev, xstats_names, limit);
1419 
1420 	dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1421 
1422 	for (i = 0; i < limit; i++) {
1423 		if (ids[i] >= stat_cnt) {
1424 			DPAA2_PMD_ERR("xstats id value isn't valid");
1425 			return -1;
1426 		}
1427 		strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1428 	}
1429 	return limit;
1430 }
1431 
1432 static int
1433 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1434 {
1435 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1436 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1437 	int retcode;
1438 	int i;
1439 	struct dpaa2_queue *dpaa2_q;
1440 
1441 	PMD_INIT_FUNC_TRACE();
1442 
1443 	if (dpni == NULL) {
1444 		DPAA2_PMD_ERR("dpni is NULL");
1445 		return -EINVAL;
1446 	}
1447 
1448 	retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1449 	if (retcode)
1450 		goto error;
1451 
1452 	/* Reset the per queue stats in dpaa2_queue structure */
1453 	for (i = 0; i < priv->nb_rx_queues; i++) {
1454 		dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1455 		if (dpaa2_q)
1456 			dpaa2_q->rx_pkts = 0;
1457 	}
1458 
1459 	for (i = 0; i < priv->nb_tx_queues; i++) {
1460 		dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1461 		if (dpaa2_q)
1462 			dpaa2_q->tx_pkts = 0;
1463 	}
1464 
1465 	return 0;
1466 
1467 error:
1468 	DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1469 	return retcode;
1470 };
1471 
1472 /* return 0 means link status changed, -1 means not changed */
1473 static int
1474 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1475 			int wait_to_complete __rte_unused)
1476 {
1477 	int ret;
1478 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1479 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1480 	struct rte_eth_link link;
1481 	struct dpni_link_state state = {0};
1482 
1483 	if (dpni == NULL) {
1484 		DPAA2_PMD_ERR("dpni is NULL");
1485 		return 0;
1486 	}
1487 
1488 	ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1489 	if (ret < 0) {
1490 		DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1491 		return -1;
1492 	}
1493 
1494 	memset(&link, 0, sizeof(struct rte_eth_link));
1495 	link.link_status = state.up;
1496 	link.link_speed = state.rate;
1497 
1498 	if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1499 		link.link_duplex = ETH_LINK_HALF_DUPLEX;
1500 	else
1501 		link.link_duplex = ETH_LINK_FULL_DUPLEX;
1502 
1503 	ret = rte_eth_linkstatus_set(dev, &link);
1504 	if (ret == -1)
1505 		DPAA2_PMD_DEBUG("No change in status");
1506 	else
1507 		DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1508 			       link.link_status ? "Up" : "Down");
1509 
1510 	return ret;
1511 }
1512 
1513 /**
1514  * Toggle the DPNI to enable, if not already enabled.
1515  * This is not strictly PHY up/down - it is more of logical toggling.
1516  */
1517 static int
1518 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1519 {
1520 	int ret = -EINVAL;
1521 	struct dpaa2_dev_priv *priv;
1522 	struct fsl_mc_io *dpni;
1523 	int en = 0;
1524 	struct dpni_link_state state = {0};
1525 
1526 	priv = dev->data->dev_private;
1527 	dpni = (struct fsl_mc_io *)priv->hw;
1528 
1529 	if (dpni == NULL) {
1530 		DPAA2_PMD_ERR("dpni is NULL");
1531 		return ret;
1532 	}
1533 
1534 	/* Check if DPNI is currently enabled */
1535 	ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1536 	if (ret) {
1537 		/* Unable to obtain dpni status; Not continuing */
1538 		DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1539 		return -EINVAL;
1540 	}
1541 
1542 	/* Enable link if not already enabled */
1543 	if (!en) {
1544 		ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1545 		if (ret) {
1546 			DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1547 			return -EINVAL;
1548 		}
1549 	}
1550 	ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1551 	if (ret < 0) {
1552 		DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1553 		return -1;
1554 	}
1555 
1556 	/* changing tx burst function to start enqueues */
1557 	dev->tx_pkt_burst = dpaa2_dev_tx;
1558 	dev->data->dev_link.link_status = state.up;
1559 
1560 	if (state.up)
1561 		DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1562 	else
1563 		DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1564 	return ret;
1565 }
1566 
1567 /**
1568  * Toggle the DPNI to disable, if not already disabled.
1569  * This is not strictly PHY up/down - it is more of logical toggling.
1570  */
1571 static int
1572 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1573 {
1574 	int ret = -EINVAL;
1575 	struct dpaa2_dev_priv *priv;
1576 	struct fsl_mc_io *dpni;
1577 	int dpni_enabled = 0;
1578 	int retries = 10;
1579 
1580 	PMD_INIT_FUNC_TRACE();
1581 
1582 	priv = dev->data->dev_private;
1583 	dpni = (struct fsl_mc_io *)priv->hw;
1584 
1585 	if (dpni == NULL) {
1586 		DPAA2_PMD_ERR("Device has not yet been configured");
1587 		return ret;
1588 	}
1589 
1590 	/*changing  tx burst function to avoid any more enqueues */
1591 	dev->tx_pkt_burst = dummy_dev_tx;
1592 
1593 	/* Loop while dpni_disable() attempts to drain the egress FQs
1594 	 * and confirm them back to us.
1595 	 */
1596 	do {
1597 		ret = dpni_disable(dpni, 0, priv->token);
1598 		if (ret) {
1599 			DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1600 			return ret;
1601 		}
1602 		ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1603 		if (ret) {
1604 			DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1605 			return ret;
1606 		}
1607 		if (dpni_enabled)
1608 			/* Allow the MC some slack */
1609 			rte_delay_us(100 * 1000);
1610 	} while (dpni_enabled && --retries);
1611 
1612 	if (!retries) {
1613 		DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1614 		/* todo- we may have to manually cleanup queues.
1615 		 */
1616 	} else {
1617 		DPAA2_PMD_INFO("Port %d Link DOWN successful",
1618 			       dev->data->port_id);
1619 	}
1620 
1621 	dev->data->dev_link.link_status = 0;
1622 
1623 	return ret;
1624 }
1625 
1626 static int
1627 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1628 {
1629 	int ret = -EINVAL;
1630 	struct dpaa2_dev_priv *priv;
1631 	struct fsl_mc_io *dpni;
1632 	struct dpni_link_state state = {0};
1633 
1634 	PMD_INIT_FUNC_TRACE();
1635 
1636 	priv = dev->data->dev_private;
1637 	dpni = (struct fsl_mc_io *)priv->hw;
1638 
1639 	if (dpni == NULL || fc_conf == NULL) {
1640 		DPAA2_PMD_ERR("device not configured");
1641 		return ret;
1642 	}
1643 
1644 	ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1645 	if (ret) {
1646 		DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1647 		return ret;
1648 	}
1649 
1650 	memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1651 	if (state.options & DPNI_LINK_OPT_PAUSE) {
1652 		/* DPNI_LINK_OPT_PAUSE set
1653 		 *  if ASYM_PAUSE not set,
1654 		 *	RX Side flow control (handle received Pause frame)
1655 		 *	TX side flow control (send Pause frame)
1656 		 *  if ASYM_PAUSE set,
1657 		 *	RX Side flow control (handle received Pause frame)
1658 		 *	No TX side flow control (send Pause frame disabled)
1659 		 */
1660 		if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1661 			fc_conf->mode = RTE_FC_FULL;
1662 		else
1663 			fc_conf->mode = RTE_FC_RX_PAUSE;
1664 	} else {
1665 		/* DPNI_LINK_OPT_PAUSE not set
1666 		 *  if ASYM_PAUSE set,
1667 		 *	TX side flow control (send Pause frame)
1668 		 *	No RX side flow control (No action on pause frame rx)
1669 		 *  if ASYM_PAUSE not set,
1670 		 *	Flow control disabled
1671 		 */
1672 		if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1673 			fc_conf->mode = RTE_FC_TX_PAUSE;
1674 		else
1675 			fc_conf->mode = RTE_FC_NONE;
1676 	}
1677 
1678 	return ret;
1679 }
1680 
1681 static int
1682 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1683 {
1684 	int ret = -EINVAL;
1685 	struct dpaa2_dev_priv *priv;
1686 	struct fsl_mc_io *dpni;
1687 	struct dpni_link_state state = {0};
1688 	struct dpni_link_cfg cfg = {0};
1689 
1690 	PMD_INIT_FUNC_TRACE();
1691 
1692 	priv = dev->data->dev_private;
1693 	dpni = (struct fsl_mc_io *)priv->hw;
1694 
1695 	if (dpni == NULL) {
1696 		DPAA2_PMD_ERR("dpni is NULL");
1697 		return ret;
1698 	}
1699 
1700 	/* It is necessary to obtain the current state before setting fc_conf
1701 	 * as MC would return error in case rate, autoneg or duplex values are
1702 	 * different.
1703 	 */
1704 	ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1705 	if (ret) {
1706 		DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1707 		return -1;
1708 	}
1709 
1710 	/* Disable link before setting configuration */
1711 	dpaa2_dev_set_link_down(dev);
1712 
1713 	/* Based on fc_conf, update cfg */
1714 	cfg.rate = state.rate;
1715 	cfg.options = state.options;
1716 
1717 	/* update cfg with fc_conf */
1718 	switch (fc_conf->mode) {
1719 	case RTE_FC_FULL:
1720 		/* Full flow control;
1721 		 * OPT_PAUSE set, ASYM_PAUSE not set
1722 		 */
1723 		cfg.options |= DPNI_LINK_OPT_PAUSE;
1724 		cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1725 		break;
1726 	case RTE_FC_TX_PAUSE:
1727 		/* Enable RX flow control
1728 		 * OPT_PAUSE not set;
1729 		 * ASYM_PAUSE set;
1730 		 */
1731 		cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1732 		cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1733 		break;
1734 	case RTE_FC_RX_PAUSE:
1735 		/* Enable TX Flow control
1736 		 * OPT_PAUSE set
1737 		 * ASYM_PAUSE set
1738 		 */
1739 		cfg.options |= DPNI_LINK_OPT_PAUSE;
1740 		cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1741 		break;
1742 	case RTE_FC_NONE:
1743 		/* Disable Flow control
1744 		 * OPT_PAUSE not set
1745 		 * ASYM_PAUSE not set
1746 		 */
1747 		cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1748 		cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1749 		break;
1750 	default:
1751 		DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1752 			      fc_conf->mode);
1753 		return -1;
1754 	}
1755 
1756 	ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1757 	if (ret)
1758 		DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1759 			      ret);
1760 
1761 	/* Enable link */
1762 	dpaa2_dev_set_link_up(dev);
1763 
1764 	return ret;
1765 }
1766 
1767 static int
1768 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1769 			  struct rte_eth_rss_conf *rss_conf)
1770 {
1771 	struct rte_eth_dev_data *data = dev->data;
1772 	struct rte_eth_conf *eth_conf = &data->dev_conf;
1773 	int ret;
1774 
1775 	PMD_INIT_FUNC_TRACE();
1776 
1777 	if (rss_conf->rss_hf) {
1778 		ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1779 		if (ret) {
1780 			DPAA2_PMD_ERR("Unable to set flow dist");
1781 			return ret;
1782 		}
1783 	} else {
1784 		ret = dpaa2_remove_flow_dist(dev, 0);
1785 		if (ret) {
1786 			DPAA2_PMD_ERR("Unable to remove flow dist");
1787 			return ret;
1788 		}
1789 	}
1790 	eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1791 	return 0;
1792 }
1793 
1794 static int
1795 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1796 			    struct rte_eth_rss_conf *rss_conf)
1797 {
1798 	struct rte_eth_dev_data *data = dev->data;
1799 	struct rte_eth_conf *eth_conf = &data->dev_conf;
1800 
1801 	/* dpaa2 does not support rss_key, so length should be 0*/
1802 	rss_conf->rss_key_len = 0;
1803 	rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1804 	return 0;
1805 }
1806 
1807 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1808 		int eth_rx_queue_id,
1809 		uint16_t dpcon_id,
1810 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1811 {
1812 	struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1813 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1814 	struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1815 	uint8_t flow_id = dpaa2_ethq->flow_id;
1816 	struct dpni_queue cfg;
1817 	uint8_t options;
1818 	int ret;
1819 
1820 	if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1821 		dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1822 	else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1823 		dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1824 	else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
1825 		dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
1826 	else
1827 		return -EINVAL;
1828 
1829 	memset(&cfg, 0, sizeof(struct dpni_queue));
1830 	options = DPNI_QUEUE_OPT_DEST;
1831 	cfg.destination.type = DPNI_DEST_DPCON;
1832 	cfg.destination.id = dpcon_id;
1833 	cfg.destination.priority = queue_conf->ev.priority;
1834 
1835 	if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1836 		options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1837 		cfg.destination.hold_active = 1;
1838 	}
1839 
1840 	if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
1841 			!eth_priv->en_ordered) {
1842 		struct opr_cfg ocfg;
1843 
1844 		/* Restoration window size = 256 frames */
1845 		ocfg.oprrws = 3;
1846 		/* Restoration window size = 512 frames for LX2 */
1847 		if (dpaa2_svr_family == SVR_LX2160A)
1848 			ocfg.oprrws = 4;
1849 		/* Auto advance NESN window enabled */
1850 		ocfg.oa = 1;
1851 		/* Late arrival window size disabled */
1852 		ocfg.olws = 0;
1853 		/* ORL resource exhaustaion advance NESN disabled */
1854 		ocfg.oeane = 0;
1855 		/* Loose ordering enabled */
1856 		ocfg.oloe = 1;
1857 		eth_priv->en_loose_ordered = 1;
1858 		/* Strict ordering enabled if explicitly set */
1859 		if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
1860 			ocfg.oloe = 0;
1861 			eth_priv->en_loose_ordered = 0;
1862 		}
1863 
1864 		ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
1865 				   dpaa2_ethq->tc_index, flow_id,
1866 				   OPR_OPT_CREATE, &ocfg);
1867 		if (ret) {
1868 			DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
1869 			return ret;
1870 		}
1871 
1872 		eth_priv->en_ordered = 1;
1873 	}
1874 
1875 	options |= DPNI_QUEUE_OPT_USER_CTX;
1876 	cfg.user_context = (size_t)(dpaa2_ethq);
1877 
1878 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1879 			     dpaa2_ethq->tc_index, flow_id, options, &cfg);
1880 	if (ret) {
1881 		DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1882 		return ret;
1883 	}
1884 
1885 	memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1886 
1887 	return 0;
1888 }
1889 
1890 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1891 		int eth_rx_queue_id)
1892 {
1893 	struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1894 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1895 	struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1896 	uint8_t flow_id = dpaa2_ethq->flow_id;
1897 	struct dpni_queue cfg;
1898 	uint8_t options;
1899 	int ret;
1900 
1901 	memset(&cfg, 0, sizeof(struct dpni_queue));
1902 	options = DPNI_QUEUE_OPT_DEST;
1903 	cfg.destination.type = DPNI_DEST_NONE;
1904 
1905 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1906 			     dpaa2_ethq->tc_index, flow_id, options, &cfg);
1907 	if (ret)
1908 		DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1909 
1910 	return ret;
1911 }
1912 
1913 static inline int
1914 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
1915 {
1916 	unsigned int i;
1917 
1918 	for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
1919 		if (dpaa2_supported_filter_ops[i] == filter_op)
1920 			return 0;
1921 	}
1922 	return -ENOTSUP;
1923 }
1924 
1925 static int
1926 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
1927 		    enum rte_filter_type filter_type,
1928 				 enum rte_filter_op filter_op,
1929 				 void *arg)
1930 {
1931 	int ret = 0;
1932 
1933 	if (!dev)
1934 		return -ENODEV;
1935 
1936 	switch (filter_type) {
1937 	case RTE_ETH_FILTER_GENERIC:
1938 		if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
1939 			ret = -ENOTSUP;
1940 			break;
1941 		}
1942 		*(const void **)arg = &dpaa2_flow_ops;
1943 		dpaa2_filter_type |= filter_type;
1944 		break;
1945 	default:
1946 		RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
1947 			filter_type);
1948 		ret = -ENOTSUP;
1949 		break;
1950 	}
1951 	return ret;
1952 }
1953 
1954 static struct eth_dev_ops dpaa2_ethdev_ops = {
1955 	.dev_configure	  = dpaa2_eth_dev_configure,
1956 	.dev_start	      = dpaa2_dev_start,
1957 	.dev_stop	      = dpaa2_dev_stop,
1958 	.dev_close	      = dpaa2_dev_close,
1959 	.promiscuous_enable   = dpaa2_dev_promiscuous_enable,
1960 	.promiscuous_disable  = dpaa2_dev_promiscuous_disable,
1961 	.allmulticast_enable  = dpaa2_dev_allmulticast_enable,
1962 	.allmulticast_disable = dpaa2_dev_allmulticast_disable,
1963 	.dev_set_link_up      = dpaa2_dev_set_link_up,
1964 	.dev_set_link_down    = dpaa2_dev_set_link_down,
1965 	.link_update	   = dpaa2_dev_link_update,
1966 	.stats_get	       = dpaa2_dev_stats_get,
1967 	.xstats_get	       = dpaa2_dev_xstats_get,
1968 	.xstats_get_by_id     = dpaa2_xstats_get_by_id,
1969 	.xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1970 	.xstats_get_names      = dpaa2_xstats_get_names,
1971 	.stats_reset	   = dpaa2_dev_stats_reset,
1972 	.xstats_reset	      = dpaa2_dev_stats_reset,
1973 	.fw_version_get	   = dpaa2_fw_version_get,
1974 	.dev_infos_get	   = dpaa2_dev_info_get,
1975 	.dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1976 	.mtu_set           = dpaa2_dev_mtu_set,
1977 	.vlan_filter_set      = dpaa2_vlan_filter_set,
1978 	.vlan_offload_set     = dpaa2_vlan_offload_set,
1979 	.vlan_tpid_set	      = dpaa2_vlan_tpid_set,
1980 	.rx_queue_setup    = dpaa2_dev_rx_queue_setup,
1981 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
1982 	.tx_queue_setup    = dpaa2_dev_tx_queue_setup,
1983 	.tx_queue_release  = dpaa2_dev_tx_queue_release,
1984 	.rx_queue_count       = dpaa2_dev_rx_queue_count,
1985 	.flow_ctrl_get	      = dpaa2_flow_ctrl_get,
1986 	.flow_ctrl_set	      = dpaa2_flow_ctrl_set,
1987 	.mac_addr_add         = dpaa2_dev_add_mac_addr,
1988 	.mac_addr_remove      = dpaa2_dev_remove_mac_addr,
1989 	.mac_addr_set         = dpaa2_dev_set_mac_addr,
1990 	.rss_hash_update      = dpaa2_dev_rss_hash_update,
1991 	.rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
1992 	.filter_ctrl          = dpaa2_dev_flow_ctrl,
1993 };
1994 
1995 /* Populate the mac address from physically available (u-boot/firmware) and/or
1996  * one set by higher layers like MC (restool) etc.
1997  * Returns the table of MAC entries (multiple entries)
1998  */
1999 static int
2000 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2001 		  struct rte_ether_addr *mac_entry)
2002 {
2003 	int ret;
2004 	struct rte_ether_addr phy_mac, prime_mac;
2005 
2006 	memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2007 	memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2008 
2009 	/* Get the physical device MAC address */
2010 	ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2011 				     phy_mac.addr_bytes);
2012 	if (ret) {
2013 		DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2014 		goto cleanup;
2015 	}
2016 
2017 	ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2018 					prime_mac.addr_bytes);
2019 	if (ret) {
2020 		DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2021 		goto cleanup;
2022 	}
2023 
2024 	/* Now that both MAC have been obtained, do:
2025 	 *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2026 	 *     and return phy
2027 	 *  If empty_mac(phy), return prime.
2028 	 *  if both are empty, create random MAC, set as prime and return
2029 	 */
2030 	if (!rte_is_zero_ether_addr(&phy_mac)) {
2031 		/* If the addresses are not same, overwrite prime */
2032 		if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2033 			ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2034 							priv->token,
2035 							phy_mac.addr_bytes);
2036 			if (ret) {
2037 				DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2038 					      ret);
2039 				goto cleanup;
2040 			}
2041 			memcpy(&prime_mac, &phy_mac,
2042 				sizeof(struct rte_ether_addr));
2043 		}
2044 	} else if (rte_is_zero_ether_addr(&prime_mac)) {
2045 		/* In case phys and prime, both are zero, create random MAC */
2046 		rte_eth_random_addr(prime_mac.addr_bytes);
2047 		ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2048 						priv->token,
2049 						prime_mac.addr_bytes);
2050 		if (ret) {
2051 			DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2052 			goto cleanup;
2053 		}
2054 	}
2055 
2056 	/* prime_mac the final MAC address */
2057 	memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2058 	return 0;
2059 
2060 cleanup:
2061 	return -1;
2062 }
2063 
2064 static int
2065 check_devargs_handler(__rte_unused const char *key, const char *value,
2066 		      __rte_unused void *opaque)
2067 {
2068 	if (strcmp(value, "1"))
2069 		return -1;
2070 
2071 	return 0;
2072 }
2073 
2074 static int
2075 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2076 {
2077 	struct rte_kvargs *kvlist;
2078 
2079 	if (!devargs)
2080 		return 0;
2081 
2082 	kvlist = rte_kvargs_parse(devargs->args, NULL);
2083 	if (!kvlist)
2084 		return 0;
2085 
2086 	if (!rte_kvargs_count(kvlist, key)) {
2087 		rte_kvargs_free(kvlist);
2088 		return 0;
2089 	}
2090 
2091 	if (rte_kvargs_process(kvlist, key,
2092 			       check_devargs_handler, NULL) < 0) {
2093 		rte_kvargs_free(kvlist);
2094 		return 0;
2095 	}
2096 	rte_kvargs_free(kvlist);
2097 
2098 	return 1;
2099 }
2100 
2101 static int
2102 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2103 {
2104 	struct rte_device *dev = eth_dev->device;
2105 	struct rte_dpaa2_device *dpaa2_dev;
2106 	struct fsl_mc_io *dpni_dev;
2107 	struct dpni_attr attr;
2108 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2109 	struct dpni_buffer_layout layout;
2110 	int ret, hw_id, i;
2111 
2112 	PMD_INIT_FUNC_TRACE();
2113 
2114 	/* For secondary processes, the primary has done all the work */
2115 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2116 		/* In case of secondary, only burst and ops API need to be
2117 		 * plugged.
2118 		 */
2119 		eth_dev->dev_ops = &dpaa2_ethdev_ops;
2120 		if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2121 			eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2122 		else
2123 			eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2124 		eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2125 		return 0;
2126 	}
2127 
2128 	dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2129 
2130 	hw_id = dpaa2_dev->object_id;
2131 
2132 	dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2133 	if (!dpni_dev) {
2134 		DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2135 		return -1;
2136 	}
2137 
2138 	dpni_dev->regs = rte_mcp_ptr_list[0];
2139 	ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2140 	if (ret) {
2141 		DPAA2_PMD_ERR(
2142 			     "Failure in opening dpni@%d with err code %d",
2143 			     hw_id, ret);
2144 		rte_free(dpni_dev);
2145 		return -1;
2146 	}
2147 
2148 	/* Clean the device first */
2149 	ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2150 	if (ret) {
2151 		DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2152 			      hw_id, ret);
2153 		goto init_err;
2154 	}
2155 
2156 	ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2157 	if (ret) {
2158 		DPAA2_PMD_ERR(
2159 			     "Failure in get dpni@%d attribute, err code %d",
2160 			     hw_id, ret);
2161 		goto init_err;
2162 	}
2163 
2164 	priv->num_rx_tc = attr.num_rx_tcs;
2165 
2166 	for (i = 0; i < attr.num_rx_tcs; i++)
2167 		priv->nb_rx_queues += attr.num_queues;
2168 
2169 	/* Using number of TX queues as number of TX TCs */
2170 	priv->nb_tx_queues = attr.num_tx_tcs;
2171 
2172 	DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
2173 			priv->num_rx_tc, priv->nb_rx_queues,
2174 			priv->nb_tx_queues);
2175 
2176 	priv->hw = dpni_dev;
2177 	priv->hw_id = hw_id;
2178 	priv->options = attr.options;
2179 	priv->max_mac_filters = attr.mac_filter_entries;
2180 	priv->max_vlan_filters = attr.vlan_filter_entries;
2181 	priv->flags = 0;
2182 
2183 	/* Allocate memory for hardware structure for queues */
2184 	ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2185 	if (ret) {
2186 		DPAA2_PMD_ERR("Queue allocation Failed");
2187 		goto init_err;
2188 	}
2189 
2190 	/* Allocate memory for storing MAC addresses.
2191 	 * Table of mac_filter_entries size is allocated so that RTE ether lib
2192 	 * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2193 	 */
2194 	eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2195 		RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2196 	if (eth_dev->data->mac_addrs == NULL) {
2197 		DPAA2_PMD_ERR(
2198 		   "Failed to allocate %d bytes needed to store MAC addresses",
2199 		   RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2200 		ret = -ENOMEM;
2201 		goto init_err;
2202 	}
2203 
2204 	ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2205 	if (ret) {
2206 		DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2207 		rte_free(eth_dev->data->mac_addrs);
2208 		eth_dev->data->mac_addrs = NULL;
2209 		goto init_err;
2210 	}
2211 
2212 	/* ... tx buffer layout ... */
2213 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2214 	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2215 	layout.pass_frame_status = 1;
2216 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2217 				     DPNI_QUEUE_TX, &layout);
2218 	if (ret) {
2219 		DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2220 		goto init_err;
2221 	}
2222 
2223 	/* ... tx-conf and error buffer layout ... */
2224 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2225 	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2226 	layout.pass_frame_status = 1;
2227 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2228 				     DPNI_QUEUE_TX_CONFIRM, &layout);
2229 	if (ret) {
2230 		DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2231 			     ret);
2232 		goto init_err;
2233 	}
2234 
2235 	eth_dev->dev_ops = &dpaa2_ethdev_ops;
2236 
2237 	if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2238 		eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2239 		DPAA2_PMD_INFO("Loopback mode");
2240 	} else {
2241 		eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2242 	}
2243 	eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2244 
2245 	/*Init fields w.r.t. classficaition*/
2246 	memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2247 	priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2248 	if (!priv->extract.qos_extract_param) {
2249 		DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2250 			    " classificaiton ", ret);
2251 		goto init_err;
2252 	}
2253 	for (i = 0; i < MAX_TCS; i++) {
2254 		memset(&priv->extract.fs_key_cfg[i], 0,
2255 			sizeof(struct dpkg_profile_cfg));
2256 		priv->extract.fs_extract_param[i] =
2257 			(size_t)rte_malloc(NULL, 256, 64);
2258 		if (!priv->extract.fs_extract_param[i]) {
2259 			DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2260 				     ret);
2261 			goto init_err;
2262 		}
2263 	}
2264 
2265 	RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2266 	return 0;
2267 init_err:
2268 	dpaa2_dev_uninit(eth_dev);
2269 	return ret;
2270 }
2271 
2272 static int
2273 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2274 {
2275 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2276 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
2277 	int i, ret;
2278 
2279 	PMD_INIT_FUNC_TRACE();
2280 
2281 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2282 		return 0;
2283 
2284 	if (!dpni) {
2285 		DPAA2_PMD_WARN("Already closed or not started");
2286 		return -1;
2287 	}
2288 
2289 	dpaa2_dev_close(eth_dev);
2290 
2291 	dpaa2_free_rx_tx_queues(eth_dev);
2292 
2293 	/* Close the device at underlying layer*/
2294 	ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2295 	if (ret) {
2296 		DPAA2_PMD_ERR(
2297 			     "Failure closing dpni device with err code %d",
2298 			     ret);
2299 	}
2300 
2301 	/* Free the allocated memory for ethernet private data and dpni*/
2302 	priv->hw = NULL;
2303 	rte_free(dpni);
2304 
2305 	for (i = 0; i < MAX_TCS; i++) {
2306 		if (priv->extract.fs_extract_param[i])
2307 			rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2308 	}
2309 
2310 	if (priv->extract.qos_extract_param)
2311 		rte_free((void *)(size_t)priv->extract.qos_extract_param);
2312 
2313 	eth_dev->dev_ops = NULL;
2314 	eth_dev->rx_pkt_burst = NULL;
2315 	eth_dev->tx_pkt_burst = NULL;
2316 
2317 	DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2318 	return 0;
2319 }
2320 
2321 static int
2322 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2323 		struct rte_dpaa2_device *dpaa2_dev)
2324 {
2325 	struct rte_eth_dev *eth_dev;
2326 	int diag;
2327 
2328 	if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2329 		RTE_PKTMBUF_HEADROOM) {
2330 		DPAA2_PMD_ERR(
2331 		"RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2332 		RTE_PKTMBUF_HEADROOM,
2333 		DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2334 
2335 		return -1;
2336 	}
2337 
2338 	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2339 		eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2340 		if (!eth_dev)
2341 			return -ENODEV;
2342 		eth_dev->data->dev_private = rte_zmalloc(
2343 						"ethdev private structure",
2344 						sizeof(struct dpaa2_dev_priv),
2345 						RTE_CACHE_LINE_SIZE);
2346 		if (eth_dev->data->dev_private == NULL) {
2347 			DPAA2_PMD_CRIT(
2348 				"Unable to allocate memory for private data");
2349 			rte_eth_dev_release_port(eth_dev);
2350 			return -ENOMEM;
2351 		}
2352 	} else {
2353 		eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2354 		if (!eth_dev)
2355 			return -ENODEV;
2356 	}
2357 
2358 	eth_dev->device = &dpaa2_dev->device;
2359 
2360 	dpaa2_dev->eth_dev = eth_dev;
2361 	eth_dev->data->rx_mbuf_alloc_failed = 0;
2362 
2363 	if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2364 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2365 
2366 	/* Invoke PMD device initialization function */
2367 	diag = dpaa2_dev_init(eth_dev);
2368 	if (diag == 0) {
2369 		rte_eth_dev_probing_finish(eth_dev);
2370 		return 0;
2371 	}
2372 
2373 	rte_eth_dev_release_port(eth_dev);
2374 	return diag;
2375 }
2376 
2377 static int
2378 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2379 {
2380 	struct rte_eth_dev *eth_dev;
2381 
2382 	eth_dev = dpaa2_dev->eth_dev;
2383 	dpaa2_dev_uninit(eth_dev);
2384 
2385 	rte_eth_dev_release_port(eth_dev);
2386 
2387 	return 0;
2388 }
2389 
2390 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2391 	.drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2392 	.drv_type = DPAA2_ETH,
2393 	.probe = rte_dpaa2_probe,
2394 	.remove = rte_dpaa2_remove,
2395 };
2396 
2397 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2398 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2399 		DRIVER_LOOPBACK_MODE "=<int>");
2400 RTE_INIT(dpaa2_pmd_init_log)
2401 {
2402 	dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2403 	if (dpaa2_logtype_pmd >= 0)
2404 		rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2405 }
2406