1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2014-2018 Broadcom 3 * All rights reserved. 4 */ 5 6 #include <inttypes.h> 7 8 #include <rte_byteorder.h> 9 #include <rte_malloc.h> 10 11 #include "bnxt.h" 12 #include "bnxt_ring.h" 13 #include "bnxt_txq.h" 14 #include "bnxt_txr.h" 15 #include "hsi_struct_def_dpdk.h" 16 #include <stdbool.h> 17 18 /* 19 * TX Ring handling 20 */ 21 22 void bnxt_free_tx_rings(struct bnxt *bp) 23 { 24 int i; 25 26 for (i = 0; i < (int)bp->tx_nr_rings; i++) { 27 struct bnxt_tx_queue *txq = bp->tx_queues[i]; 28 29 if (!txq) 30 continue; 31 32 bnxt_free_ring(txq->tx_ring->tx_ring_struct); 33 rte_free(txq->tx_ring->tx_ring_struct); 34 rte_free(txq->tx_ring); 35 36 bnxt_free_ring(txq->cp_ring->cp_ring_struct); 37 rte_free(txq->cp_ring->cp_ring_struct); 38 rte_free(txq->cp_ring); 39 40 rte_free(txq); 41 bp->tx_queues[i] = NULL; 42 } 43 } 44 45 int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq) 46 { 47 struct bnxt_tx_ring_info *txr = txq->tx_ring; 48 struct bnxt_ring *ring = txr->tx_ring_struct; 49 50 txq->tx_wake_thresh = ring->ring_size / 2; 51 ring->fw_ring_id = INVALID_HW_RING_ID; 52 53 return 0; 54 } 55 56 int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id) 57 { 58 struct bnxt_cp_ring_info *cpr; 59 struct bnxt_tx_ring_info *txr; 60 struct bnxt_ring *ring; 61 62 txr = rte_zmalloc_socket("bnxt_tx_ring", 63 sizeof(struct bnxt_tx_ring_info), 64 RTE_CACHE_LINE_SIZE, socket_id); 65 if (txr == NULL) 66 return -ENOMEM; 67 txq->tx_ring = txr; 68 69 ring = rte_zmalloc_socket("bnxt_tx_ring_struct", 70 sizeof(struct bnxt_ring), 71 RTE_CACHE_LINE_SIZE, socket_id); 72 if (ring == NULL) 73 return -ENOMEM; 74 txr->tx_ring_struct = ring; 75 ring->ring_size = rte_align32pow2(txq->nb_tx_desc); 76 ring->ring_mask = ring->ring_size - 1; 77 ring->bd = (void *)txr->tx_desc_ring; 78 ring->bd_dma = txr->tx_desc_mapping; 79 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_tx_bd); 80 ring->vmem = (void **)&txr->tx_buf_ring; 81 ring->fw_ring_id = INVALID_HW_RING_ID; 82 83 cpr = rte_zmalloc_socket("bnxt_tx_ring", 84 sizeof(struct bnxt_cp_ring_info), 85 RTE_CACHE_LINE_SIZE, socket_id); 86 if (cpr == NULL) 87 return -ENOMEM; 88 txq->cp_ring = cpr; 89 90 ring = rte_zmalloc_socket("bnxt_tx_ring_struct", 91 sizeof(struct bnxt_ring), 92 RTE_CACHE_LINE_SIZE, socket_id); 93 if (ring == NULL) 94 return -ENOMEM; 95 cpr->cp_ring_struct = ring; 96 ring->ring_size = txr->tx_ring_struct->ring_size; 97 ring->ring_mask = ring->ring_size - 1; 98 ring->bd = (void *)cpr->cp_desc_ring; 99 ring->bd_dma = cpr->cp_desc_mapping; 100 ring->vmem_size = 0; 101 ring->vmem = NULL; 102 ring->fw_ring_id = INVALID_HW_RING_ID; 103 104 return 0; 105 } 106 107 static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt, 108 struct bnxt_tx_queue *txq, 109 uint16_t *coal_pkts, 110 struct tx_bd_long **last_txbd) 111 { 112 struct bnxt_tx_ring_info *txr = txq->tx_ring; 113 uint32_t outer_tpid_bd = 0; 114 struct tx_bd_long *txbd; 115 struct tx_bd_long_hi *txbd1 = NULL; 116 uint32_t vlan_tag_flags; 117 bool long_bd = false; 118 unsigned short nr_bds = 0; 119 struct rte_mbuf *m_seg; 120 struct bnxt_sw_tx_bd *tx_buf; 121 static const uint32_t lhint_arr[4] = { 122 TX_BD_LONG_FLAGS_LHINT_LT512, 123 TX_BD_LONG_FLAGS_LHINT_LT1K, 124 TX_BD_LONG_FLAGS_LHINT_LT2K, 125 TX_BD_LONG_FLAGS_LHINT_LT2K 126 }; 127 128 if (unlikely(is_bnxt_in_error(txq->bp))) 129 return -EIO; 130 131 if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM | 132 PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM | 133 PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM | 134 PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN | 135 PKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST | 136 PKT_TX_QINQ_PKT) || 137 (BNXT_TRUFLOW_EN(txq->bp) && 138 (txq->bp->tx_cfa_action || txq->vfr_tx_cfa_action))) 139 long_bd = true; 140 141 nr_bds = long_bd + tx_pkt->nb_segs; 142 if (unlikely(bnxt_tx_avail(txq) < nr_bds)) 143 return -ENOMEM; 144 145 /* Check if number of Tx descriptors is above HW limit */ 146 if (unlikely(nr_bds > BNXT_MAX_TSO_SEGS)) { 147 PMD_DRV_LOG(ERR, 148 "Num descriptors %d exceeds HW limit\n", nr_bds); 149 return -ENOSPC; 150 } 151 152 /* If packet length is less than minimum packet size, pad it */ 153 if (unlikely(rte_pktmbuf_pkt_len(tx_pkt) < BNXT_MIN_PKT_SIZE)) { 154 uint8_t pad = BNXT_MIN_PKT_SIZE - rte_pktmbuf_pkt_len(tx_pkt); 155 char *seg = rte_pktmbuf_append(tx_pkt, pad); 156 157 if (!seg) { 158 PMD_DRV_LOG(ERR, 159 "Failed to pad mbuf by %d bytes\n", 160 pad); 161 return -ENOMEM; 162 } 163 164 /* Note: data_len, pkt len are updated in rte_pktmbuf_append */ 165 memset(seg, 0, pad); 166 } 167 168 /* Check non zero data_len */ 169 RTE_VERIFY(tx_pkt->data_len); 170 171 tx_buf = &txr->tx_buf_ring[txr->tx_prod]; 172 tx_buf->mbuf = tx_pkt; 173 tx_buf->nr_bds = nr_bds; 174 175 txbd = &txr->tx_desc_ring[txr->tx_prod]; 176 txbd->opaque = *coal_pkts; 177 txbd->flags_type = nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT; 178 txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW; 179 txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL; 180 txbd->len = tx_pkt->data_len; 181 if (tx_pkt->pkt_len >= 2014) 182 txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K; 183 else 184 txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9]; 185 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf)); 186 *last_txbd = txbd; 187 188 if (long_bd) { 189 txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG; 190 vlan_tag_flags = 0; 191 192 /* HW can accelerate only outer vlan in QinQ mode */ 193 if (tx_buf->mbuf->ol_flags & PKT_TX_QINQ_PKT) { 194 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG | 195 tx_buf->mbuf->vlan_tci_outer; 196 outer_tpid_bd = txq->bp->outer_tpid_bd & 197 BNXT_OUTER_TPID_BD_MASK; 198 vlan_tag_flags |= outer_tpid_bd; 199 } else if (tx_buf->mbuf->ol_flags & PKT_TX_VLAN_PKT) { 200 /* shurd: Should this mask at 201 * TX_BD_LONG_CFA_META_VLAN_VID_MASK? 202 */ 203 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG | 204 tx_buf->mbuf->vlan_tci; 205 /* Currently supports 8021Q, 8021AD vlan offloads 206 * QINQ1, QINQ2, QINQ3 vlan headers are deprecated 207 */ 208 /* DPDK only supports 802.11q VLAN packets */ 209 vlan_tag_flags |= 210 TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100; 211 } 212 213 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod); 214 215 txbd1 = (struct tx_bd_long_hi *) 216 &txr->tx_desc_ring[txr->tx_prod]; 217 txbd1->lflags = 0; 218 txbd1->cfa_meta = vlan_tag_flags; 219 220 if (txq->vfr_tx_cfa_action) 221 txbd1->cfa_action = txq->vfr_tx_cfa_action; 222 else 223 txbd1->cfa_action = txq->bp->tx_cfa_action; 224 225 if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) { 226 uint16_t hdr_size; 227 228 /* TSO */ 229 txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO | 230 TX_BD_LONG_LFLAGS_T_IPID; 231 hdr_size = tx_pkt->l2_len + tx_pkt->l3_len + 232 tx_pkt->l4_len; 233 hdr_size += (tx_pkt->ol_flags & PKT_TX_TUNNEL_MASK) ? 234 tx_pkt->outer_l2_len + 235 tx_pkt->outer_l3_len : 0; 236 /* The hdr_size is multiple of 16bit units not 8bit. 237 * Hence divide by 2. 238 */ 239 txbd1->hdr_size = hdr_size >> 1; 240 txbd1->mss = tx_pkt->tso_segsz; 241 RTE_VERIFY(txbd1->mss); 242 243 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) == 244 PKT_TX_OIP_IIP_TCP_UDP_CKSUM) { 245 /* Outer IP, Inner IP, Inner TCP/UDP CSO */ 246 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM; 247 txbd1->mss = 0; 248 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) == 249 PKT_TX_OIP_IIP_TCP_CKSUM) { 250 /* Outer IP, Inner IP, Inner TCP/UDP CSO */ 251 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM; 252 txbd1->mss = 0; 253 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) == 254 PKT_TX_OIP_IIP_UDP_CKSUM) { 255 /* Outer IP, Inner IP, Inner TCP/UDP CSO */ 256 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM; 257 txbd1->mss = 0; 258 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) == 259 PKT_TX_IIP_TCP_UDP_CKSUM) { 260 /* (Inner) IP, (Inner) TCP/UDP CSO */ 261 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM; 262 txbd1->mss = 0; 263 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) == 264 PKT_TX_IIP_UDP_CKSUM) { 265 /* (Inner) IP, (Inner) TCP/UDP CSO */ 266 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM; 267 txbd1->mss = 0; 268 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) == 269 PKT_TX_IIP_TCP_CKSUM) { 270 /* (Inner) IP, (Inner) TCP/UDP CSO */ 271 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM; 272 txbd1->mss = 0; 273 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) == 274 PKT_TX_OIP_TCP_UDP_CKSUM) { 275 /* Outer IP, (Inner) TCP/UDP CSO */ 276 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM; 277 txbd1->mss = 0; 278 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) == 279 PKT_TX_OIP_UDP_CKSUM) { 280 /* Outer IP, (Inner) TCP/UDP CSO */ 281 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM; 282 txbd1->mss = 0; 283 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) == 284 PKT_TX_OIP_TCP_CKSUM) { 285 /* Outer IP, (Inner) TCP/UDP CSO */ 286 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM; 287 txbd1->mss = 0; 288 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) == 289 PKT_TX_OIP_IIP_CKSUM) { 290 /* Outer IP, Inner IP CSO */ 291 txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM; 292 txbd1->mss = 0; 293 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) == 294 PKT_TX_TCP_UDP_CKSUM) { 295 /* TCP/UDP CSO */ 296 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM; 297 txbd1->mss = 0; 298 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) == 299 PKT_TX_TCP_CKSUM) { 300 /* TCP/UDP CSO */ 301 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM; 302 txbd1->mss = 0; 303 } else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) == 304 PKT_TX_UDP_CKSUM) { 305 /* TCP/UDP CSO */ 306 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM; 307 txbd1->mss = 0; 308 } else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) == 309 PKT_TX_IP_CKSUM) { 310 /* IP CSO */ 311 txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM; 312 txbd1->mss = 0; 313 } else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) == 314 PKT_TX_OUTER_IP_CKSUM) { 315 /* IP CSO */ 316 txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM; 317 txbd1->mss = 0; 318 } else if ((tx_pkt->ol_flags & PKT_TX_IEEE1588_TMST) == 319 PKT_TX_IEEE1588_TMST) { 320 /* PTP */ 321 txbd1->lflags |= TX_BD_LONG_LFLAGS_STAMP; 322 txbd1->mss = 0; 323 } 324 } else { 325 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT; 326 } 327 328 m_seg = tx_pkt->next; 329 while (m_seg) { 330 /* Check non zero data_len */ 331 RTE_VERIFY(m_seg->data_len); 332 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod); 333 tx_buf = &txr->tx_buf_ring[txr->tx_prod]; 334 tx_buf->mbuf = m_seg; 335 336 txbd = &txr->tx_desc_ring[txr->tx_prod]; 337 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg)); 338 txbd->flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT; 339 txbd->len = m_seg->data_len; 340 341 m_seg = m_seg->next; 342 } 343 344 txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END; 345 346 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod); 347 348 return 0; 349 } 350 351 static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts) 352 { 353 struct bnxt_tx_ring_info *txr = txq->tx_ring; 354 struct rte_mempool *pool = NULL; 355 struct rte_mbuf **free = txq->free; 356 uint16_t cons = txr->tx_cons; 357 unsigned int blk = 0; 358 int i, j; 359 360 for (i = 0; i < nr_pkts; i++) { 361 struct rte_mbuf *mbuf; 362 struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[cons]; 363 unsigned short nr_bds = tx_buf->nr_bds; 364 365 for (j = 0; j < nr_bds; j++) { 366 mbuf = tx_buf->mbuf; 367 tx_buf->mbuf = NULL; 368 cons = RING_NEXT(txr->tx_ring_struct, cons); 369 tx_buf = &txr->tx_buf_ring[cons]; 370 if (!mbuf) /* long_bd's tx_buf ? */ 371 continue; 372 373 mbuf = rte_pktmbuf_prefree_seg(mbuf); 374 if (unlikely(!mbuf)) 375 continue; 376 377 /* EW - no need to unmap DMA memory? */ 378 379 if (likely(mbuf->pool == pool)) { 380 /* Add mbuf to the bulk free array */ 381 free[blk++] = mbuf; 382 } else { 383 /* Found an mbuf from a different pool. Free 384 * mbufs accumulated so far to the previous 385 * pool 386 */ 387 if (likely(pool != NULL)) 388 rte_mempool_put_bulk(pool, 389 (void *)free, 390 blk); 391 392 /* Start accumulating mbufs in a new pool */ 393 free[0] = mbuf; 394 pool = mbuf->pool; 395 blk = 1; 396 } 397 } 398 } 399 if (blk) 400 rte_mempool_put_bulk(pool, (void *)free, blk); 401 402 txr->tx_cons = cons; 403 } 404 405 static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq) 406 { 407 struct bnxt_cp_ring_info *cpr = txq->cp_ring; 408 uint32_t raw_cons = cpr->cp_raw_cons; 409 uint32_t cons; 410 uint32_t nb_tx_pkts = 0; 411 struct tx_cmpl *txcmp; 412 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring; 413 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct; 414 uint32_t ring_mask = cp_ring_struct->ring_mask; 415 uint32_t opaque = 0; 416 417 if (bnxt_tx_bds_in_hw(txq) < txq->tx_free_thresh) 418 return 0; 419 420 do { 421 cons = RING_CMPL(ring_mask, raw_cons); 422 txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons]; 423 rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) & 424 ring_mask]); 425 426 if (!CMPL_VALID(txcmp, cpr->valid)) 427 break; 428 opaque = rte_cpu_to_le_32(txcmp->opaque); 429 NEXT_CMPL(cpr, cons, cpr->valid, 1); 430 rte_prefetch0(&cp_desc_ring[cons]); 431 432 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2) 433 nb_tx_pkts += opaque; 434 else 435 RTE_LOG_DP(ERR, PMD, 436 "Unhandled CMP type %02x\n", 437 CMP_TYPE(txcmp)); 438 raw_cons = cons; 439 } while (nb_tx_pkts < ring_mask); 440 441 if (nb_tx_pkts) { 442 bnxt_tx_cmp(txq, nb_tx_pkts); 443 cpr->cp_raw_cons = raw_cons; 444 bnxt_db_cq(cpr); 445 } 446 447 return nb_tx_pkts; 448 } 449 450 uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 451 uint16_t nb_pkts) 452 { 453 int rc; 454 uint16_t nb_tx_pkts = 0; 455 uint16_t coal_pkts = 0; 456 struct bnxt_tx_queue *txq = tx_queue; 457 struct tx_bd_long *last_txbd = NULL; 458 459 /* Handle TX completions */ 460 bnxt_handle_tx_cp(txq); 461 462 /* Tx queue was stopped; wait for it to be restarted */ 463 if (unlikely(!txq->tx_started)) { 464 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n"); 465 return 0; 466 } 467 468 /* Handle TX burst request */ 469 for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) { 470 coal_pkts++; 471 rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq, 472 &coal_pkts, &last_txbd); 473 474 if (unlikely(rc)) 475 break; 476 } 477 478 if (likely(nb_tx_pkts)) { 479 /* Request a completion on the last packet */ 480 last_txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL; 481 bnxt_db_write(&txq->tx_ring->tx_db, txq->tx_ring->tx_prod); 482 } 483 484 return nb_tx_pkts; 485 } 486 487 /* 488 * Dummy DPDK callback for TX. 489 * 490 * This function is used to temporarily replace the real callback during 491 * unsafe control operations on the queue, or in case of error. 492 */ 493 uint16_t 494 bnxt_dummy_xmit_pkts(void *tx_queue __rte_unused, 495 struct rte_mbuf **tx_pkts __rte_unused, 496 uint16_t nb_pkts __rte_unused) 497 { 498 return 0; 499 } 500 501 int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 502 { 503 struct bnxt *bp = dev->data->dev_private; 504 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id]; 505 int rc = 0; 506 507 rc = is_bnxt_in_error(bp); 508 if (rc) 509 return rc; 510 511 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED; 512 txq->tx_started = true; 513 PMD_DRV_LOG(DEBUG, "Tx queue started\n"); 514 515 return 0; 516 } 517 518 int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 519 { 520 struct bnxt *bp = dev->data->dev_private; 521 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id]; 522 int rc = 0; 523 524 rc = is_bnxt_in_error(bp); 525 if (rc) 526 return rc; 527 528 /* Handle TX completions */ 529 bnxt_handle_tx_cp(txq); 530 531 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; 532 txq->tx_started = false; 533 PMD_DRV_LOG(DEBUG, "Tx queue stopped\n"); 534 535 return 0; 536 } 537