1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2015-2018 Atomic Rules LLC 3 */ 4 5 #ifndef _ARK_MPU_H_ 6 #define _ARK_MPU_H_ 7 8 #include <stdint.h> 9 10 #include <rte_memory.h> 11 12 /* The MPU or Memory Prefetch Unit is an internal Arkville hardware 13 * module for moving data between host memory and the hardware FPGA. 14 * This module is *not* intended for end-user manipulation, hence 15 * there is minimal documentation. 16 */ 17 18 /* 19 * MPU hardware structures 20 * These are overlay structures to a memory mapped FPGA device. These 21 * structs will never be instantiated in ram memory 22 */ 23 24 #define ARK_MPU_ID 0x00 25 struct ark_mpu_id_t { 26 union { 27 char id[4]; 28 uint32_t idnum; 29 }; 30 union { 31 char ver[4]; 32 uint32_t vernum; 33 }; 34 uint32_t phys_id; 35 uint32_t mrr_code; 36 }; 37 38 #define ARK_MPU_HW 0x010 39 struct ark_mpu_hw_t { 40 uint16_t num_queues; 41 uint16_t reserved; 42 uint32_t hw_depth; 43 uint32_t obj_size; 44 uint32_t obj_per_mrr; 45 }; 46 47 #define ARK_MPU_CFG 0x040 48 struct ark_mpu_cfg_t { 49 rte_iova_t ring_base; /* rte_iova_t is a uint64_t */ 50 uint32_t ring_size; 51 uint32_t ring_mask; 52 uint32_t min_host_move; 53 uint32_t min_hw_move; 54 volatile uint32_t sw_prod_index; 55 volatile uint32_t hw_cons_index; 56 volatile uint32_t command; 57 }; 58 enum ARK_MPU_COMMAND { 59 MPU_CMD_IDLE = 1, 60 MPU_CMD_RUN = 2, 61 MPU_CMD_STOP = 4, 62 MPU_CMD_RESET = 8, 63 MPU_CMD_FORCE_RESET = 16, 64 MPU_COMMAND_LIMIT = 0xfFFFFFFF 65 }; 66 67 #define ARK_MPU_STATS 0x080 68 struct ark_mpu_stats_t { 69 volatile uint64_t pci_request; 70 volatile uint64_t q_empty; 71 volatile uint64_t q_q1; 72 volatile uint64_t q_q2; 73 volatile uint64_t q_q3; 74 volatile uint64_t q_q4; 75 volatile uint64_t q_full; 76 }; 77 78 #define ARK_MPU_DEBUG 0x0C0 79 struct ark_mpu_debug_t { 80 volatile uint32_t state; 81 uint32_t reserved; 82 volatile uint32_t count; 83 volatile uint32_t take; 84 volatile uint32_t peek[4]; 85 }; 86 87 /* Consolidated structure */ 88 struct ark_mpu_t { 89 struct ark_mpu_id_t id; 90 uint8_t reserved0[(ARK_MPU_HW - ARK_MPU_ID) 91 - sizeof(struct ark_mpu_id_t)]; 92 struct ark_mpu_hw_t hw; 93 uint8_t reserved1[(ARK_MPU_CFG - ARK_MPU_HW) - 94 sizeof(struct ark_mpu_hw_t)]; 95 struct ark_mpu_cfg_t cfg; 96 uint8_t reserved2[(ARK_MPU_STATS - ARK_MPU_CFG) - 97 sizeof(struct ark_mpu_cfg_t)]; 98 struct ark_mpu_stats_t stats; 99 uint8_t reserved3[(ARK_MPU_DEBUG - ARK_MPU_STATS) - 100 sizeof(struct ark_mpu_stats_t)]; 101 struct ark_mpu_debug_t debug; 102 }; 103 104 uint16_t ark_api_num_queues(struct ark_mpu_t *mpu); 105 uint16_t ark_api_num_queues_per_port(struct ark_mpu_t *mpu, 106 uint16_t ark_ports); 107 int ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size); 108 void ark_mpu_stop(struct ark_mpu_t *mpu); 109 void ark_mpu_start(struct ark_mpu_t *mpu); 110 int ark_mpu_reset(struct ark_mpu_t *mpu); 111 int ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring, 112 uint32_t ring_size, int is_tx); 113 114 void ark_mpu_dump(struct ark_mpu_t *mpu, const char *msg, uint16_t idx); 115 void ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t qid); 116 void ark_mpu_reset_stats(struct ark_mpu_t *mpu); 117 118 /* this action is in a performance critical path */ 119 static inline void 120 ark_mpu_set_producer(struct ark_mpu_t *mpu, uint32_t idx) 121 { 122 mpu->cfg.sw_prod_index = idx; 123 } 124 125 #endif 126