xref: /dpdk/drivers/event/dpaa2/dpaa2_eventdev.h (revision c7e9729d)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  *   Copyright 2017 NXP
5  *
6  */
7 
8 #ifndef __DPAA2_EVENTDEV_H__
9 #define __DPAA2_EVENTDEV_H__
10 
11 #include <rte_eventdev_pmd.h>
12 #include <rte_eventdev_pmd_vdev.h>
13 #include <rte_atomic.h>
14 #include <mc/fsl_dpcon.h>
15 #include <mc/fsl_mc_sys.h>
16 
17 #define EVENTDEV_NAME_DPAA2_PMD		event_dpaa2
18 
19 #define DPAA2_EVENT_DEFAULT_DPCI_PRIO 0
20 
21 #define DPAA2_EVENT_MAX_QUEUES			16
22 #define DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT		1
23 #define DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT		(UINT32_MAX - 1)
24 #define DPAA2_EVENT_MAX_QUEUE_FLOWS		2048
25 #define DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS	8
26 #define DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS	0
27 #define DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH	8
28 #define DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH	8
29 #define DPAA2_EVENT_MAX_NUM_EVENTS		(INT32_MAX - 1)
30 
31 #define DPAA2_EVENT_QUEUE_ATOMIC_FLOWS		2048
32 #define DPAA2_EVENT_QUEUE_ORDER_SEQUENCES	2048
33 
34 enum {
35 	DPAA2_EVENT_DPCI_PARALLEL_QUEUE,
36 	DPAA2_EVENT_DPCI_ATOMIC_QUEUE,
37 	DPAA2_EVENT_DPCI_MAX_QUEUES
38 };
39 
40 #define RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP \
41 		(RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \
42 		RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
43 		RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
44 /**< Ethernet Rx adapter cap to return If the packet transfers from
45  * the ethdev to eventdev with DPAA2 devices.
46  */
47 
48 struct dpaa2_dpcon_dev {
49 	TAILQ_ENTRY(dpaa2_dpcon_dev) next;
50 	struct fsl_mc_io dpcon;
51 	uint16_t token;
52 	rte_atomic16_t in_use;
53 	uint32_t dpcon_id;
54 	uint16_t qbman_ch_id;
55 	uint8_t num_priorities;
56 	uint8_t channel_index;
57 };
58 
59 struct evq_info_t {
60 	/* DPcon device */
61 	struct dpaa2_dpcon_dev *dpcon;
62 	/* Attached DPCI device */
63 	struct dpaa2_dpci_dev *dpci;
64 	/* Configuration provided by the user */
65 	uint32_t event_queue_cfg;
66 	uint8_t link;
67 };
68 
69 struct dpaa2_eventdev {
70 	struct evq_info_t evq_info[DPAA2_EVENT_MAX_QUEUES];
71 	uint32_t dequeue_timeout_ns;
72 	uint8_t max_event_queues;
73 	uint8_t nb_event_queues;
74 	uint8_t nb_event_ports;
75 	uint8_t resvd_1;
76 	uint32_t nb_event_queue_flows;
77 	uint32_t nb_event_port_dequeue_depth;
78 	uint32_t nb_event_port_enqueue_depth;
79 	uint32_t event_dev_cfg;
80 };
81 
82 struct dpaa2_dpcon_dev *rte_dpaa2_alloc_dpcon_dev(void);
83 void rte_dpaa2_free_dpcon_dev(struct dpaa2_dpcon_dev *dpcon);
84 
85 #endif /* __DPAA2_EVENTDEV_H__ */
86