1INTERNAL { 2 global: 3 4 efx_crc32_calculate; 5 6 efx_ev_fini; 7 efx_ev_init; 8 efx_ev_qcreate; 9 efx_ev_qcreate_check_init_done; 10 efx_ev_qdestroy; 11 efx_ev_qmoderate; 12 efx_ev_qpending; 13 efx_ev_qpoll; 14 efx_ev_qpost; 15 efx_ev_qprime; 16 efx_ev_usecs_to_ticks; 17 18 efx_evb_fini; 19 efx_evb_init; 20 efx_evb_vport_mac_set; 21 efx_evb_vport_reset; 22 efx_evb_vport_stats; 23 efx_evb_vport_vlan_set; 24 efx_evb_vswitch_create; 25 efx_evb_vswitch_destroy; 26 27 efx_evq_nbufs; 28 efx_evq_size; 29 30 efx_family; 31 efx_family_probe_bar; 32 33 efx_filter_fini; 34 efx_filter_init; 35 efx_filter_insert; 36 efx_filter_remove; 37 efx_filter_restore; 38 efx_filter_spec_init_rx; 39 efx_filter_spec_init_tx; 40 efx_filter_spec_set_encap_type; 41 efx_filter_spec_set_eth_local; 42 efx_filter_spec_set_ether_type; 43 efx_filter_spec_set_geneve; 44 efx_filter_spec_set_ipv4_full; 45 efx_filter_spec_set_ipv4_local; 46 efx_filter_spec_set_mc_def; 47 efx_filter_spec_set_nvgre; 48 efx_filter_spec_set_rss_context; 49 efx_filter_spec_set_uc_def; 50 efx_filter_spec_set_vxlan; 51 efx_filter_supported_filters; 52 53 efx_hash_bytes; 54 efx_hash_dwords; 55 56 efx_intr_disable; 57 efx_intr_disable_unlocked; 58 efx_intr_enable; 59 efx_intr_fatal; 60 efx_intr_fini; 61 efx_intr_init; 62 efx_intr_status_line; 63 efx_intr_status_message; 64 efx_intr_trigger; 65 66 efx_loopback_mask; 67 efx_loopback_type_name; 68 69 efx_mac_addr_set; 70 efx_mac_drain; 71 efx_mac_fcntl_get; 72 efx_mac_fcntl_set; 73 efx_mac_filter_default_rxq_clear; 74 efx_mac_filter_default_rxq_set; 75 efx_mac_filter_get_all_ucast_mcast; 76 efx_mac_filter_set; 77 efx_mac_multicast_list_set; 78 efx_mac_pdu_get; 79 efx_mac_pdu_set; 80 efx_mac_stat_name; 81 efx_mac_stats_clear; 82 efx_mac_stats_get_mask; 83 efx_mac_stats_periodic; 84 efx_mac_stats_update; 85 efx_mac_stats_upload; 86 efx_mac_up; 87 88 efx_mae_action_rule_insert; 89 efx_mae_action_rule_remove; 90 efx_mae_action_set_alloc; 91 efx_mae_action_set_free; 92 efx_mae_action_set_populate_deliver; 93 efx_mae_action_set_populate_drop; 94 efx_mae_action_set_populate_flag; 95 efx_mae_action_set_populate_mark; 96 efx_mae_action_set_populate_vlan_pop; 97 efx_mae_action_set_populate_vlan_push; 98 efx_mae_action_set_spec_fini; 99 efx_mae_action_set_spec_init; 100 efx_mae_action_set_specs_equal; 101 efx_mae_encap_header_alloc; 102 efx_mae_encap_header_free; 103 efx_mae_fini; 104 efx_mae_get_limits; 105 efx_mae_init; 106 efx_mae_match_spec_field_set; 107 efx_mae_match_spec_fini; 108 efx_mae_match_spec_init; 109 efx_mae_match_spec_is_valid; 110 efx_mae_match_spec_mport_set; 111 efx_mae_match_spec_outer_rule_id_set; 112 efx_mae_match_specs_class_cmp; 113 efx_mae_match_specs_equal; 114 efx_mae_mport_by_pcie_function; 115 efx_mae_mport_by_phy_port; 116 efx_mae_outer_rule_insert; 117 efx_mae_outer_rule_remove; 118 119 efx_mcdi_fini; 120 efx_mcdi_get_proxy_handle; 121 efx_mcdi_get_timeout; 122 efx_mcdi_init; 123 efx_mcdi_new_epoch; 124 efx_mcdi_reboot; 125 efx_mcdi_request_abort; 126 efx_mcdi_request_poll; 127 efx_mcdi_request_start; 128 129 efx_mon_fini; 130 efx_mon_init; 131 efx_mon_name; 132 133 efx_nic_calculate_pcie_link_bandwidth; 134 efx_nic_cfg_get; 135 efx_nic_check_pcie_link_speed; 136 efx_nic_create; 137 efx_nic_destroy; 138 efx_nic_fini; 139 efx_nic_get_bar_region; 140 efx_nic_get_board_info; 141 efx_nic_get_fw_subvariant; 142 efx_nic_get_fw_version; 143 efx_nic_get_vi_pool; 144 efx_nic_hw_unavailable; 145 efx_nic_init; 146 efx_nic_probe; 147 efx_nic_reset; 148 efx_nic_set_drv_limits; 149 efx_nic_set_drv_version; 150 efx_nic_set_fw_subvariant; 151 efx_nic_set_hw_unavailable; 152 efx_nic_unprobe; 153 154 efx_phy_adv_cap_get; 155 efx_phy_adv_cap_set; 156 efx_phy_fec_type_get; 157 efx_phy_link_state_get; 158 efx_phy_lp_cap_get; 159 efx_phy_media_type_get; 160 efx_phy_module_get_info; 161 efx_phy_oui_get; 162 efx_phy_verify; 163 164 efx_port_fini; 165 efx_port_init; 166 efx_port_loopback_set; 167 efx_port_poll; 168 169 efx_pseudo_hdr_hash_get; 170 efx_pseudo_hdr_pkt_length_get; 171 172 efx_rx_fini; 173 efx_rx_hash_default_support_get; 174 efx_rx_init; 175 efx_rx_prefix_get_layout; 176 efx_rx_prefix_layout_check; 177 efx_rx_qcreate; 178 efx_rx_qcreate_es_super_buffer; 179 efx_rx_qdestroy; 180 efx_rx_qenable; 181 efx_rx_qflush; 182 efx_rx_qpost; 183 efx_rx_qpush; 184 efx_rx_scale_context_alloc; 185 efx_rx_scale_context_free; 186 efx_rx_scale_default_support_get; 187 efx_rx_scale_hash_flags_get; 188 efx_rx_scale_key_set; 189 efx_rx_scale_mode_set; 190 efx_rx_scale_tbl_set; 191 efx_rxq_nbufs; 192 efx_rxq_size; 193 194 efx_sram_buf_tbl_clear; 195 efx_sram_buf_tbl_set; 196 197 efx_tunnel_config_clear; 198 efx_tunnel_config_udp_add; 199 efx_tunnel_config_udp_remove; 200 efx_tunnel_fini; 201 efx_tunnel_init; 202 efx_tunnel_reconfigure; 203 204 efx_tx_fini; 205 efx_tx_init; 206 efx_tx_qcreate; 207 efx_tx_qdesc_checksum_create; 208 efx_tx_qdesc_dma_create; 209 efx_tx_qdesc_post; 210 efx_tx_qdesc_tso_create; 211 efx_tx_qdesc_tso2_create; 212 efx_tx_qdesc_vlantci_create; 213 efx_tx_qdestroy; 214 efx_tx_qenable; 215 efx_tx_qflush; 216 efx_tx_qpace; 217 efx_tx_qpio_disable; 218 efx_tx_qpio_enable; 219 efx_tx_qpio_post; 220 efx_tx_qpio_write; 221 efx_tx_qpost; 222 efx_tx_qpush; 223 efx_txq_nbufs; 224 efx_txq_size; 225 226 sfc_efx_dev_class_get; 227 sfc_efx_family; 228 229 sfc_efx_mcdi_init; 230 sfc_efx_mcdi_fini; 231 232 local: *; 233}; 234