xref: /dpdk/drivers/common/mlx5/version.map (revision 5a196330)
1INTERNAL {
2	global:
3
4	mlx5_common_init;
5
6	mlx5_common_verbs_reg_mr;
7	mlx5_common_verbs_dereg_mr;
8
9	mlx5_create_mr_ext;
10
11	mlx5_dev_to_pci_addr;
12
13	mlx5_devx_cmd_alloc_pd;
14	mlx5_devx_cmd_create_cq;
15	mlx5_devx_cmd_create_flex_parser;
16	mlx5_devx_cmd_create_qp;
17	mlx5_devx_cmd_create_rq;
18	mlx5_devx_cmd_create_rqt;
19	mlx5_devx_cmd_create_sq;
20	mlx5_devx_cmd_create_tir;
21	mlx5_devx_cmd_create_td;
22	mlx5_devx_cmd_create_tis;
23	mlx5_devx_cmd_create_virtio_q_counters;
24	mlx5_devx_cmd_create_virtq;
25        mlx5_devx_cmd_create_flow_hit_aso_obj;
26	mlx5_devx_cmd_create_geneve_tlv_option;
27	mlx5_devx_cmd_destroy;
28	mlx5_devx_cmd_flow_counter_alloc;
29	mlx5_devx_cmd_flow_counter_query;
30	mlx5_devx_cmd_flow_dump;
31	mlx5_devx_cmd_mkey_create;
32	mlx5_devx_cmd_modify_qp_state;
33	mlx5_devx_cmd_modify_rq;
34	mlx5_devx_cmd_modify_rqt;
35	mlx5_devx_cmd_modify_sq;
36	mlx5_devx_cmd_modify_tir;
37	mlx5_devx_cmd_modify_virtq;
38	mlx5_devx_cmd_qp_query_tis_td;
39	mlx5_devx_cmd_query_hca_attr;
40	mlx5_devx_cmd_query_parse_samples;
41	mlx5_devx_cmd_query_virtio_q_counters;
42	mlx5_devx_cmd_query_virtq;
43	mlx5_devx_cmd_register_read;
44	mlx5_devx_get_out_command_status;
45	mlx5_devx_alloc_uar;
46
47	mlx5_devx_cq_create;
48	mlx5_devx_cq_destroy;
49	mlx5_devx_rq_create;
50	mlx5_devx_rq_destroy;
51	mlx5_devx_sq_create;
52	mlx5_devx_sq_destroy;
53
54	mlx5_get_ifname_sysfs;
55
56	mlx5_mp_init_primary;
57	mlx5_mp_uninit_primary;
58	mlx5_mp_init_secondary;
59	mlx5_mp_uninit_secondary;
60	mlx5_mp_req_mr_create;
61	mlx5_mp_req_queue_state_modify;
62	mlx5_mp_req_verbs_cmd_fd;
63
64	mlx5_mr_btree_init;
65	mlx5_mr_btree_free;
66	mlx5_mr_btree_dump;
67	mlx5_mr_addr2mr_bh;
68	mlx5_mr_release_cache;
69	mlx5_mr_dump_cache;
70	mlx5_mr_rebuild_cache;
71	mlx5_mr_insert_cache;
72	mlx5_mr_lookup_cache;
73	mlx5_mr_lookup_list;
74	mlx5_mr_create_primary;
75	mlx5_mr_flush_local_cache;
76	mlx5_mr_free;
77
78	mlx5_nl_allmulti;
79	mlx5_nl_devlink_family_id_get;
80	mlx5_nl_driver_reload;
81	mlx5_nl_enable_roce_get;
82	mlx5_nl_enable_roce_set;
83	mlx5_nl_ifindex;
84	mlx5_nl_init;
85	mlx5_nl_mac_addr_add;
86	mlx5_nl_mac_addr_flush;
87	mlx5_nl_mac_addr_remove;
88	mlx5_nl_mac_addr_sync;
89	mlx5_nl_portnum;
90	mlx5_nl_promisc;
91	mlx5_nl_switch_info;
92	mlx5_nl_vf_mac_addr_modify;
93	mlx5_nl_vlan_vmwa_create;
94	mlx5_nl_vlan_vmwa_delete;
95
96	mlx5_translate_port_name;
97
98	mlx5_malloc_mem_select;
99	mlx5_memory_stat_dump;
100	mlx5_malloc;
101	mlx5_realloc;
102	mlx5_free;
103
104	mlx5_pci_driver_register;
105};
106