1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(C) 2021 Marvell. 3 */ 4 5 #include "roc_api.h" 6 #include "roc_priv.h" 7 8 struct idev_cfg * 9 idev_get_cfg(void) 10 { 11 static const char name[] = "roc_cn10k_intra_device_conf"; 12 const struct plt_memzone *mz; 13 struct idev_cfg *idev; 14 15 mz = plt_memzone_lookup(name); 16 if (mz != NULL) 17 return mz->addr; 18 19 /* Request for the first time */ 20 mz = plt_memzone_reserve_cache_align(name, sizeof(struct idev_cfg)); 21 if (mz != NULL) { 22 idev = mz->addr; 23 idev_set_defaults(idev); 24 return idev; 25 } 26 return NULL; 27 } 28 29 void 30 idev_set_defaults(struct idev_cfg *idev) 31 { 32 idev->sso_pf_func = 0; 33 idev->npa = NULL; 34 idev->npa_pf_func = 0; 35 idev->max_pools = 128; 36 idev->lmt_pf_func = 0; 37 idev->lmt_base_addr = 0; 38 idev->num_lmtlines = 0; 39 idev->bphy = NULL; 40 idev->cpt = NULL; 41 idev->nix_inl_dev = NULL; 42 plt_spinlock_init(&idev->nix_inl_dev_lock); 43 __atomic_store_n(&idev->npa_refcnt, 0, __ATOMIC_RELEASE); 44 } 45 46 uint16_t 47 idev_sso_pffunc_get(void) 48 { 49 struct idev_cfg *idev; 50 uint16_t sso_pf_func; 51 52 idev = idev_get_cfg(); 53 sso_pf_func = 0; 54 if (idev != NULL) 55 sso_pf_func = __atomic_load_n(&idev->sso_pf_func, 56 __ATOMIC_ACQUIRE); 57 58 return sso_pf_func; 59 } 60 61 void 62 idev_sso_pffunc_set(uint16_t sso_pf_func) 63 { 64 struct idev_cfg *idev; 65 66 idev = idev_get_cfg(); 67 if (idev != NULL) 68 __atomic_store_n(&idev->sso_pf_func, sso_pf_func, 69 __ATOMIC_RELEASE); 70 } 71 72 uint16_t 73 idev_npa_pffunc_get(void) 74 { 75 struct idev_cfg *idev; 76 uint16_t npa_pf_func; 77 78 idev = idev_get_cfg(); 79 npa_pf_func = 0; 80 if (idev != NULL) 81 npa_pf_func = idev->npa_pf_func; 82 83 return npa_pf_func; 84 } 85 86 struct npa_lf * 87 idev_npa_obj_get(void) 88 { 89 struct idev_cfg *idev; 90 91 idev = idev_get_cfg(); 92 if (idev && __atomic_load_n(&idev->npa_refcnt, __ATOMIC_ACQUIRE)) 93 return idev->npa; 94 95 return NULL; 96 } 97 98 uint32_t 99 roc_idev_npa_maxpools_get(void) 100 { 101 struct idev_cfg *idev; 102 uint32_t max_pools; 103 104 idev = idev_get_cfg(); 105 max_pools = 0; 106 if (idev != NULL) 107 max_pools = idev->max_pools; 108 109 return max_pools; 110 } 111 112 void 113 roc_idev_npa_maxpools_set(uint32_t max_pools) 114 { 115 struct idev_cfg *idev; 116 117 idev = idev_get_cfg(); 118 if (idev != NULL) 119 __atomic_store_n(&idev->max_pools, max_pools, __ATOMIC_RELEASE); 120 } 121 122 uint16_t 123 idev_npa_lf_active(struct dev *dev) 124 { 125 struct idev_cfg *idev; 126 127 /* Check if npalf is actively used on this dev */ 128 idev = idev_get_cfg(); 129 if (!idev || !idev->npa || idev->npa->mbox != dev->mbox) 130 return 0; 131 132 return __atomic_load_n(&idev->npa_refcnt, __ATOMIC_ACQUIRE); 133 } 134 135 uint16_t 136 idev_lmt_pffunc_get(void) 137 { 138 struct idev_cfg *idev; 139 uint16_t lmt_pf_func; 140 141 idev = idev_get_cfg(); 142 lmt_pf_func = 0; 143 if (idev != NULL) 144 lmt_pf_func = idev->lmt_pf_func; 145 146 return lmt_pf_func; 147 } 148 149 uint64_t 150 roc_idev_lmt_base_addr_get(void) 151 { 152 uint64_t lmt_base_addr; 153 struct idev_cfg *idev; 154 155 idev = idev_get_cfg(); 156 lmt_base_addr = 0; 157 if (idev != NULL) 158 lmt_base_addr = idev->lmt_base_addr; 159 160 return lmt_base_addr; 161 } 162 163 uint16_t 164 roc_idev_num_lmtlines_get(void) 165 { 166 struct idev_cfg *idev; 167 uint16_t num_lmtlines; 168 169 idev = idev_get_cfg(); 170 num_lmtlines = 0; 171 if (idev != NULL) 172 num_lmtlines = idev->num_lmtlines; 173 174 return num_lmtlines; 175 } 176 177 struct roc_cpt * 178 roc_idev_cpt_get(void) 179 { 180 struct idev_cfg *idev = idev_get_cfg(); 181 182 if (idev != NULL) 183 return idev->cpt; 184 185 return NULL; 186 } 187 188 uint64_t * 189 roc_nix_inl_outb_ring_base_get(struct roc_nix *roc_nix) 190 { 191 struct nix *nix = roc_nix_to_nix_priv(roc_nix); 192 struct idev_cfg *idev = idev_get_cfg(); 193 struct nix_inl_dev *inl_dev; 194 195 if (!idev || !idev->nix_inl_dev) 196 return NULL; 197 198 inl_dev = idev->nix_inl_dev; 199 200 return (uint64_t *)&inl_dev->sa_soft_exp_ring[nix->outb_se_ring_base]; 201 } 202 203 void 204 roc_idev_cpt_set(struct roc_cpt *cpt) 205 { 206 struct idev_cfg *idev = idev_get_cfg(); 207 208 if (idev != NULL) 209 __atomic_store_n(&idev->cpt, cpt, __ATOMIC_RELEASE); 210 } 211 212 struct roc_nix * 213 roc_idev_npa_nix_get(void) 214 { 215 struct npa_lf *npa_lf = idev_npa_obj_get(); 216 struct dev *dev; 217 218 if (!npa_lf) 219 return NULL; 220 221 dev = container_of(npa_lf, struct dev, npa); 222 return dev->roc_nix; 223 } 224 225 struct roc_sso * 226 idev_sso_get(void) 227 { 228 struct idev_cfg *idev = idev_get_cfg(); 229 230 if (idev != NULL) 231 return __atomic_load_n(&idev->sso, __ATOMIC_ACQUIRE); 232 233 return NULL; 234 } 235 236 void 237 idev_sso_set(struct roc_sso *sso) 238 { 239 struct idev_cfg *idev = idev_get_cfg(); 240 241 if (idev != NULL) 242 __atomic_store_n(&idev->sso, sso, __ATOMIC_RELEASE); 243 } 244