1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(C) 2021 Marvell. 3 */ 4 5 #ifndef _ROC_DEV_PRIV_H 6 #define _ROC_DEV_PRIV_H 7 8 #define DEV_HWCAP_F_VF BIT_ULL(0) /* VF device */ 9 10 #define RVU_PFVF_PF_SHIFT 10 11 #define RVU_PFVF_PF_MASK 0x3F 12 #define RVU_PFVF_FUNC_SHIFT 0 13 #define RVU_PFVF_FUNC_MASK 0x3FF 14 #define RVU_MAX_VF 64 /* RVU_PF_VFPF_MBOX_INT(0..1) */ 15 #define RVU_MAX_INT_RETRY 3 16 17 /* PF/VF message handling timer */ 18 #define VF_PF_MBOX_TIMER_MS (20 * 1000) 19 20 typedef struct { 21 /* 128 devices translate to two 64 bits dwords */ 22 #define MAX_VFPF_DWORD_BITS 2 23 uint64_t bits[MAX_VFPF_DWORD_BITS]; 24 } dev_intr_t; 25 26 /* Link status update callback */ 27 typedef void (*link_info_t)(void *roc_nix, 28 struct cgx_link_user_info *link); 29 30 /* PTP info callback */ 31 typedef int (*ptp_info_t)(void *roc_nix, bool enable); 32 33 struct dev_ops { 34 link_info_t link_status_update; 35 ptp_info_t ptp_info_update; 36 }; 37 38 #define dev_is_vf(dev) ((dev)->hwcap & DEV_HWCAP_F_VF) 39 40 static inline int 41 dev_get_vf(uint16_t pf_func) 42 { 43 return (((pf_func >> RVU_PFVF_FUNC_SHIFT) & RVU_PFVF_FUNC_MASK) - 1); 44 } 45 46 static inline int 47 dev_get_pf(uint16_t pf_func) 48 { 49 return (pf_func >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; 50 } 51 52 static inline int 53 dev_pf_func(int pf, int vf) 54 { 55 return (pf << RVU_PFVF_PF_SHIFT) | ((vf << RVU_PFVF_FUNC_SHIFT) + 1); 56 } 57 58 static inline int 59 dev_is_afvf(uint16_t pf_func) 60 { 61 return !(pf_func & ~RVU_PFVF_FUNC_MASK); 62 } 63 64 struct dev { 65 uint16_t pf; 66 int16_t vf; 67 uint16_t pf_func; 68 uint8_t mbox_active; 69 bool drv_inited; 70 uint64_t active_vfs[MAX_VFPF_DWORD_BITS]; 71 uintptr_t bar2; 72 uintptr_t bar4; 73 uintptr_t lmt_base; 74 struct mbox mbox_local; 75 struct mbox mbox_up; 76 struct mbox mbox_vfpf; 77 struct mbox mbox_vfpf_up; 78 dev_intr_t intr; 79 int timer_set; /* ~0 : no alarm handling */ 80 uint64_t hwcap; 81 struct npa_lf npa; 82 struct mbox *mbox; 83 uint16_t maxvf; 84 struct dev_ops *ops; 85 void *roc_nix; 86 bool disable_shared_lmt; /* false(default): shared lmt mode enabled */ 87 } __plt_cache_aligned; 88 89 struct npa { 90 struct plt_pci_device *pci_dev; 91 struct dev dev; 92 } __plt_cache_aligned; 93 94 extern uint16_t dev_rclk_freq; 95 extern uint16_t dev_sclk_freq; 96 97 int dev_init(struct dev *dev, struct plt_pci_device *pci_dev); 98 int dev_fini(struct dev *dev, struct plt_pci_device *pci_dev); 99 int dev_active_vfs(struct dev *dev); 100 101 int dev_irq_register(struct plt_intr_handle *intr_handle, 102 plt_intr_callback_fn cb, void *data, unsigned int vec); 103 void dev_irq_unregister(struct plt_intr_handle *intr_handle, 104 plt_intr_callback_fn cb, void *data, unsigned int vec); 105 int dev_irqs_disable(struct plt_intr_handle *intr_handle); 106 107 #endif /* _ROC_DEV_PRIV_H */ 108