1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #ifndef _EVT_COMMON_ 6 #define _EVT_COMMON_ 7 8 #include <rte_common.h> 9 #include <rte_debug.h> 10 #include <rte_eventdev.h> 11 #include <rte_service.h> 12 13 #define CLNRM "\x1b[0m" 14 #define CLRED "\x1b[31m" 15 #define CLGRN "\x1b[32m" 16 #define CLYEL "\x1b[33m" 17 18 #define evt_err(fmt, args...) \ 19 fprintf(stderr, CLRED"error: %s() "fmt CLNRM "\n", __func__, ## args) 20 21 #define evt_info(fmt, args...) \ 22 fprintf(stdout, CLYEL""fmt CLNRM "\n", ## args) 23 24 #define EVT_STR_FMT 20 25 26 #define evt_dump(str, fmt, val...) \ 27 printf("\t%-*s : "fmt"\n", EVT_STR_FMT, str, ## val) 28 29 #define evt_dump_begin(str) printf("\t%-*s : {", EVT_STR_FMT, str) 30 31 #define evt_dump_end printf("\b}\n") 32 33 #define EVT_MAX_STAGES 64 34 #define EVT_MAX_PORTS 256 35 #define EVT_MAX_QUEUES 256 36 37 enum evt_prod_type { 38 EVT_PROD_TYPE_NONE, 39 EVT_PROD_TYPE_SYNT, /* Producer type Synthetic i.e. CPU. */ 40 EVT_PROD_TYPE_ETH_RX_ADPTR, /* Producer type Eth Rx Adapter. */ 41 EVT_PROD_TYPE_EVENT_TIMER_ADPTR, /* Producer type Timer Adapter. */ 42 EVT_PROD_TYPE_MAX, 43 }; 44 45 struct evt_options { 46 #define EVT_TEST_NAME_MAX_LEN 32 47 char test_name[EVT_TEST_NAME_MAX_LEN]; 48 bool plcores[RTE_MAX_LCORE]; 49 bool wlcores[RTE_MAX_LCORE]; 50 int pool_sz; 51 int socket_id; 52 int nb_stages; 53 int verbose_level; 54 uint8_t dev_id; 55 uint8_t timdev_cnt; 56 uint8_t nb_timer_adptrs; 57 uint8_t timdev_use_burst; 58 uint8_t sched_type_list[EVT_MAX_STAGES]; 59 uint16_t mbuf_sz; 60 uint16_t wkr_deq_dep; 61 uint16_t vector_size; 62 uint16_t eth_queues; 63 uint32_t nb_flows; 64 uint32_t tx_first; 65 uint32_t max_pkt_sz; 66 uint32_t deq_tmo_nsec; 67 uint32_t q_priority:1; 68 uint32_t fwd_latency:1; 69 uint32_t ena_vector : 1; 70 uint64_t nb_pkts; 71 uint64_t nb_timers; 72 uint64_t expiry_nsec; 73 uint64_t max_tmo_nsec; 74 uint64_t vector_tmo_nsec; 75 uint64_t timer_tick_nsec; 76 uint64_t optm_timer_tick_nsec; 77 enum evt_prod_type prod_type; 78 }; 79 80 static inline bool 81 evt_has_distributed_sched(uint8_t dev_id) 82 { 83 struct rte_event_dev_info dev_info; 84 85 rte_event_dev_info_get(dev_id, &dev_info); 86 return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED) ? 87 true : false; 88 } 89 90 static inline bool 91 evt_has_burst_mode(uint8_t dev_id) 92 { 93 struct rte_event_dev_info dev_info; 94 95 rte_event_dev_info_get(dev_id, &dev_info); 96 return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE) ? 97 true : false; 98 } 99 100 101 static inline bool 102 evt_has_all_types_queue(uint8_t dev_id) 103 { 104 struct rte_event_dev_info dev_info; 105 106 rte_event_dev_info_get(dev_id, &dev_info); 107 return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES) ? 108 true : false; 109 } 110 111 static inline bool 112 evt_has_flow_id(uint8_t dev_id) 113 { 114 struct rte_event_dev_info dev_info; 115 116 rte_event_dev_info_get(dev_id, &dev_info); 117 return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_CARRY_FLOW_ID) ? 118 true : false; 119 } 120 121 static inline int 122 evt_service_setup(uint32_t service_id) 123 { 124 int32_t core_cnt; 125 unsigned int lcore = 0; 126 uint32_t core_array[RTE_MAX_LCORE]; 127 uint8_t cnt; 128 uint8_t min_cnt = UINT8_MAX; 129 130 if (!rte_service_lcore_count()) 131 return -ENOENT; 132 133 core_cnt = rte_service_lcore_list(core_array, 134 RTE_MAX_LCORE); 135 if (core_cnt < 0) 136 return -ENOENT; 137 /* Get the core which has least number of services running. */ 138 while (core_cnt--) { 139 /* Reset default mapping */ 140 rte_service_map_lcore_set(service_id, 141 core_array[core_cnt], 0); 142 cnt = rte_service_lcore_count_services( 143 core_array[core_cnt]); 144 if (cnt < min_cnt) { 145 lcore = core_array[core_cnt]; 146 min_cnt = cnt; 147 } 148 } 149 if (rte_service_map_lcore_set(service_id, lcore, 1)) 150 return -ENOENT; 151 152 return 0; 153 } 154 155 static inline int 156 evt_configure_eventdev(struct evt_options *opt, uint8_t nb_queues, 157 uint8_t nb_ports) 158 { 159 struct rte_event_dev_info info; 160 int ret; 161 162 memset(&info, 0, sizeof(struct rte_event_dev_info)); 163 ret = rte_event_dev_info_get(opt->dev_id, &info); 164 if (ret) { 165 evt_err("failed to get eventdev info %d", opt->dev_id); 166 return ret; 167 } 168 169 if (opt->deq_tmo_nsec) { 170 if (opt->deq_tmo_nsec < info.min_dequeue_timeout_ns) { 171 opt->deq_tmo_nsec = info.min_dequeue_timeout_ns; 172 evt_info("dequeue_timeout_ns too low, using %d", 173 opt->deq_tmo_nsec); 174 } 175 if (opt->deq_tmo_nsec > info.max_dequeue_timeout_ns) { 176 opt->deq_tmo_nsec = info.max_dequeue_timeout_ns; 177 evt_info("dequeue_timeout_ns too high, using %d", 178 opt->deq_tmo_nsec); 179 } 180 } 181 182 const struct rte_event_dev_config config = { 183 .dequeue_timeout_ns = opt->deq_tmo_nsec, 184 .nb_event_queues = nb_queues, 185 .nb_event_ports = nb_ports, 186 .nb_single_link_event_port_queues = 0, 187 .nb_events_limit = info.max_num_events, 188 .nb_event_queue_flows = opt->nb_flows, 189 .nb_event_port_dequeue_depth = 190 info.max_event_port_dequeue_depth, 191 .nb_event_port_enqueue_depth = 192 info.max_event_port_enqueue_depth, 193 }; 194 195 return rte_event_dev_configure(opt->dev_id, &config); 196 } 197 198 #endif /* _EVT_COMMON_*/ 199