| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | stm32mp15-pinctrl.dtsi | 11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>; 17 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */ 26 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ 33 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */ 40 pinmux = <STM32_PINMUX('A', 15, AF4)>; 49 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */ 55 pinmux = <STM32_PINMUX('B', 6, AF5)>; 64 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */ 70 pinmux = <STM32_PINMUX('A', 4, ANALOG)>; 76 pinmux = <STM32_PINMUX('A', 5, ANALOG)>; [all …]
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| H A D | at91-sama5d27_som1_ek.dts | 249 pinmux = <PIN_PD4__TWD1>, 287 pinmux = <PIN_PA29__GPIO>; 292 pinmux = <PIN_PA10__GPIO>, 346 pinmux = <PIN_PD2__URXD1>, 358 pinmux = <PIN_PA27__GPIO>, 364 pinmux = <PIN_PD20__GPIO>; 369 pinmux = <PIN_PD25__GPIO>; 374 pinmux = <PIN_PD26__GPIO>; 379 pinmux = <PIN_PB2__GPIO>; 384 pinmux = <PIN_PA26__GPIO>; [all …]
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| H A D | at91-sama5d2_icp.dts | 354 pinmux = <PIN_PD24__GPIO>, 393 pinmux = <PIN_PD19__TWD1>, 399 pinmux = <PIN_PD0__GPIO>; 404 pinmux = <PIN_PB0__GPIO>, 460 pinmux = <PIN_PD26__GPIO>; 465 pinmux = <PIN_PC5__GPIO>; 482 pinmux = <PIN_PC4__TIOB1>; 487 pinmux = <PIN_PC3__GPIO>; 520 pinmux = <PIN_PC0__GPIO>; 615 pinmux = <PIN_PD3__GPIO>; [all …]
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| H A D | at91-sama5d2_xplained.dts | 438 pinmux = <PIN_PD23__GPIO>; 469 pinmux = <PIN_PA12__GPIO>; 474 pinmux = <PIN_PB13__GPIO>; 479 pinmux = <PIN_PC8__GPIO>; 508 pinmux = <PIN_PD12__GPIO>, 514 pinmux = <PIN_PD21__TWD0>, 526 pinmux = <PIN_PD4__TWD1>, 532 pinmux = <PIN_PD4__GPIO>, 562 pinmux = <PIN_PB9__GPIO>; 567 pinmux = <PIN_PB0__GPIO>, [all …]
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| H A D | at91-sama5d2_ptc_ek.dts | 247 pinmux = <PIN_PB28__GPIO>, 253 pinmux = <PIN_PD21__TWD0>, 259 pinmux = <PIN_PD21__GPIO>, 265 pinmux = <PIN_PC6__TWD1>, 271 pinmux = <PIN_PC6__GPIO>, 277 pinmux = <PIN_PA10__GPIO>; 282 pinmux = <PIN_PB6__GPIO>, 303 pinmux = <PIN_PB24__GPIO>; 309 pinmux = <PIN_PA22__D0>, 383 pinmux = <PIN_PB12__GPIO>; [all …]
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| H A D | imx28.dtsi | 220 fsl,pinmux-ids = < 231 fsl,pinmux-ids = < 242 fsl,pinmux-ids = < 255 fsl,pinmux-ids = < 279 fsl,pinmux-ids = < 289 fsl,pinmux-ids = < 302 fsl,pinmux-ids = < 313 fsl,pinmux-ids = < 326 fsl,pinmux-ids = < 337 fsl,pinmux-ids = < [all …]
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| H A D | at91-kizbox3_common.dtsi | 161 pinmux = <PIN_PA0__D0>, 199 pinmux = <PIN_PB28__FLEXCOM0_IO0>, //TX 204 pinmux = <PIN_PB22__FLEXCOM3_IO1>, //RX 219 pinmux = <PIN_PA30__PWMH0>; 223 pinmux = <PIN_PB0__PWMH1>; 227 pinmux = <PIN_PB5__PWMH2>; 231 pinmux = <PIN_PB7__PWMH3>; 238 pinmux = <PIN_PD21__GPIO>; 242 pinmux = <PIN_PD22__GPIO>; 246 pinmux = <PIN_PD23__GPIO>; [all …]
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| H A D | at91-sama5d27_wlsom1_ek.dts | 113 pinmux = <PIN_PD25__GPIO>, 119 pinmux = <PIN_PB28__FLEXCOM0_IO0>, 125 pinmux = <PIN_PB2__GPIO>; 130 pinmux = <PIN_PA6__GPIO>, 138 pinmux = <PIN_PA1__SDMMC0_CMD>, 147 pinmux = <PIN_PA0__SDMMC0_CK>, 156 pinmux = <PIN_PB26__URXD0>, 162 pinmux = <PIN_PB11__URXD3>, 168 pinmux = <PIN_PA31__PWML0>, 174 pinmux = <PIN_PA10__GPIO>; [all …]
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| H A D | stm32f7-pinctrl.dtsi | 132 pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */ 141 pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */ 147 pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */ 154 pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */ 160 pinmux = <STM32_PINMUX('B', 7, AF7)>; /* USART1_RX */ 167 pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */ 217 pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */ 228 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */ 241 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */ 259 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */ [all …]
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| H A D | at91-kizbox3-hs.dts | 189 pinmux= <PIN_PA22__GPIO>, 199 pinmux = <PIN_PC19__GPIO>; 203 pinmux = <PIN_PC20__GPIO>; 207 pinmux = 213 pinmux = <PIN_PC9__GPIO>; 217 pinmux = <PIN_PB21__GPIO>; 221 pinmux = <PIN_PB25__GPIO>; 226 pinmux = <PIN_PB30__GPIO>; 232 pinmux = 242 pinmux = <PIN_PB1__GPIO>; [all …]
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| H A D | mt2701-evb.dts | 113 pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>, 121 pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>, 129 pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>, 137 pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>; 143 pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>, 153 pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>, 178 pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>, 188 pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>, 228 pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>,
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| H A D | stm32f4-pinctrl.dtsi | 168 pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */ 256 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; 262 pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */ 270 pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */ 277 pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */ 321 pinmux = <STM32_PINMUX('C', 6, AF14)>, 371 pinmux = <STM32_PINMUX('F', 7, AF5)>, 380 pinmux = <STM32_PINMUX('F', 8, AF5)>; 388 pinmux = <STM32_PINMUX('C', 9, AF4)>, 423 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */ [all …]
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| H A D | r7s9210-rza2mevb.dts | 113 pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */ 127 pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */ 141 pinmux = <RZA2_PINMUX(PORTJ, 1, 6)>; /* IRQ0 */ 146 pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */ 151 pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */ 156 pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */ 161 pinmux = <RZA2_PINMUX(PORT5, 2, 3)>, /* VBUSIN0 */ 167 pinmux = <RZA2_PINMUX(PORTC, 0, 1)>, /* VBUSIN1 */
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| H A D | imx23.dtsi | 146 fsl,pinmux-ids = < 157 fsl,pinmux-ids = < 170 fsl,pinmux-ids = < 181 fsl,pinmux-ids = < 192 fsl,pinmux-ids = < 218 fsl,pinmux-ids = < 228 fsl,pinmux-ids = < 243 fsl,pinmux-ids = < 263 fsl,pinmux-ids = < 272 fsl,pinmux-ids = < [all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8183-evb.dts | 120 pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 129 pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 138 pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 147 pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 156 pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 165 pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 174 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>, 299 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>, 309 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>, 319 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>, [all …]
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| H A D | mt8183-kukui.dtsi | 365 pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 374 pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 383 pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 392 pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 401 pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 410 pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 419 pinmux = <PINMUX_GPIO11__FUNC_SCL6>, 592 pinmux = <PINMUX_GPIO95__FUNC_URXD0>; 597 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>; 611 pinmux = <PINMUX_GPIO47__FUNC_URTS1>; [all …]
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| H A D | mt8173-elm.dtsi | 599 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>; 633 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>; 639 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>; 688 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>; 798 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>, 807 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>; 813 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>; 822 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>; 836 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>; 842 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>; [all …]
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| H A D | mt2712-evb.dts | 132 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>, 141 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>, 150 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>, 159 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>, 167 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>, 176 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>, 185 pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>; 192 pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
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| /f-stack/freebsd/contrib/device-tree/src/arm64/qcom/ |
| H A D | msm8996-pins.dtsi | 52 pinmux { 74 pinmux { 86 pinmux { 98 pinmux { 110 pinmux { 122 pinmux { 134 pinmux { 146 pinmux { 158 pinmux { 171 pinmux { [all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/ |
| H A D | renesas,rzn1-pinctrl.txt | 42 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 48 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 53 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 60 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 66 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 70 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 77 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ; 104 - pinmux: 111 argument list of a single "pinmux" property. 134 pinmux = < [all …]
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| H A D | pinctrl-zx.txt | 17 | pinmux | 23 | pinmux | | 24 | pinmux v | 36 For most of pins like GMII_RXD3 in the figure, the pinmux function is 38 'TOP pins'. For pins like KEY_ROW2, the pinmux is controlled by both 41 Though pinmux implementation is quite different, pinconf is same for both 49 implements pinmux for AON pins and pinconf for all pins.
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| H A D | nvidia,tegra124-pinmux.txt | 1 NVIDIA Tegra124 pinmux controller 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For 10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'. 13 -- second entry - the pinmux registers 116 pinmux: pinmux { 117 compatible = "nvidia,tegra124-pinmux"; 123 Example pinmux entries: 126 sdmmc4_default: pinmux {
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| H A D | brcm,bcm4708-pinmux.txt | 10 Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon" 15 "brcm,bcm4708-pinmux" 16 "brcm,bcm4709-pinmux" 17 "brcm,bcm53012-pinmux" 46 compatible = "brcm,bcm4708-pinmux";
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| H A D | pinctrl-mt65xx.txt | 15 - pins-are-numbered: Specify the subnodes are using numbered pinmux to 51 pinmux = <PIN_NUMBER_PINMUX>; 56 - pinmux: integer array, represents gpio pin number and mux setting. 105 pinmux = <MT8135_PIN_100_SDA0__FUNC_SDA0>, 113 pinmux = <MT8135_PIN_195_SDA1__FUNC_SDA1>, 121 pinmux = <MT8135_PIN_193_SDA2__FUNC_SDA2>; 126 pinmux = <MT8135_PIN_49_WATCHDOG__FUNC_GPIO49>; 133 pinmux = <MT8135_PIN_40_DAC_CLK__FUNC_GPIO40>, 139 pinmux = <MT8135_PIN_35_SCL3__FUNC_SCL3>, 146 pinmux = <MT8135_PIN_57_JTCK__FUNC_GPIO57>,
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| H A D | nvidia,tegra194-pinmux.txt | 1 NVIDIA Tegra194 pinmux controller 4 - compatible: "nvidia,tegra194-pinmux" 7 - second entry: The PINMUX_AUX_* registers (pinmux) 60 These correspond to Tegra PADCTL_* (pinmux) registers. 64 These correspond to Tegra PADCTL_* (pinmux) registers. Any property 72 See the list above for the pin name to use when configuring the pinmux. 88 tegra_pinctrl: pinmux: pinmux@2430000 { 89 compatible = "nvidia,tegra194-pinmux";
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