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Searched refs:neg_cond (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dneon-bitselect.ll20 %neg_cond = sub <4 x i32> zeroinitializer, %pre_cond
22 %left_bits_0 = and <4 x i32> %neg_cond, %left
34 %neg_cond = sub <4 x i32> zeroinitializer, %pre_cond
36 %left_bits_1 = and <4 x i32> %left, %neg_cond
48 %neg_cond = sub <4 x i32> zeroinitializer, %pre_cond
50 %left_bits_0 = and <4 x i32> %neg_cond, %left
64 %left_bits_1 = and <4 x i32> %left, %neg_cond
78 %left_bits_0 = and <4 x i32> %neg_cond, %left
92 %left_bits_0 = and <4 x i32> %neg_cond, %left
106 %left_bits_1 = and <4 x i32> %left, %neg_cond
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H A Dsve-fixed-length-bitselect.ll31 %neg_cond = sub <8 x i32> zeroinitializer, %pre_cond
33 %left_bits_0 = and <8 x i32> %neg_cond, %left