| /llvm-project-15.0.7/llvm/test/tools/llvm-objcopy/ELF/ |
| H A D | parent-loop-check.test | 4 # PT_LOAD segment won't set the PT_NOTE segment as the first to be laid out 5 # while the PT_NOTE segment sets the PT_LOAD load to be the first to be laid
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | tail-dup-no-other-successor.ll | 7 ; After the loop gets laid out, loop.end is the only successor, but can't be 8 ; laid out because of the CFG dependency from top.fakephi. The calculations show
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| H A D | tail-call-legality.ll | 15 ; because of how the extra registers are laid out.
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| H A D | block-placement.ll | 220 ; Check that we don't try to rotate a loop which is already laid out with 607 ; a chain for an inner loop which happened to be laid out backwards we don't 944 ; 2) The exiting edge from the loop which is rotated to be laid out at the 1065 ; marked as not expected to be taken. They should be laid out
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| H A D | zlib-longest-match.ll | 25 ; the two hot blocks are laid out close to each other.
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| /llvm-project-15.0.7/lld/test/ELF/ |
| H A D | section-layout.s | 6 # Check that sections are laid out in the correct order.
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| /llvm-project-15.0.7/llvm/test/Transforms/LowerTypeTests/ |
| H A D | layout.ll | 5 ; Tests that this set of globals is laid out according to our layout algorithm
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-big-endian-eh.ll | 4 ; This test case checks whether CIE length record is laid out in big endian format.
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| H A D | aarch64-isel-csinc.ll | 99 ; prevent larger constants (the add laid after csinc)
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | big-endian-eh-unwind.ll | 4 ; This test case checks whether frame unwinding instructions are laid out in big endian format.
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| /llvm-project-15.0.7/llvm/docs/PDB/ |
| H A D | index.rst | 66 necessarily be contiguously laid out within the MSF container file. 68 the streams (files) are laid out within the MSF.
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| H A D | MsfFile.rst | 50 At file offset 0 in an MSF file is the MSF *SuperBlock*, which is laid out as 176 necessarily contiguously laid out in the file, this means that both the consumer
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| H A D | ModiStream.rst | 27 A modi stream is laid out as follows:
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| /llvm-project-15.0.7/llvm/docs/Proposals/ |
| H A D | VectorPredication.rst | 77 has laid the groundwork).
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | tail-dup-break-cfg.ll | 97 ; This function arranges for the successors of %succ to have already been laid
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| /llvm-project-15.0.7/polly/lib/ |
| H A D | CMakeLists.txt | 117 # laid out on disk
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | BigEndianNEON.rst | 48 …into 8-bit chunks, and endianness describes the order in which these chunks are laid out in memory. 61 … byte swapping the lane indices end up being swapped! The zero'th item as laid out in memory becom…
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| H A D | DeveloperPolicy.rst | 760 * The code conforms to all of the policies laid out in this developer policy 854 * Must conform to all of the policies laid out in this developer policy 893 * Must conform to the license, patent, and code of conduct policies laid out
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| /llvm-project-15.0.7/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 39 The scheme will cause the virtual tables for A, B and C to be laid out 62 In this case, assuming A is laid out at offset 0 in bit 0, B at offset 0 in 194 sub-hierarchies are laid out to each other, the smaller the bit vectors for 230 The virtual tables will be laid out like this:
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| H A D | MatrixTypes.rst | 286 The elements of a value of a matrix type are laid out in column-major order
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| H A D | ConstantInterpreter.rst | 190 Records are laid out identically to arrays of composites: each field and base
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| /llvm-project-15.0.7/lldb/docs/use/ |
| H A D | symbols.rst | 272 **~/Library/SymbolCache/dsyms/uuids**. We can easily see how things are laid
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| /llvm-project-15.0.7/lldb/docs/status/ |
| H A D | projects.rst | 119 how the type is actually laid out. The latter are pretty much always going to
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| /llvm-project-15.0.7/mlir/docs/Dialects/ |
| H A D | SPIR-V.md | 1066 laid out. If a `spv.GlobalVariable` is not explicitly laid out, the utility
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/LLVMIR/ |
| H A D | NVVMOps.td | 852 warp contains the start address of a row of 8 elements laid out as below:
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