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Searched refs:seq_cst (Results 1 – 25 of 563) sorted by relevance

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/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dconsecutive-fences.ll12 fence seq_cst
13 fence seq_cst
14 fence seq_cst
39 fence seq_cst
51 fence seq_cst
53 fence seq_cst
61 fence seq_cst
63 fence seq_cst
71 fence seq_cst
73 fence seq_cst
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dfp-atomic-to-s_denormmode.mir12 …64, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load store seq_cst seq_cst (s32) on `flo…
24 …28, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load store seq_cst seq_cst (s32) on `flo…
36 …32, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load store seq_cst seq_cst (s32) on `flo…
48 …64, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load store seq_cst seq_cst (s32) on `flo…
60 …32, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load store seq_cst seq_cst (s32) on `flo…
156 …g_64, undef %1:vreg_64, 0, 0, implicit $exec :: (volatile load store seq_cst seq_cst (s32) on `flo…
168 …_64, undef %1:vreg_128, 0, 0, implicit $exec :: (volatile load store seq_cst seq_cst (s32) on `flo…
180 …g_64, undef %1:vgpr_32, 0, 0, implicit $exec :: (volatile load store seq_cst seq_cst (s32) on `flo…
192 …g_64, undef %1:vreg_64, 0, 0, implicit $exec :: (volatile load store seq_cst seq_cst (s32) on `flo…
204 …g_64, undef %1:vgpr_32, 0, 0, implicit $exec :: (volatile load store seq_cst seq_cst (s32) on `flo…
[all …]
H A Dflat_atomics_i64.ll9 %tmp0 = atomicrmw volatile add i64* %gep, i64 %in seq_cst
879 store atomic i64 %in, i64* %out seq_cst, align 8
907 %val = cmpxchg volatile i64* %gep, i64 %old, i64 %in seq_cst seq_cst
916 %val = cmpxchg volatile i64* %gep, i64 %old, i64 %in seq_cst seq_cst
926 %val = cmpxchg volatile i64* %gep, i64 %old, i64 %in seq_cst seq_cst
938 %val = cmpxchg volatile i64* %gep, i64 %old, i64 %in seq_cst seq_cst
949 %val = cmpxchg volatile i64* %gep, i64 %old, i64 %in seq_cst seq_cst
959 %val = cmpxchg volatile i64* %out, i64 %old, i64 %in seq_cst seq_cst
968 %val = cmpxchg volatile i64* %out, i64 %old, i64 %in seq_cst seq_cst
979 %val = cmpxchg volatile i64* %ptr, i64 %old, i64 %in seq_cst seq_cst
[all …]
H A Dflat_atomics.ll11 %val = atomicrmw volatile add i32* %gep, i32 %in seq_cst
798 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in seq_cst seq_cst
809 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in seq_cst seq_cst
822 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in seq_cst seq_cst
834 %val = cmpxchg volatile i32* %gep, i32 %old, i32 %in seq_cst seq_cst
844 %val = cmpxchg volatile i32* %out, i32 %old, i32 %in seq_cst seq_cst
853 %val = cmpxchg volatile i32* %out, i32 %old, i32 %in seq_cst seq_cst
864 %val = cmpxchg volatile i32* %ptr, i32 %old, i32 %in seq_cst seq_cst
874 %val = cmpxchg volatile i32* %ptr, i32 %old, i32 %in seq_cst seq_cst
1181 store atomic i8 %in, i8* %out seq_cst, align 1
[all …]
H A Dr600.global_atomics.ll12 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 %in seq_cst
22 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 %in seq_cst
34 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 %in seq_cst
394 %val = cmpxchg volatile i32 addrspace(1)* %gep, i32 %old, i32 %in seq_cst seq_cst
405 %val = cmpxchg volatile i32 addrspace(1)* %gep, i32 %old, i32 %in seq_cst seq_cst
414 %val = cmpxchg volatile i32 addrspace(1)* %out, i32 %old, i32 %in seq_cst seq_cst
424 %val = cmpxchg volatile i32 addrspace(1)* %ptr, i32 %old, i32 %in seq_cst seq_cst
474 store atomic i32 %in, i32 addrspace(1)* %gep seq_cst, align 4
483 store atomic i32 %in, i32 addrspace(1)* %out seq_cst, align 4
494 store atomic i32 %in, i32 addrspace(1)* %gep seq_cst, align 4
[all …]
H A Dlocal-atomics64.ll12 %result = atomicrmw xchg i64 addrspace(3)* %ptr, i64 4 seq_cst
25 %result = atomicrmw xchg i64 addrspace(3)* %gep, i64 4 seq_cst
63 %result = atomicrmw add i64 addrspace(3)* %ptr, i64 4 seq_cst
82 %result = atomicrmw add i64 addrspace(3)* %gep, i64 9 seq_cst
97 %result = atomicrmw add i64 addrspace(3)* %ptr, i64 1 seq_cst
110 %result = atomicrmw add i64 addrspace(3)* %gep, i64 1 seq_cst
122 %result = atomicrmw sub i64 addrspace(3)* %ptr, i64 4 seq_cst
135 %result = atomicrmw sub i64 addrspace(3)* %gep, i64 4 seq_cst
150 %result = atomicrmw sub i64 addrspace(3)* %ptr, i64 1 seq_cst
200 %result = atomicrmw or i64 addrspace(3)* %ptr, i64 4 seq_cst
[all …]
H A Dlocal-atomics.ll20 %result = atomicrmw xchg i32 addrspace(3)* %ptr, i32 4 seq_cst
34 %result = atomicrmw xchg i32 addrspace(3)* %gep, i32 4 seq_cst
67 %result = atomicrmw add i32 addrspace(3)* %ptr, i32 4 seq_cst
81 %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
98 %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
113 %result = atomicrmw add i32 addrspace(3)* %ptr, i32 1 seq_cst
129 %result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst
146 %result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst
160 %result = atomicrmw sub i32 addrspace(3)* %ptr, i32 4 seq_cst
247 %result = atomicrmw or i32 addrspace(3)* %ptr, i32 4 seq_cst
[all …]
H A Dglobal_atomics.ll11 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 %in seq_cst
949 %val = cmpxchg volatile i32 addrspace(1)* %gep, i32 %old, i32 %in seq_cst seq_cst
961 %val = cmpxchg volatile i32 addrspace(1)* %gep, i32 %old, i32 %in seq_cst seq_cst
976 %val = cmpxchg volatile i32 addrspace(1)* %gep, i32 %old, i32 %in seq_cst seq_cst
990 %val = cmpxchg volatile i32 addrspace(1)* %gep, i32 %old, i32 %in seq_cst seq_cst
1002 %val = cmpxchg volatile i32 addrspace(1)* %out, i32 %old, i32 %in seq_cst seq_cst
1013 %val = cmpxchg volatile i32 addrspace(1)* %out, i32 %old, i32 %in seq_cst seq_cst
1026 %val = cmpxchg volatile i32 addrspace(1)* %ptr, i32 %old, i32 %in seq_cst seq_cst
1039 %val = cmpxchg volatile i32 addrspace(1)* %ptr, i32 %old, i32 %in seq_cst seq_cst
1356 store atomic i8 %in, i8 addrspace(1)* %gep seq_cst, align 1
[all …]
/llvm-project-15.0.7/llvm/test/Assembler/
H A Datomic.ll27 cmpxchg weak i32* %x, i32 13, i32 0 seq_cst monotonic
28 ; CHECK: atomicrmw add i32* %x, i32 10 seq_cst
29 atomicrmw add i32* %x, i32 10 seq_cst
36 ; CHECK: fence seq_cst
37 fence seq_cst
38 ; CHECK: fence syncscope("device") seq_cst
39 fence syncscope("device") seq_cst
45 atomicrmw fadd float* %x, float 1.0 seq_cst
48 atomicrmw volatile fadd float* %x, float 1.0 seq_cst
51 atomicrmw fmax float* %x, float 1.0 seq_cst
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dnocx16.ll5 %0 = cmpxchg ptr %a, i128 1, i128 1 seq_cst seq_cst
7 %1 = atomicrmw xchg ptr %a, i128 1 seq_cst
9 %2 = atomicrmw add ptr %a, i128 1 seq_cst
11 %3 = atomicrmw sub ptr %a, i128 1 seq_cst
13 %4 = atomicrmw and ptr %a, i128 1 seq_cst
15 %5 = atomicrmw nand ptr %a, i128 1 seq_cst
17 %6 = atomicrmw or ptr %a, i128 1 seq_cst
19 %7 = atomicrmw xor ptr %a, i128 1 seq_cst
H A Dcmpxchg-i1.ll9 %pair = cmpxchg ptr %addr, i32 %desired, i32 %new seq_cst seq_cst
20 %pair = cmpxchg ptr %addr, i64 %desired, i64 %new seq_cst seq_cst
39 %pair = cmpxchg ptr %addr, i32 %desired, i32 %new seq_cst seq_cst
51 %pair = cmpxchg ptr %addr, i32 %desired, i32 %new seq_cst seq_cst
71 %init = load atomic i32, ptr %addr seq_cst, align 4
77 %pair = cmpxchg ptr %addr, i32 %old, i32 %new seq_cst seq_cst
/llvm-project-15.0.7/llvm/test/Analysis/MemoryDependenceAnalysis/
H A Dreorder-over-store-atomic.ll17 %lv = load atomic i32, i32* @u seq_cst, align 4
47 store atomic i32 %x, i32* @u seq_cst, align 4
73 store atomic i32 %x, i32* @u seq_cst, align 4
102 %l1 = load atomic i32, i32* @w seq_cst, align 4
103 %lv = load atomic i32, i32* @u seq_cst, align 4
104 %l2 = load atomic i32, i32* @w seq_cst, align 4
118 %l1 = load atomic i32, i32* @w seq_cst, align 4
119 store atomic i32 %x, i32* @u seq_cst, align 4
132 store atomic i32 %x, i32* @w seq_cst, align 4
133 store atomic i32 %x, i32* @u seq_cst, align 4
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dcmpxchg-03.ll10 %pair = cmpxchg i32 *%src, i32 %cmp, i32 %swap seq_cst seq_cst
21 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
32 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
43 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
56 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
67 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
78 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
91 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
104 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
118 %pair = cmpxchg i32 *%ptr, i32 %cmp, i32 %swap seq_cst seq_cst
[all …]
H A Dcmpxchg-04.ll10 %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
21 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
34 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
45 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
56 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
69 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
82 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
93 %pairval = cmpxchg i64 *%ptr, i64 1001, i64 %swap seq_cst seq_cst
104 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 1002 seq_cst seq_cst
117 %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
[all …]
H A Dcmpxchg-06.ll16 %pairval = cmpxchg i128 *%src, i128 %cmp, i128 %swap seq_cst seq_cst
27 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 %swap seq_cst seq_cst
40 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 %swap seq_cst seq_cst
51 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 %swap seq_cst seq_cst
62 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 %swap seq_cst seq_cst
75 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 %swap seq_cst seq_cst
88 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 %swap seq_cst seq_cst
99 %pairval = cmpxchg i128 *%ptr, i128 1001, i128 %swap seq_cst seq_cst
110 %pairval = cmpxchg i128 *%ptr, i128 %cmp, i128 1002 seq_cst seq_cst
127 %pairval = cmpxchg i128 *%src, i128 %cmp, i128 %swap seq_cst seq_cst
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Datomics.ll8 %ret = atomicrmw add i32* %addr, i32 %val seq_cst
15 %ret = atomicrmw add i64* %addr, i64 %val seq_cst
23 %ret = atomicrmw sub i32* %subr, i32 %val seq_cst
31 %ret = atomicrmw sub i64* %subr, i64 %val seq_cst
38 %ret = atomicrmw and i32* %subr, i32 %val seq_cst
45 %ret = atomicrmw and i64* %subr, i64 %val seq_cst
63 %ret = atomicrmw or i32* %subr, i32 %val seq_cst
70 %ret = atomicrmw or i64* %subr, i64 %val seq_cst
77 %ret = atomicrmw xor i32* %subr, i32 %val seq_cst
195 %pairold = cmpxchg i32* %addr, i32 %cmp, i32 %new seq_cst seq_cst
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dinst-select-store-atomic-local.mir41 G_STORE %0, %1 :: (store seq_cst (s32), align 4, addrspace 3)
78 G_STORE %0, %1 :: (store seq_cst (<2 x s16>), align 4, addrspace 3)
99 ; GFX6-NEXT: G_STORE [[COPY]](p3), [[COPY1]](p3) :: (store seq_cst (p3), addrspace 3)
115 G_STORE %0, %1 :: (store seq_cst (p3), align 4, addrspace 3)
152 G_STORE %0, %1 :: (store seq_cst (p5), align 4, addrspace 3)
189 G_STORE %0, %1 :: (store seq_cst (p6), align 4, addrspace 3)
226 G_STORE %0, %1 :: (store seq_cst (s64), align 8, addrspace 3)
263 G_STORE %0, %1 :: (store seq_cst (<2 x s32>), align 8, addrspace 3)
300 G_STORE %0, %1 :: (store seq_cst (<4 x s16>), align 8, addrspace 3)
337 G_STORE %0, %1 :: (store seq_cst (p0), align 8, addrspace 3)
[all …]
H A Dinst-select-load-atomic-local.mir40 %1:vgpr(s32) = G_LOAD %0 :: (load seq_cst (s32), align 4, addrspace 3)
77 %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load seq_cst (<2 x s16>), align 4, addrspace 3)
98 …; GFX6-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load seq_cst (p3), addrspace 3)
105 …; GFX7-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p3) :: (load seq_cst (p3), addrspace 3)
114 %1:vgpr(p3) = G_LOAD %0 :: (load seq_cst (p3), align 4, addrspace 3)
151 %1:vgpr(s64) = G_LOAD %0 :: (load seq_cst (s64), align 8, addrspace 3)
188 %1:vgpr(<2 x s32>) = G_LOAD %0 :: (load seq_cst (<2 x s32>), align 8, addrspace 3)
225 %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load seq_cst (<4 x s16>), align 8, addrspace 3)
262 %1:vgpr(p1) = G_LOAD %0 :: (load seq_cst (p1), align 8, addrspace 3)
299 %1:vgpr(p0) = G_LOAD %0 :: (load seq_cst (p0), align 8, addrspace 3)
[all …]
H A Dinst-select-store-atomic-flat.mir32 G_STORE %0, %1 :: (store seq_cst (s32), align 4, addrspace 0)
61 G_STORE %0, %1 :: (store seq_cst (<2 x s16>), align 4, addrspace 0)
81 ; GFX7-NEXT: G_STORE [[COPY]](p3), [[COPY1]](p0) :: (store seq_cst (p3))
90 G_STORE %0, %1 :: (store seq_cst (p3), align 4, addrspace 0)
119 G_STORE %0, %1 :: (store seq_cst (p5), align 4, addrspace 0)
148 G_STORE %0, %1 :: (store seq_cst (p6), align 4, addrspace 0)
177 G_STORE %0, %1 :: (store seq_cst (s64), align 8, addrspace 0)
206 G_STORE %0, %1 :: (store seq_cst (<2 x s32>), align 8, addrspace 0)
235 G_STORE %0, %1 :: (store seq_cst (<4 x s16>), align 8, addrspace 0)
264 G_STORE %0, %1 :: (store seq_cst (p0), align 8, addrspace 0)
[all …]
H A Dinst-select-load-atomic-flat.mir43 %1:vgpr(s32) = G_LOAD %0 :: (load seq_cst (s32), align 4, addrspace 0)
84 %1:vgpr(<2 x s16>) = G_LOAD %0 :: (load seq_cst (<2 x s16>), align 4, addrspace 0)
104 ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p0) :: (load seq_cst (p3))
125 %1:vgpr(p3) = G_LOAD %0 :: (load seq_cst (p3), align 4, addrspace 0)
166 %1:vgpr(s64) = G_LOAD %0 :: (load seq_cst (s64), align 8, addrspace 0)
207 %1:vgpr(<2 x s32>) = G_LOAD %0 :: (load seq_cst (<2 x s32>), align 8, addrspace 0)
248 %1:vgpr(<4 x s16>) = G_LOAD %0 :: (load seq_cst (<4 x s16>), align 8, addrspace 0)
289 %1:vgpr(p1) = G_LOAD %0 :: (load seq_cst (p1), align 8, addrspace 0)
330 %1:vgpr(p0) = G_LOAD %0 :: (load seq_cst (p0), align 8, addrspace 0)
413 %3:vgpr(s32) = G_LOAD %2 :: (load seq_cst (s32), align 4, addrspace 0)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/AtomicExpand/X86/
H A Dexpand-atomic-non-integer.ll20 ; CHECK: %2 = load atomic i32, i32* %1 seq_cst, align 4
23 %res = load atomic float, float* %ptr seq_cst, align 4
61 store atomic float %v, float* %ptr seq_cst, align 4
115 ; CHECK: %3 = cmpxchg i64* %1, i64 0, i64 %2 seq_cst seq_cst
121 cmpxchg i8** %ptr, i8* null, i8* %v seq_cst seq_cst
129 ; CHECK: %3 = cmpxchg weak i64* %1, i64 0, i64 %2 seq_cst seq_cst
135 cmpxchg weak i8** %ptr, i8* null, i8* %v seq_cst seq_cst
143 ; CHECK: %3 = cmpxchg volatile i64* %1, i64 0, i64 %2 seq_cst seq_cst
149 cmpxchg volatile i8** %ptr, i8* null, i8* %v seq_cst seq_cst
158 ; CHECK: %3 = cmpxchg i64 addrspace(1)* %1, i64 0, i64 %2 seq_cst seq_cst
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/AtomicExpand/AMDGPU/
H A Dexpand-atomic-rmw-fsub.ll15 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg i32* [[TMP2]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
23 %res = atomicrmw fsub float* %ptr, float %value seq_cst
37 …T: [[TMP5:%.*]] = cmpxchg i32 addrspace(1)* [[TMP2]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
59 …T: [[TMP5:%.*]] = cmpxchg i32 addrspace(3)* [[TMP2]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
76 %res = atomicrmw fsub half* %ptr, half %value seq_cst
85 %res = atomicrmw fsub half addrspace(1)* %ptr, half %value seq_cst
94 %res = atomicrmw fsub half addrspace(3)* %ptr, half %value seq_cst
108 ; GCN-NEXT: [[TMP5:%.*]] = cmpxchg i64* [[TMP2]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst
116 %res = atomicrmw fsub double* %ptr, double %value seq_cst
130 …T: [[TMP5:%.*]] = cmpxchg i64 addrspace(1)* [[TMP2]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst
[all …]
/llvm-project-15.0.7/llvm/test/Linker/
H A Dsyncscopes.ll4 ; CHECK: fence syncscope("agent") seq_cst
5 ; CHECK: fence syncscope("workgroup") seq_cst
6 ; CHECK: fence syncscope("wavefront") seq_cst
9 ; CHECK: fence syncscope("image") seq_cst
10 ; CHECK: fence syncscope("agent") seq_cst
11 ; CHECK: fence syncscope("workgroup") seq_cst
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Datomic-rmw.ll71 %pair = cmpxchg i32* %p, i32 %exp, i32 %new seq_cst seq_cst
82 %pair = cmpxchg i32* %p, i32 %exp, i32 %new seq_cst seq_cst
202 %pair = cmpxchg i64* %p, i64 %exp, i64 %new seq_cst seq_cst
213 %pair = cmpxchg i64* %p, i64 %exp, i64 %new seq_cst seq_cst
668 %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
682 %pair = cmpxchg i16* %p, i16 %exp_t, i16 %new_t seq_cst seq_cst
696 %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
710 %pair = cmpxchg i16* %p, i16 %exp_t, i16 %new_t seq_cst seq_cst
727 %pair = cmpxchg i32* %p, i32 %exp_t, i32 %new_t seq_cst seq_cst
1158 %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
[all …]
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Datomic-ops.cl46 // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} seq_cst, align 4
111 // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent") seq_cst, align 4
114 // CHECK: load atomic i32, i32* %{{.*}} seq_cst, align 4
169 // CHECK: load atomic i32, i32* %{{.*}} seq_cst, align 4
279 // CHECK: cmpxchg {{.*}} monotonic seq_cst, align 4
291 // CHECK: cmpxchg {{.*}} acquire seq_cst, align 4
303 // CHECK: cmpxchg {{.*}} release seq_cst, align 4
315 // CHECK: cmpxchg {{.*}} acq_rel seq_cst, align 4
319 // CHECK: cmpxchg {{.*}} seq_cst monotonic, align 4
323 // CHECK: cmpxchg {{.*}} seq_cst acquire, align 4
[all …]

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