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/llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/ir-instruction/
H A Dselect-fpcc-flt.ll25 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
31 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
42 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
48 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
59 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
65 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
76 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
82 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
93 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
262 ; LA32-NEXT: fmov.s $fa0, $fa2
[all …]
H A Dselect-fpcc-dbl.ll25 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
31 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
42 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
48 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
59 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
65 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
76 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
82 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
93 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
262 ; LA32-NEXT: fmov.d $fa0, $fa2
[all …]
H A Dfloat-convert.ll187 ; LA32F-NEXT: fsub.s $fa2, $fa0, $fa1
188 ; LA32F-NEXT: ftintrz.w.s $fa2, $fa2
189 ; LA32F-NEXT: movfr2gr.s $a0, $fa2
207 ; LA32D-NEXT: ftintrz.w.s $fa2, $fa2
208 ; LA32D-NEXT: movfr2gr.s $a0, $fa2
226 ; LA64F-NEXT: ftintrz.w.s $fa2, $fa2
227 ; LA64F-NEXT: movfr2gr.s $a0, $fa2
273 ; LA64F-NEXT: ftintrz.w.s $fa2, $fa2
274 ; LA64F-NEXT: movfr2gr.s $a0, $fa2
292 ; LA64D-NEXT: ftintrz.l.s $fa2, $fa2
[all …]
H A Ddouble-convert.ll122 ; LA32-NEXT: fsub.d $fa2, $fa0, $fa1
123 ; LA32-NEXT: ftintrz.w.d $fa2, $fa2
124 ; LA32-NEXT: movfr2gr.s $a0, $fa2
179 ; LA64-NEXT: fsub.d $fa2, $fa0, $fa1
180 ; LA64-NEXT: ftintrz.l.d $fa2, $fa2
181 ; LA64-NEXT: movfr2gr.d $a0, $fa2
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Dinsn.s104 # CHECK-ASM: .insn r4 67, 0, 0, fa0, fa1, fa2, fa3
106 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne
107 .insn r 0x43, 0, 0, fa0, fa1, fa2, fa3
108 # CHECK-ASM: .insn r4 67, 0, 0, fa0, fa1, fa2, fa3
110 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne
111 .insn r MADD, 0, 0, fa0, fa1, fa2, fa3
113 # CHECK-ASM: .insn r4 67, 0, 0, fa0, fa1, fa2, fa3
115 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne
116 .insn r4 0x43, 0, 0, fa0, fa1, fa2, fa3
119 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne
[all …]
H A Drvzfh-pseudos.s6 # CHECK: flh fa2, %pcrel_lo(.Lpcrel_hi0)(a2)
7 flh fa2, a_symbol, a2
11 # CHECK: fsh fa2, %pcrel_lo(.Lpcrel_hi1)(a3)
12 fsh fa2, a_symbol, a3
H A Drvf-pseudos.s6 # CHECK: flw fa2, %pcrel_lo(.Lpcrel_hi0)(a2)
7 flw fa2, a_symbol, a2
11 # CHECK: fsw fa2, %pcrel_lo(.Lpcrel_hi1)(a3)
12 fsw fa2, a_symbol, a3
H A Drvd-pseudos.s6 # CHECK: fld fa2, %pcrel_lo(.Lpcrel_hi0)(a2)
7 fld fa2, a_symbol, a2
11 # CHECK: fsd fa2, %pcrel_lo(.Lpcrel_hi1)(a3)
12 fsd fa2, a_symbol, a3
H A Drv32zfhmin-valid.s54 # CHECK-ASM-AND-OBJ: fcvt.h.s ft2, fa2
56 fcvt.h.s ft2, fa2
60 # CHECK-ASM-AND-OBJ: fcvt.h.d ft2, fa2
62 fcvt.h.d ft2, fa2
H A Drv64zhinxmin-invalid.s12 fcvt.d.h a0, fa2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
13 fcvt.h.d a0, fa2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
H A Dattribute-with-insts.s21 # CHECK-INST: fmadd.d fa0, fa1, fa2, fa3, dyn
24 # CHECK-INST: fmadd.s fa0, fa1, fa2, fa3, dyn
H A Dinsn-invalid.s5 .insn r 0x43, 0, 0, fa0, fa1, fa2, fa3, fa4 # CHECK: :[[@LINE]]:44: error: invalid operand for i…
19 .insn r4 0x43, 0, 4, fa0, fa1, fa2, fa3 # CHECK: :[[@LINE]]:21: error: immediate must be an integ…
H A Drv32f-valid.s44 # CHECK-ASM-AND-OBJ: fmadd.s fa0, fa1, fa2, fa3, dyn
78 # CHECK-ASM-AND-OBJ: fsgnjx.s fa4, fa3, fa2
80 fsgnjx.s fa4, fa3, fa2
120 # CHECK-ASM-AND-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne
132 # CHECK-ASM-AND-OBJ: fmadd.s fa0, fa1, fa2, fa3, rmm
H A Drv32zfh-valid.s44 # CHECK-ASM-AND-OBJ: fmadd.h fa0, fa1, fa2, fa3, dyn
78 # CHECK-ASM-AND-OBJ: fsgnjx.h fa4, fa3, fa2
80 fsgnjx.h fa4, fa3, fa2
120 # CHECK-ASM-AND-OBJ: fmadd.h fa0, fa1, fa2, fa3, rne
132 # CHECK-ASM-AND-OBJ: fmadd.h fa0, fa1, fa2, fa3, rmm
H A Drv64dc-valid.s29 # CHECK-ASM-AND-OBJ: c.fsd fa2, 248(a1)
33 c.fsd fa2, 248(a1)
H A Drv32dc-valid.s29 # CHECK-ASM-AND-OBJ: c.fsd fa2, 248(a1)
33 c.fsd fa2, 248(a1)
H A Drv32d-valid.s49 # CHECK-ASM-AND-OBJ: fmadd.d fa0, fa1, fa2, fa3, dyn
83 # CHECK-ASM-AND-OBJ: fsgnjx.d fa3, fa2, fa1
85 fsgnjx.d fa3, fa2, fa1
124 # CHECK-ASM-AND-OBJ: fmadd.d fa0, fa1, fa2, fa3, rne
H A Drv32fc-valid.s38 # CHECK-ASM-AND-OBJ: c.fsw fa2, 124(a1)
43 c.fsw fa2, 124(a1)
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dmachine-cse.ll87 ; RV32-NEXT: fmadd.h ft0, fa0, fa1, fa2
97 ; RV64-NEXT: fmadd.h ft0, fa0, fa1, fa2
122 ; RV32-NEXT: fmadd.s ft0, fa0, fa1, fa2
132 ; RV64-NEXT: fmadd.s ft0, fa0, fa1, fa2
157 ; RV32-NEXT: fmadd.d ft0, fa0, fa1, fa2
167 ; RV64-NEXT: fmadd.d ft0, fa0, fa1, fa2
190 ; RV32-NEXT: fmsub.h ft0, fa0, fa1, fa2
200 ; RV64-NEXT: fmsub.h ft0, fa0, fa1, fa2
225 ; RV32-NEXT: fmsub.s ft0, fa0, fa1, fa2
235 ; RV64-NEXT: fmsub.s ft0, fa0, fa1, fa2
[all …]
H A Dhalf-arith-strict.ll77 ; CHECK-NEXT: fmadd.h fa0, fa0, fa1, fa2
88 ; CHECK-NEXT: fadd.h ft0, fa2, ft0
102 ; CHECK-NEXT: fadd.h ft0, fa2, ft0
118 ; CHECK-NEXT: fadd.h ft0, fa2, ft0
134 ; CHECK-NEXT: fnmsub.h fa0, ft0, fa1, fa2
147 ; CHECK-NEXT: fnmsub.h fa0, ft0, fa0, fa2
H A Dcalling-conv-vector-float.ll22 ; RV64LP64F-NEXT: fadd.s fa0, fa0, fa2
54 ; RV64LP64F-NEXT: fadd.s ft2, fa2, fa6
H A Ddouble-arith.ll369 ; CHECKIFD-NEXT: fmadd.d fa0, fa0, fa1, fa2
397 ; RV32IFD-NEXT: fadd.d ft0, fa2, ft0
404 ; RV64IFD-NEXT: fadd.d ft0, fa2, ft0
474 ; RV32IFD-NEXT: fadd.d ft0, fa2, ft0
482 ; RV64IFD-NEXT: fadd.d ft0, fa2, ft0
570 ; RV32IFD-NEXT: fadd.d ft0, fa2, ft0
578 ; RV64IFD-NEXT: fadd.d ft0, fa2, ft0
924 ; RV32IFD-NEXT: fadd.d ft0, fa2, ft0
931 ; RV64IFD-NEXT: fadd.d ft0, fa2, ft0
1010 ; RV32IFD-NEXT: fadd.d ft0, fa2, ft0
[all …]
/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Float/
H A Dd-arith.s73 # ASM-AND-OBJ: fsqrt.d $fa2, $ft3
75 fsqrt.d $fa2, $ft3
97 # ASM-AND-OBJ: fclass.d $ft11, $fa2
99 fclass.d $ft11, $fa2
/llvm-project-15.0.7/llvm/test/Verifier/
H A Dalias.ll17 @fa2 = alias void(), void()* @f2
19 ; CHECK-NEXT: @fa2
/llvm-project-15.0.7/llvm/test/Transforms/GlobalOpt/
H A Dalias-used.ll24 @fa2 = internal alias void (), void ()* @f
25 ; CHECK-NOT: @fa2
42 ret i8* bitcast (void ()* @fa2 to i8*);

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