| /llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Float/ |
| H A D | f-comp.s | 14 fcmp.caf.s $fcc0, $fa0, $fa1 18 fcmp.cun.s $fcc0, $fa0, $fa1 22 fcmp.ceq.s $fcc0, $fa0, $fa1 26 fcmp.cueq.s $fcc0, $fa0, $fa1 30 fcmp.clt.s $fcc0, $fa0, $fa1 34 fcmp.cult.s $fcc0, $fa0, $fa1 38 fcmp.cle.s $fcc0, $fa0, $fa1 46 fcmp.cne.s $fcc0, $fa0, $fa1 50 fcmp.cor.s $fcc0, $fa0, $fa1 58 fcmp.saf.s $fcc0, $fa0, $fa1 [all …]
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| H A D | d-comp.s | 15 fcmp.caf.s $fcc0, $fa0, $fa1 19 fcmp.caf.d $fcc0, $fa0, $fa1 23 fcmp.cun.d $fcc0, $fa0, $fa1 27 fcmp.ceq.d $fcc0, $fa0, $fa1 31 fcmp.cueq.d $fcc0, $fa0, $fa1 35 fcmp.clt.d $fcc0, $fa0, $fa1 39 fcmp.cult.d $fcc0, $fa0, $fa1 43 fcmp.cle.d $fcc0, $fa0, $fa1 51 fcmp.cne.d $fcc0, $fa0, $fa1 55 fcmp.cor.d $fcc0, $fa0, $fa1 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/ |
| H A D | float-select-fcmp.ll | 10 ; CHECK-NEXT: fmv.s fa0, fa1 20 ; CHECK-NEXT: feq.s a0, fa0, fa1 23 ; CHECK-NEXT: fmv.s fa0, fa1 37 ; CHECK-NEXT: fmv.s fa0, fa1 51 ; CHECK-NEXT: fmv.s fa0, fa1 65 ; CHECK-NEXT: fmv.s fa0, fa1 79 ; CHECK-NEXT: fmv.s fa0, fa1 95 ; CHECK-NEXT: fmv.s fa0, fa1 106 ; CHECK-NEXT: feq.s a0, fa1, fa1 111 ; CHECK-NEXT: fmv.s fa0, fa1 [all …]
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| H A D | double-select-fcmp.ll | 10 ; CHECK-NEXT: fmv.d fa0, fa1 20 ; CHECK-NEXT: feq.d a0, fa0, fa1 23 ; CHECK-NEXT: fmv.d fa0, fa1 37 ; CHECK-NEXT: fmv.d fa0, fa1 51 ; CHECK-NEXT: fmv.d fa0, fa1 65 ; CHECK-NEXT: fmv.d fa0, fa1 79 ; CHECK-NEXT: fmv.d fa0, fa1 95 ; CHECK-NEXT: fmv.d fa0, fa1 106 ; CHECK-NEXT: feq.d a0, fa1, fa1 111 ; CHECK-NEXT: fmv.d fa0, fa1 [all …]
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| H A D | half-select-fcmp.ll | 10 ; CHECK-NEXT: fmv.h fa0, fa1 20 ; CHECK-NEXT: feq.h a0, fa0, fa1 23 ; CHECK-NEXT: fmv.h fa0, fa1 37 ; CHECK-NEXT: fmv.h fa0, fa1 51 ; CHECK-NEXT: fmv.h fa0, fa1 65 ; CHECK-NEXT: fmv.h fa0, fa1 79 ; CHECK-NEXT: fmv.h fa0, fa1 95 ; CHECK-NEXT: fmv.h fa0, fa1 106 ; CHECK-NEXT: feq.h a0, fa1, fa1 111 ; CHECK-NEXT: fmv.h fa0, fa1 [all …]
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| H A D | half-fcmp-strict.ll | 10 ; CHECK-NEXT: feq.h a0, fa0, fa1 22 ; CHECK-NEXT: flt.h a0, fa1, fa0 24 ; CHECK-NEXT: feq.h zero, fa1, fa0 35 ; CHECK-NEXT: fle.h a0, fa1, fa0 48 ; CHECK-NEXT: flt.h a0, fa0, fa1 61 ; CHECK-NEXT: fle.h a0, fa0, fa1 76 ; CHECK-NEXT: flt.h a1, fa0, fa1 93 ; CHECK-NEXT: feq.h a0, fa1, fa1 193 ; CHECK-NEXT: feq.h a0, fa1, fa1 271 ; CHECK-NEXT: fle.h a0, fa1, fa1 [all …]
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| H A D | double-br-fcmp.ll | 44 ; RV32IFD-NEXT: feq.d a0, fa0, fa1 55 ; RV64IFD-NEXT: feq.d a0, fa0, fa1 78 ; RV32IFD-NEXT: feq.d a0, fa0, fa1 89 ; RV64IFD-NEXT: feq.d a0, fa0, fa1 109 ; RV32IFD-NEXT: flt.d a0, fa1, fa0 120 ; RV64IFD-NEXT: flt.d a0, fa1, fa0 140 ; RV32IFD-NEXT: fle.d a0, fa1, fa0 268 ; RV32IFD-NEXT: feq.d a0, fa1, fa1 281 ; RV64IFD-NEXT: feq.d a0, fa1, fa1 493 ; RV32IFD-NEXT: feq.d a0, fa1, fa1 [all …]
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| H A D | half-br-fcmp.ll | 45 ; RV32IZFH-NEXT: feq.h a0, fa0, fa1 56 ; RV64IZFH-NEXT: feq.h a0, fa0, fa1 79 ; RV32IZFH-NEXT: feq.h a0, fa0, fa1 90 ; RV64IZFH-NEXT: feq.h a0, fa0, fa1 110 ; RV32IZFH-NEXT: flt.h a0, fa1, fa0 121 ; RV64IZFH-NEXT: flt.h a0, fa1, fa0 141 ; RV32IZFH-NEXT: fle.h a0, fa1, fa0 269 ; RV32IZFH-NEXT: feq.h a0, fa1, fa1 282 ; RV64IZFH-NEXT: feq.h a0, fa1, fa1 494 ; RV32IZFH-NEXT: feq.h a0, fa1, fa1 [all …]
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| H A D | float-br-fcmp.ll | 45 ; RV32IF-NEXT: feq.s a0, fa0, fa1 56 ; RV64IF-NEXT: feq.s a0, fa0, fa1 79 ; RV32IF-NEXT: feq.s a0, fa0, fa1 90 ; RV64IF-NEXT: feq.s a0, fa0, fa1 110 ; RV32IF-NEXT: flt.s a0, fa1, fa0 121 ; RV64IF-NEXT: flt.s a0, fa1, fa0 141 ; RV32IF-NEXT: fle.s a0, fa1, fa0 269 ; RV32IF-NEXT: feq.s a0, fa1, fa1 282 ; RV64IF-NEXT: feq.s a0, fa1, fa1 494 ; RV32IF-NEXT: feq.s a0, fa1, fa1 [all …]
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| H A D | copysign-casts.ll | 61 ; RV32IFD-NEXT: fcvt.d.s ft0, fa1 67 ; RV64IFD-NEXT: fcvt.d.s ft0, fa1 135 ; RV32IFD-NEXT: fmv.x.w a0, fa1 150 ; RV64IFD-NEXT: fmv.x.w a0, fa1 213 ; RV32IF-NEXT: fmv.x.w a0, fa1 227 ; RV32IFD-NEXT: fmv.x.w a0, fa1 241 ; RV64IFD-NEXT: fmv.x.w a0, fa1 354 ; RV32IF-NEXT: fmv.x.w a1, fa1 369 ; RV32IFD-NEXT: fmv.x.w a1, fa1 384 ; RV64IFD-NEXT: fmv.x.w a1, fa1 [all …]
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| H A D | machine-cse.ll | 511 ; RV32-NEXT: fadd.h ft0, fa0, fa1 521 ; RV64-NEXT: fadd.h ft0, fa0, fa1 544 ; RV32-NEXT: fadd.s ft0, fa0, fa1 554 ; RV64-NEXT: fadd.s ft0, fa0, fa1 577 ; RV32-NEXT: fadd.d ft0, fa0, fa1 610 ; RV32-NEXT: feq.h a1, fa0, fa1 620 ; RV64-NEXT: feq.h a1, fa0, fa1 645 ; RV32-NEXT: feq.s a1, fa0, fa1 655 ; RV64-NEXT: feq.s a1, fa0, fa1 680 ; RV32-NEXT: feq.d a1, fa0, fa1 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/ir-instruction/ |
| H A D | fcmp-flt.ll | 24 ; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1 30 ; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1 40 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0 46 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0 56 ; LA32-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0 62 ; LA64-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0 72 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1 78 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1 88 ; LA32-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1 94 ; LA64-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1 [all …]
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| H A D | fcmp-dbl.ll | 24 ; LA32-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1 30 ; LA64-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1 40 ; LA32-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0 46 ; LA64-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0 56 ; LA32-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0 62 ; LA64-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0 72 ; LA32-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1 78 ; LA64-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1 88 ; LA32-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1 94 ; LA64-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1 [all …]
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| H A D | select-fpcc-flt.ll | 24 ; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1 30 ; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1 41 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0 47 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0 58 ; LA32-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0 64 ; LA64-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0 75 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1 81 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1 92 ; LA32-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1 98 ; LA64-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1 [all …]
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| H A D | select-fpcc-dbl.ll | 24 ; LA32-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1 30 ; LA64-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1 41 ; LA32-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0 47 ; LA64-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0 58 ; LA32-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0 64 ; LA64-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0 75 ; LA32-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1 81 ; LA64-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1 92 ; LA32-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1 98 ; LA64-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1 [all …]
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| H A D | select-icc-dbl.ll | 12 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 20 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 33 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 41 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 53 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 60 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 73 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 81 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 93 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 100 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 [all …]
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| H A D | select-icc-flt.ll | 12 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 20 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 33 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 41 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 53 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 60 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 73 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 81 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 93 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 100 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0 [all …]
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| H A D | select-fpcc-int.ll | 24 ; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1 33 ; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1 47 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0 56 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0 70 ; LA32-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0 79 ; LA64-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0 93 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1 102 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1 116 ; LA32-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1 125 ; LA64-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1 [all …]
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| H A D | float-convert.ll | 186 ; LA32F-NEXT: fld.s $fa1, $a0, 0 205 ; LA32D-NEXT: fld.s $fa1, $a0, 0 224 ; LA64F-NEXT: fld.s $fa1, $a0, 0 271 ; LA64F-NEXT: fld.s $fa1, $a0, 0 290 ; LA64D-NEXT: fld.s $fa1, $a0, 0 496 ; LA32F-NEXT: ffint.s.w $fa1, $fa1 511 ; LA32D-NEXT: fld.d $fa1, $sp, 8 529 ; LA64F-NEXT: ffint.s.w $fa1, $fa1 545 ; LA64D-NEXT: ffint.s.w $fa1, $fa1 582 ; LA64F-NEXT: ffint.s.w $fa1, $fa1 [all …]
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| H A D | fdiv.ll | 9 ; LA32-NEXT: fdiv.s $fa0, $fa0, $fa1 14 ; LA64-NEXT: fdiv.s $fa0, $fa0, $fa1 23 ; LA32-NEXT: fdiv.d $fa0, $fa0, $fa1 28 ; LA64-NEXT: fdiv.d $fa0, $fa0, $fa1
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| H A D | fmul.ll | 9 ; LA32-NEXT: fmul.s $fa0, $fa0, $fa1 14 ; LA64-NEXT: fmul.s $fa0, $fa0, $fa1 23 ; LA32-NEXT: fmul.d $fa0, $fa0, $fa1 28 ; LA64-NEXT: fmul.d $fa0, $fa0, $fa1
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| H A D | fadd.ll | 9 ; LA32-NEXT: fadd.s $fa0, $fa0, $fa1 14 ; LA64-NEXT: fadd.s $fa0, $fa0, $fa1 23 ; LA32-NEXT: fadd.d $fa0, $fa0, $fa1 28 ; LA64-NEXT: fadd.d $fa0, $fa0, $fa1
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| /llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/ |
| H A D | double-imm.ll | 56 ; LA32-NEXT: movgr2fr.w $fa1, $a0 57 ; LA32-NEXT: ffint.s.w $fa1, $fa1 58 ; LA32-NEXT: fcvt.d.s $fa1, $fa1 59 ; LA32-NEXT: fadd.d $fa0, $fa0, $fa1 65 ; LA64-NEXT: movgr2fr.d $fa1, $a0 66 ; LA64-NEXT: ffint.d.l $fa1, $fa1 67 ; LA64-NEXT: fadd.d $fa0, $fa0, $fa1
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| H A D | float-imm.ll | 54 ; LA32-NEXT: movgr2fr.w $fa1, $a0 55 ; LA32-NEXT: ffint.s.w $fa1, $fa1 56 ; LA32-NEXT: fadd.s $fa0, $fa0, $fa1 62 ; LA64-NEXT: movgr2fr.w $fa1, $a0 63 ; LA64-NEXT: ffint.s.w $fa1, $fa1 64 ; LA64-NEXT: fadd.s $fa0, $fa0, $fa1
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| /llvm-project-15.0.7/llvm/test/MC/RISCV/ |
| H A D | insn.s | 104 # CHECK-ASM: .insn r4 67, 0, 0, fa0, fa1, fa2, fa3 106 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne 107 .insn r 0x43, 0, 0, fa0, fa1, fa2, fa3 108 # CHECK-ASM: .insn r4 67, 0, 0, fa0, fa1, fa2, fa3 110 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne 111 .insn r MADD, 0, 0, fa0, fa1, fa2, fa3 113 # CHECK-ASM: .insn r4 67, 0, 0, fa0, fa1, fa2, fa3 115 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne 116 .insn r4 0x43, 0, 0, fa0, fa1, fa2, fa3 119 # CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne [all …]
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