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/llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/ir-instruction/
H A Dfloat-convert.ll10 ; LA32F-NEXT: ftintrz.w.s $fa0, $fa0
16 ; LA32D-NEXT: ftintrz.w.s $fa0, $fa0
22 ; LA64F-NEXT: ftintrz.w.s $fa0, $fa0
28 ; LA64D-NEXT: ftintrz.l.s $fa0, $fa0
38 ; LA32F-NEXT: ftintrz.w.s $fa0, $fa0
44 ; LA32D-NEXT: ftintrz.w.s $fa0, $fa0
492 ; LA32F-NEXT: fadd.s $fa0, $fa0, $fa0
524 ; LA64F-NEXT: fadd.s $fa0, $fa0, $fa0
540 ; LA64D-NEXT: fadd.s $fa0, $fa0, $fa0
578 ; LA64F-NEXT: fadd.s $fa0, $fa0, $fa0
[all …]
H A Ddouble-convert.ll8 ; LA32-NEXT: fcvt.s.d $fa0, $fa0
13 ; LA64-NEXT: fcvt.s.d $fa0, $fa0
22 ; LA32-NEXT: fcvt.d.s $fa0, $fa0
27 ; LA64-NEXT: fcvt.d.s $fa0, $fa0
37 ; LA32-NEXT: ffint.d.w $fa0, $fa0
43 ; LA64-NEXT: ffint.d.w $fa0, $fa0
53 ; LA32-NEXT: ffint.d.w $fa0, $fa0
59 ; LA64-NEXT: ffint.d.w $fa0, $fa0
69 ; LA32-NEXT: ffint.d.w $fa0, $fa0
75 ; LA64-NEXT: ffint.d.w $fa0, $fa0
[all …]
H A Dselect-fpcc-flt.ll9 ; LA32-NEXT: fmov.s $fa0, $fa3
14 ; LA64-NEXT: fmov.s $fa0, $fa3
24 ; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
25 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
30 ; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
31 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
41 ; LA32-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0
42 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
47 ; LA64-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0
262 ; LA32-NEXT: fmov.s $fa0, $fa2
[all …]
H A Dselect-fpcc-dbl.ll9 ; LA32-NEXT: fmov.d $fa0, $fa3
14 ; LA64-NEXT: fmov.d $fa0, $fa3
24 ; LA32-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
25 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
30 ; LA64-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
31 ; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
41 ; LA32-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0
42 ; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
47 ; LA64-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0
262 ; LA32-NEXT: fmov.d $fa0, $fa2
[all …]
H A Dfsub.ll9 ; LA32-NEXT: fsub.s $fa0, $fa0, $fa1
14 ; LA64-NEXT: fsub.s $fa0, $fa0, $fa1
23 ; LA32-NEXT: fsub.d $fa0, $fa0, $fa1
28 ; LA64-NEXT: fsub.d $fa0, $fa0, $fa1
37 ; LA32-NEXT: fneg.s $fa0, $fa0
42 ; LA64-NEXT: fneg.s $fa0, $fa0
51 ; LA32-NEXT: fneg.d $fa0, $fa0
56 ; LA64-NEXT: fneg.d $fa0, $fa0
H A Dselect-icc-dbl.ll12 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
20 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
33 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
41 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
53 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
60 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
73 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
81 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
93 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
100 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
[all …]
H A Dselect-icc-flt.ll12 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
20 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
33 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
41 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
53 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
60 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
73 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
81 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
93 ; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
100 ; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Dnumeric-reg-names-f.s9 fsqrt.s fa0, f0
10 fsqrt.s fa0, ft0
14 fsqrt.s fa0, f1
15 fsqrt.s fa0, ft1
19 fsqrt.s fa0, f2
20 fsqrt.s fa0, ft2
24 fsqrt.s fa0, f3
29 fsqrt.s fa0, f4
34 fsqrt.s fa0, f5
39 fsqrt.s fa0, f6
[all …]
H A Dnumeric-reg-names-d.s9 fsqrt.d fa0, f0
10 fsqrt.d fa0, ft0
14 fsqrt.d fa0, f1
15 fsqrt.d fa0, ft1
19 fsqrt.d fa0, f2
20 fsqrt.d fa0, ft2
24 fsqrt.d fa0, f3
29 fsqrt.d fa0, f4
34 fsqrt.d fa0, f5
39 fsqrt.d fa0, f6
[all …]
/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Float/
H A Df-comp.s14 fcmp.caf.s $fcc0, $fa0, $fa1
18 fcmp.cun.s $fcc0, $fa0, $fa1
22 fcmp.ceq.s $fcc0, $fa0, $fa1
26 fcmp.cueq.s $fcc0, $fa0, $fa1
30 fcmp.clt.s $fcc0, $fa0, $fa1
34 fcmp.cult.s $fcc0, $fa0, $fa1
38 fcmp.cle.s $fcc0, $fa0, $fa1
46 fcmp.cne.s $fcc0, $fa0, $fa1
50 fcmp.cor.s $fcc0, $fa0, $fa1
58 fcmp.saf.s $fcc0, $fa0, $fa1
[all …]
H A Dd-comp.s15 fcmp.caf.s $fcc0, $fa0, $fa1
19 fcmp.caf.d $fcc0, $fa0, $fa1
23 fcmp.cun.d $fcc0, $fa0, $fa1
27 fcmp.ceq.d $fcc0, $fa0, $fa1
31 fcmp.cueq.d $fcc0, $fa0, $fa1
35 fcmp.clt.d $fcc0, $fa0, $fa1
39 fcmp.cult.d $fcc0, $fa0, $fa1
43 fcmp.cle.d $fcc0, $fa0, $fa1
51 fcmp.cne.d $fcc0, $fa0, $fa1
55 fcmp.cor.d $fcc0, $fa0, $fa1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/
H A Ddouble-imm.ll8 ; LA32-NEXT: movgr2fr.w $fa0, $zero
14 ; LA64-NEXT: movgr2fr.d $fa0, $zero
24 ; LA32-NEXT: fneg.d $fa0, $fa0
30 ; LA64-NEXT: fneg.d $fa0, $fa0
40 ; LA32-NEXT: fld.d $fa0, $a0, 0
47 ; LA64-NEXT: fld.d $fa0, $a0, 0
59 ; LA32-NEXT: fadd.d $fa0, $fa0, $fa1
67 ; LA64-NEXT: fadd.d $fa0, $fa0, $fa1
78 ; LA32-NEXT: ffint.s.w $fa0, $fa0
79 ; LA32-NEXT: fcvt.d.s $fa0, $fa0
[all …]
H A Dfloat-imm.ll8 ; LA32-NEXT: movgr2fr.w $fa0, $zero
13 ; LA64-NEXT: movgr2fr.w $fa0, $zero
21 ; LA32-NEXT: movgr2fr.w $fa0, $zero
22 ; LA32-NEXT: fneg.s $fa0, $fa0
28 ; LA64-NEXT: fneg.s $fa0, $fa0
38 ; LA32-NEXT: fld.s $fa0, $a0, 0
45 ; LA64-NEXT: fld.s $fa0, $a0, 0
56 ; LA32-NEXT: fadd.s $fa0, $fa0, $fa1
64 ; LA64-NEXT: fadd.s $fa0, $fa0, $fa1
75 ; LA32-NEXT: ffint.s.w $fa0, $fa0
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dhalf-intrinsics.ll26 ; CHECKIZFH-NEXT: fsqrt.h fa0, fa0
31 ; RV32IDZFH-NEXT: fsqrt.h fa0, fa0
36 ; RV64IDZFH-NEXT: fsqrt.h fa0, fa0
75 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
77 ; RV32IZFH-NEXT: fcvt.h.s fa0, fa0
86 ; RV64IZFH-NEXT: fcvt.s.h fa0, fa0
89 ; RV64IZFH-NEXT: fcvt.h.s fa0, fa0
98 ; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
100 ; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
109 ; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
[all …]
H A Dhalf-round-conv.ll54 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
56 ; RV32IZFH-NEXT: fcvt.h.s fa0, fa0
118 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
120 ; RV32IZFH-NEXT: fcvt.h.s fa0, fa0
182 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
184 ; RV32IZFH-NEXT: fcvt.h.s fa0, fa0
246 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
248 ; RV32IZFH-NEXT: fcvt.h.s fa0, fa0
310 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
312 ; RV32IZFH-NEXT: fcvt.h.s fa0, fa0
[all …]
H A Dcopysign-casts.ll62 ; RV32IFD-NEXT: fsgnj.d fa0, fa0, ft0
68 ; RV64IFD-NEXT: fsgnj.d fa0, fa0, ft0
84 ; RV32IFDZFH-NEXT: fsgnj.d fa0, fa0, ft0
90 ; RV64IFDZFH-NEXT: fsgnj.d fa0, fa0, ft0
173 ; RV32IFDZFH-NEXT: fsgnj.d fa0, fa0, ft0
215 ; RV32IF-NEXT: fsgnj.s fa0, fs0, fa0
229 ; RV32IFD-NEXT: fsgnj.s fa0, fs0, fa0
243 ; RV64IFD-NEXT: fsgnj.s fa0, fs0, fa0
294 ; RV32IF-NEXT: fsgnj.s fa0, fa0, ft0
300 ; RV32IFD-NEXT: fsgnj.s fa0, fa0, ft0
[all …]
H A Dfloat-select-fcmp.ll10 ; CHECK-NEXT: fmv.s fa0, fa1
20 ; CHECK-NEXT: feq.s a0, fa0, fa1
23 ; CHECK-NEXT: fmv.s fa0, fa1
37 ; CHECK-NEXT: fmv.s fa0, fa1
51 ; CHECK-NEXT: fmv.s fa0, fa1
65 ; CHECK-NEXT: fmv.s fa0, fa1
79 ; CHECK-NEXT: fmv.s fa0, fa1
95 ; CHECK-NEXT: fmv.s fa0, fa1
107 ; CHECK-NEXT: feq.s a1, fa0, fa0
111 ; CHECK-NEXT: fmv.s fa0, fa1
[all …]
H A Ddouble-select-fcmp.ll10 ; CHECK-NEXT: fmv.d fa0, fa1
20 ; CHECK-NEXT: feq.d a0, fa0, fa1
23 ; CHECK-NEXT: fmv.d fa0, fa1
37 ; CHECK-NEXT: fmv.d fa0, fa1
51 ; CHECK-NEXT: fmv.d fa0, fa1
65 ; CHECK-NEXT: fmv.d fa0, fa1
79 ; CHECK-NEXT: fmv.d fa0, fa1
95 ; CHECK-NEXT: fmv.d fa0, fa1
107 ; CHECK-NEXT: feq.d a1, fa0, fa0
111 ; CHECK-NEXT: fmv.d fa0, fa1
[all …]
H A Dhalf-select-fcmp.ll10 ; CHECK-NEXT: fmv.h fa0, fa1
20 ; CHECK-NEXT: feq.h a0, fa0, fa1
23 ; CHECK-NEXT: fmv.h fa0, fa1
37 ; CHECK-NEXT: fmv.h fa0, fa1
51 ; CHECK-NEXT: fmv.h fa0, fa1
65 ; CHECK-NEXT: fmv.h fa0, fa1
79 ; CHECK-NEXT: fmv.h fa0, fa1
95 ; CHECK-NEXT: fmv.h fa0, fa1
107 ; CHECK-NEXT: feq.h a1, fa0, fa0
111 ; CHECK-NEXT: fmv.h fa0, fa1
[all …]
H A Dinline-asm-zfh-constraint-f.ll19 ; RV32ZFH-NEXT: fadd.h fa0, fa0, ft0
28 ; RV64ZFH-NEXT: fadd.h fa0, fa0, ft0
37 ; RV32DZFH-NEXT: fadd.h fa0, fa0, ft0
46 ; RV64DZFH-NEXT: fadd.h fa0, fa0, ft0
64 ; RV32ZFH-NEXT: fmv.h fa0, ft0
78 ; RV64ZFH-NEXT: fmv.h fa0, ft0
92 ; RV32DZFH-NEXT: fmv.h fa0, ft0
106 ; RV64DZFH-NEXT: fmv.h fa0, ft0
119 ; RV32ZFH-NEXT: fmv.x.h a0, fa0
123 ; RV32ZFH-NEXT: fmv.h.x fa0, a0
[all …]
H A Dhalf-convert-strict.ll479 ; CHECKIZFH-NEXT: fcvt.h.s fa0, fa0
484 ; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0
489 ; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0
499 ; CHECKIZFH-NEXT: fcvt.s.h fa0, fa0
504 ; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0
509 ; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0
537 ; RV32IDZFH-NEXT: fcvt.h.d fa0, fa0
542 ; RV64IDZFH-NEXT: fcvt.h.d fa0, fa0
554 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
564 ; RV64IZFH-NEXT: fcvt.s.h fa0, fa0
[all …]
H A Dhalf-fcmp-strict.ll10 ; CHECK-NEXT: feq.h a0, fa0, fa1
22 ; CHECK-NEXT: flt.h a0, fa1, fa0
24 ; CHECK-NEXT: feq.h zero, fa1, fa0
35 ; CHECK-NEXT: fle.h a0, fa1, fa0
48 ; CHECK-NEXT: flt.h a0, fa0, fa1
61 ; CHECK-NEXT: fle.h a0, fa0, fa1
76 ; CHECK-NEXT: flt.h a1, fa0, fa1
94 ; CHECK-NEXT: feq.h a1, fa0, fa0
194 ; CHECK-NEXT: feq.h a1, fa0, fa0
272 ; CHECK-NEXT: fle.h a1, fa0, fa0
[all …]
H A Dhalf-round-conv-sat.ll10 ; CHECKIZFH-NEXT: feq.h a0, fa0, fa0
28 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
83 ; RV64IZFH-NEXT: feq.h a0, fa0, fa0
97 ; CHECKIZFH-NEXT: feq.h a0, fa0, fa0
115 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
157 ; RV64IZFH-NEXT: feq.h a0, fa0, fa0
171 ; CHECKIZFH-NEXT: feq.h a0, fa0, fa0
189 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
244 ; RV64IZFH-NEXT: feq.h a0, fa0, fa0
276 ; RV32IZFH-NEXT: fcvt.s.h fa0, fa0
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/rvv/
H A Dfmacc.s26 vfmacc.vf v8, fa0, v4, v0.t
32 vfmacc.vf v8, fa0, v4
56 vfnmacc.vf v8, fa0, v4
80 vfmsac.vf v8, fa0, v4
104 vfnmsac.vf v8, fa0, v4
128 vfmadd.vf v8, fa0, v4
152 vfnmadd.vf v8, fa0, v4
176 vfmsub.vf v8, fa0, v4
200 vfnmsub.vf v8, fa0, v4
224 vfwmacc.vf v8, fa0, v4
[all …]
H A Dfcompare.s26 vmfeq.vf v8, v4, fa0, v0.t
32 vmfeq.vf v8, v4, fa0
50 vmfne.vf v8, v4, fa0, v0.t
56 vmfne.vf v8, v4, fa0
74 vmflt.vf v8, v4, fa0, v0.t
80 vmflt.vf v8, v4, fa0
98 vmfle.vf v8, v4, fa0, v0.t
104 vmfle.vf v8, v4, fa0
110 vmfgt.vf v8, v4, fa0, v0.t
116 vmfgt.vf v8, v4, fa0
[all …]

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