| /llvm-project-15.0.7/flang/test/Semantics/ |
| H A D | resolve18.f90 | 126 type f9 type
127 end type f9
129 interface f9 interface
130 real function f9()
131 end function f9
132 end interface f9
134 function f9(x) function
135 end function f9
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| H A D | reduce01.f90 | 45 pure real function f9(x,y) function
48 f9 = x + y
80 b = reduce(a, f9)
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| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | array-parameter.c | 29 void f9(int *a);
30 void f9(int a[2]);
31 void f9(int a[]); // expected-warning {{argument 'a' of type 'int[]' with mismatched bound}}
33 void f9(int a[2]) // expected-warning {{argument 'a' of type 'int[2]' with mismatched bound}} in f9() function
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| H A D | attr-availability-watchos.c | 65 void f9(int) __attribute__((availability(ios,deprecated=10.3.1))); // expected-note {{'f9' has been…
68 f9(0); // expected-warning {{'f9' is deprecated: first deprecated in watchOS 3.2}} in testWithVersionMap()
72 void f9(int) __attribute__((availability(ios,deprecated=10.3.1))); // expected-note {{'f9' has been…
75 f9(0); // expected-warning {{'f9' is deprecated: first deprecated in watchOS 3.3.1}} in testWithoutVersionMap()
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | inline2.c | 57 extern inline int f9(void);
58 extern inline int f9(void) { return 0; } in f9() function
65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() in test_all()
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| /llvm-project-15.0.7/clang/test/CodeGen/PowerPC/ |
| H A D | ppc64-soft-float.c | 25 struct f9 { float f[9]; }; struct
61 struct f9 func_f9(struct f9 x) { return x; } in func_f9()
150 struct f9 global_f9;
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| /llvm-project-15.0.7/llvm/test/Analysis/MemorySSA/ |
| H A D | pr41640.ll | 55 br i1 true, label %f9.exit, label %.critedge1.i.us
58 br i1 undef, label %thread-pre-split.i.us, label %f9.exit
91 br i1 undef, label %thread-pre-split.i, label %f9.exit.loopexit
93 f9.exit.loopexit: ; preds = %.critedge1.i
94 br label %f9.exit
96 f9.exit: ; preds = %f9.exit.loopexit, %.critedge1.i.us, %l…
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | vector-constrained-fp-intrinsics.ll | 241 ; S390X-NEXT: ldr %f9, %f0
245 ; S390X-NEXT: ldr %f2, %f9
307 ; S390X-NEXT: ler %f9, %f0
318 ; S390X-NEXT: ler %f4, %f9
394 ; S390X-NEXT: ldr %f2, %f9
398 ; S390X-NEXT: ldr %f9, %f0
484 ; S390X-NEXT: ldr %f9, %f0
502 ; S390X-NEXT: ldr %f6, %f9
1457 ; SZ13-NEXT: ldr %f2, %f9
1465 ; SZ13-NEXT: ldr %f2, %f9
[all …]
|
| H A D | anyregcc-novec.ll | 18 ;CHECK: std %f9,
33 …r12},~{r13},~{r14},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12…
44 ;CHECK-NEXT: std %f9,
61 %a9 = call double asm sideeffect "", "={f9}"() nounwind
69 …call void asm sideeffect "", "{f0},{f1},{f2},{f3},{f4},{f5},{f6},{f7},{f8},{f9},{f10},{f11},{f12},…
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| H A D | frame-04.ll | 15 ; CHECK: std %f9, 48(%r15)
23 ; CHECK: .cfi_offset %f9, -176
32 ; CHECK: ld %f9, 48(%r15)
75 ; CHECK: std %f9, 32(%r15)
81 ; CHECK: .cfi_offset %f9, -176
90 ; CHECK: ld %f9, 32(%r15)
131 ; CHECK-NOT: %f9
166 ; CHECK-NOT: %f9
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| H A D | frame-07.ll | 16 ; CHECK-NOFP: stdy %f9, 4112(%r15)
24 ; CHECK-NOFP: .cfi_offset %f9, -176
33 ; CHECK-NOFP: ldy %f9, 4112(%r15)
50 ; CHECK-FP: stdy %f9, 4112(%r11)
59 ; CHECK-FP: ldy %f9, 4112(%r11)
137 ; CHECK-NOFP: std %f9, 16({{%r[1-5]}},%r15)
145 ; CHECK-NOFP: .cfi_offset %f9, -176
154 ; CHECK-NOFP: ld %f9, 16({{%r[1-5]}},%r15)
170 ; CHECK-FP: std %f9, 16({{%r[1-5]}},%r11)
178 ; CHECK-FP: .cfi_offset %f9, -176
[all …]
|
| H A D | fp-sincos-01.ll | 20 ; CHECK-OPT: ler %f9, %f0
22 ; CHECK-OPT: aebr %f0, %f9
43 ; CHECK-OPT: ldr %f9, %f0
45 ; CHECK-OPT: adbr %f0, %f9
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| /llvm-project-15.0.7/clang/test/SemaObjCXX/ |
| H A D | arc-overloading.mm | 148 int &f9(__strong id&); function
149 float &f9(const __autoreleasing id&); function
157 int &ir1 = f9(strong_id);
158 float &fr1 = f9(autoreleasing_id);
159 float &fr2 = f9(unsafe_id);
160 float &fr2a = f9(weak_id);
166 float &fr3 = f9(strong_a);
167 float &fr4 = f9(autoreleasing_a);
168 float &fr5 = f9(unsafe_unretained_a);
169 float &fr6 = f9(weak_a);
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| /llvm-project-15.0.7/lld/test/ELF/ |
| H A D | arm-thunk-many-passes.s | 76 b.w f9
77 b.w f9
110 f9: bx lr label
|
| /llvm-project-15.0.7/lld/test/ELF/linkerscript/Inputs/ |
| H A D | arm-thunk-many-passes.s | 32 b.w f9
33 b.w f9
66 f9: bx lr label
|
| /llvm-project-15.0.7/llvm/test/tools/gold/X86/ |
| H A D | emit-llvm.ll | 101 ;; f9 is not internalized because it is in the llvm.compiler.used list.
102 ; CHECK-DAG: define hidden void @f9()
103 ; OPT-DAG: define hidden void @f9()
104 define hidden void @f9() {
108 @llvm.compiler.used = appending global [1 x i8*] [ i8* bitcast (void ()* @f9 to i8*)]
118 ; RES: .o,f9,pl{{$}}
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/misc/ |
| H A D | definitions-in-headers.hpp | 118 int f9(T t) { return 1; } in f9() function
120 inline void callF9() { f9(1); } // OK: implicitly instantiated function. in callF9()
121 template int f9(double); // OK: explicitly instantiated function.
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| /llvm-project-15.0.7/llvm/test/tools/llvm-profgen/Inputs/ |
| H A D | noinline-cs-pseudoprobe.aggperfscript | 3 2017f9
9 2017f9
15 2017f9
|
| H A D | noinline-cs-pseudoprobe.perfscript | 4 2017f9
10 2017f9
16 2017f9
|
| /llvm-project-15.0.7/llvm/test/MC/SystemZ/ |
| H A D | regs-good.s | 67 #CHECK: ler %f8, %f9 # encoding: [0x38,0x89]
77 ler %f8,%f9
87 #CHECK: ldr %f8, %f9 # encoding: [0x28,0x89]
97 ldr %f8,%f9
105 #CHECK: lxr %f8, %f9 # encoding: [0xb3,0x65,0x00,0x89]
111 lxr %f8,%f9
204 #CHECK: .cfi_offset %f9, 200
270 .cfi_offset %f9,200
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | mips-fpu-instructions.s | 12 # CHECK: add.s $f9, $f6, $f7 # encoding: [0x40,0x32,0x07,0x46]
18 # CHECK: mul.s $f9, $f6, $f7 # encoding: [0x42,0x32,0x07,0x46]
26 # CHECK: sub.s $f9, $f6, $f7 # encoding: [0x41,0x32,0x07,0x46]
33 add.s $f9,$f6,$f7
39 mul.s $f9,$f6, $f7
47 sub.s $f9,$f6,$f7
156 # CHECK: swc1 $f9, 9158($7) # encoding: [0xc6,0x23,0xe9,0xe4]
191 swc1 $f9,9158($a3)
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/mips64/ |
| H A D | valid-mips64-xfail.txt | 9 0x46 0x23 0x4b 0x3c # CHECK: c.lt.d $fcc3, $f9, $f3
34 0x46 0xc9 0x05 0x32 # CHECK: c.eq.ps $fcc5, $f0, $f9
66 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
67 0x4c 0x99 0x4e 0xf6 # CHECK: nmadd.ps $f27, $f4, $f9, $f25
72 0x46 0xde 0x4e 0x6c # CHECK: pll.ps $f25, $f9, $f30
74 0x46 0xda 0xf2 0x6e # CHECK: pul.ps $f9, $f30, $f26
75 0x46 0xc2 0x4e 0x2f # CHECK: puu.ps $f24, $f9, $f2
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| /llvm-project-15.0.7/clang/test/CXX/dcl/dcl.fct/ |
| H A D | p17.cpp | 48 decltype(auto) f9(auto &... x) { return (x, ...); } in f9() function
50 using f9c1 = decltype(f9(return_int, 1)); // expected-error{{no matching}}
183 void f9(const C auto &... x);
185 static_assert(is_same_v<decltype(f9(i, i)), void>);
186 static_assert(is_same_v<decltype(f9(i, c)), void>);
188 static_assert(is_same_v<decltype(f9(i, i, ci)), void>);
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| /llvm-project-15.0.7/llvm/test/MC/Mips/mips4/ |
| H A D | invalid-mips5.s | 15 …pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
17 …pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
18 …puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
|
| /llvm-project-15.0.7/llvm/test/MC/Mips/mips64r6/ |
| H A D | invalid-mips5.s | 16 …pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
18 …pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
19 …puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
|