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Searched refs:emptyRegisters (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DSnippetGeneratorTest.cpp48 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()
149 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()
208 &Instr, Configs, State.getRATC().emptyRegisters()); in TEST_F()
339 State.getRATC().emptyRegisters()); in TEST_F()
355 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()
417 &Instr, Benchmarks, State.getRATC().emptyRegisters()); in TEST_F()
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DMCInstrDescView.cpp168 BitVector ImplDefRegs = RATC.emptyRegisters(); in create()
169 BitVector ImplUseRegs = RATC.emptyRegisters(); in create()
170 BitVector AllDefRegs = RATC.emptyRegisters(); in create()
171 BitVector AllUseRegs = RATC.emptyRegisters(); in create()
300 if (hasAliasingRegisters(RATC.emptyRegisters())) in dump()
H A DRegisterAliasing.h82 const BitVector &emptyRegisters() const { return EmptyRegisters; } in emptyRegisters() function
H A DSnippetRepetitor.cpp45 return State.getRATC().emptyRegisters(); in getReservedRegs()
H A DSnippetGenerator.cpp106 BitVector DefinedRegs = State.getRATC().emptyRegisters(); in computeRegisterInitialValues()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/Mips/
H A DSnippetGeneratorTest.cpp41 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()
90 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/PowerPC/
H A DSnippetGeneratorTest.cpp41 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()