Home
last modified time | relevance | path

Searched refs:ds_ordered_count (Results 1 – 21 of 21) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.ds.ordered.add.ll9 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
21 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:776 gds
31 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:260 gds
41 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:4 gds
52 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
64 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
76 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
88 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
100 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:1796 gds
112 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:2820 gds
[all …]
H A Dllvm.amdgcn.ds.ordered.add.gfx11.ll7 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
17 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
28 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
39 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
50 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
H A Dllvm.amdgcn.ds.ordered.swap.ll9 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v0 offset:4868 gds
20 ; // We have to use s_cbranch, because ds_ordered_count has side effects with EXEC=0
24 ; GCN-NEXT: ds_ordered_count v{{[0-9]+}}, v[[VALUE]] offset:4868 gds
H A Dllvm.amdgcn.ds.ordered.add.gfx10.ll7 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:772 gds
17 ; GCN: ds_ordered_count v{{[0-9]+}}, v[[INCR]] offset:49924 gds
/llvm-project-15.0.7/llvm/test/MC/AMDGPU/
H A Dgfx940_err.s117 ds_ordered_count v5, v1 offset:65535 gds label
H A Dgfx90a_err.s282 ds_ordered_count v5, v1 offset:65535 gds label
H A Dgfx7_asm_ds.s1344 ds_ordered_count v5, v1 offset:65535 gds label
1347 ds_ordered_count v255, v1 offset:65535 gds label
1350 ds_ordered_count v5, v255 offset:65535 gds label
1353 ds_ordered_count v5, v1 gds label
1356 ds_ordered_count v5, v1 offset:0 gds label
1359 ds_ordered_count v5, v1 offset:4 gds label
H A Dgfx8_asm_ds.s2790 ds_ordered_count v5, v1 offset:65535 gds label
2793 ds_ordered_count v255, v1 offset:65535 gds label
2796 ds_ordered_count v5, v255 offset:65535 gds label
2799 ds_ordered_count v5, v1 gds label
2802 ds_ordered_count v5, v1 offset:0 gds label
2805 ds_ordered_count v5, v1 offset:4 gds label
H A Dgfx9_asm_ds.s2994 ds_ordered_count v5, v1 offset:65535 gds label
2997 ds_ordered_count v255, v1 offset:65535 gds label
3000 ds_ordered_count v5, v255 offset:65535 gds label
3003 ds_ordered_count v5, v1 gds label
3006 ds_ordered_count v5, v1 offset:0 gds label
3009 ds_ordered_count v5, v1 offset:4 gds label
H A Dds.s315 ds_ordered_count v8, v2 gds label
H A Dgfx10_asm_ds.s4814 ds_ordered_count v5, v1 offset:65535 gds label
4817 ds_ordered_count v255, v1 offset:65535 gds label
4820 ds_ordered_count v5, v255 offset:65535 gds label
4823 ds_ordered_count v5, v1 gds label
4826 ds_ordered_count v5, v1 offset:0 gds label
4829 ds_ordered_count v5, v1 offset:4 gds label
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DDSInstructions.td659 def DS_ORDERED_COUNT : DS_1A_RET_GDS<"ds_ordered_count">;
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/
H A Dds_gfx11.txt2980 # GFX11: ds_ordered_count v255, v1 offset:65535 gds ; encoding: [0xff,0xff,0xfe,0xd8,0x01,0x00,0x00…
2983 # GFX11: ds_ordered_count v5, v1 gds ; encoding: [0x00,0x00,0xfe,0xd8,0x01,0x00,0x00,0x…
2986 # GFX11: ds_ordered_count v5, v1 offset:4 gds ; encoding: [0x04,0x00,0xfe,0xd8,0x01,0x00,0x00,0x…
2989 # GFX11: ds_ordered_count v5, v1 offset:65535 gds ; encoding: [0xff,0xff,0xfe,0xd8,0x01,0x00,0x00,0…
2992 # GFX11: ds_ordered_count v5, v255 offset:65535 gds ; encoding: [0xff,0xff,0xfe,0xd8,0xff,0x00,0x00…
H A Dgfx10_dasm_all.txt5609 # GFX10: ds_ordered_count v255, v1 offset:65535 gds ; encoding: [0xff,0xff,0xfe,0xd8,0x01,0x00,0x00…
5612 # GFX10: ds_ordered_count v5, v1 gds ; encoding: [0x00,0x00,0xfe,0xd8,0x01,0x00,0x00,0x…
5615 # GFX10: ds_ordered_count v5, v1 offset:4 gds ; encoding: [0x04,0x00,0xfe,0xd8,0x01,0x00,0x00,0x…
5618 # GFX10: ds_ordered_count v5, v1 offset:65535 gds ; encoding: [0xff,0xff,0xfe,0xd8,0x01,0x00,0x00,0…
5621 # GFX10: ds_ordered_count v5, v255 offset:65535 gds ; encoding: [0xff,0xff,0xfe,0xd8,0xff,0x00,0x00…
H A Dgfx9_dasm_all.txt2514 # CHECK: ds_ordered_count v5, v1 offset:65535 gds ; encoding: [0xff,0xff,0x7f,0xd9,0x01,0x00,0x00,0…
2517 # CHECK: ds_ordered_count v255, v1 offset:65535 gds ; encoding: [0xff,0xff,0x7f,0xd9,0x01,0x00,0x00…
2520 # CHECK: ds_ordered_count v5, v255 offset:65535 gds ; encoding: [0xff,0xff,0x7f,0xd9,0xff,0x00,0x00…
2523 # CHECK: ds_ordered_count v5, v1 gds ; encoding: [0x00,0x00,0x7f,0xd9,0x01,0x00,0x00,0x…
2526 # CHECK: ds_ordered_count v5, v1 offset:4 gds ; encoding: [0x04,0x00,0x7f,0xd9,0x01,0x00,0x00,0x…
H A Dgfx8_dasm_all.txt2370 # CHECK: ds_ordered_count v5, v1 offset:65535 gds ; encoding: [0xff,0xff,0x7f,0xd9,0x01,0x00,0x00,0…
2373 # CHECK: ds_ordered_count v255, v1 offset:65535 gds ; encoding: [0xff,0xff,0x7f,0xd9,0x01,0x00,0x00…
2376 # CHECK: ds_ordered_count v5, v255 offset:65535 gds ; encoding: [0xff,0xff,0x7f,0xd9,0xff,0x00,0x00…
2379 # CHECK: ds_ordered_count v5, v1 gds ; encoding: [0x00,0x00,0x7f,0xd9,0x01,0x00,0x00,0x…
2382 # CHECK: ds_ordered_count v5, v1 offset:4 gds ; encoding: [0x04,0x00,0x7f,0xd9,0x01,0x00,0x00,0x…
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX7.rst129ds_ordered_count :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
H A DAMDGPUAsmGFX8.rst133ds_ordered_count :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
H A DAMDGPUAsmGFX9.rst133ds_ordered_count :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
H A DAMDGPUAsmGFX10.rst347ds_ordered_count :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vaddr<amdg…
H A DAMDGPUAsmGFX1030.rst328ds_ordered_count :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vaddr<am…