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/llvm-project-15.0.7/openmp/runtime/test/tasking/
H A Domp_task_priority2.c33 delay(10); // sleep 10 ms in main()
41 delay(20); // sleep 20 ms in main()
49 delay(1); // sleep 1 ms in main()
57 delay(1); // sleep 1 ms in main()
63 delay(5); in main()
81 delay(10); // sleep 10 ms in main()
89 delay(20); // sleep 20 ms in main()
97 delay(1); // sleep 1 ms in main()
105 delay(1); // sleep 1 ms in main()
113 delay(5); in main()
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/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dnacl-branch-delay.ll20 ; We first make sure that for non-NaCl targets branch-delay slot contains
23 ; Check that branch-delay slot is used to load argument from x before function
29 ; Check that branch-delay slot is used for adjusting sp before return.
35 ; For NaCl, check that branch-delay slot doesn't contain dangerous instructions.
53 ; Check that branch-delay slot is used for storing to x before function call.
58 ; Check that branch-delay slot is used for adjusting sp before return.
64 ; For NaCl, check that branch-delay slot doesn't contain dangerous instructions.
H A Dtls-static.ll1 ; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler \
3 ; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler \
6 ; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler -mips-fix-global-base-reg=false \
8 ; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler -mips-fix-global-base-reg=false \
H A Ddelay-slot-filler-bundled-insts-def-use.mir2 ## Check that the delay-slot filler looks at the registers defined by BUNDLE instructions
3 # RUN: llc %s -run-pass=mips-delay-slot-filler -verify-machineinstrs -o - | FileCheck %s
5 ; ModuleID = '/Users/alex/cheri/llvm-project/llvm/test/CodeGen/Mips/delay-test.ll'
6 source_filename = "/Users/alex/cheri/llvm-project/llvm/test/CodeGen/Mips/delay-test.ll"
H A Ddelay-slot-filler-bundled-insts.mir2 ## Check that the delay-slot filler does not attempt to split BUNDLE instructions
3 # RUN: llc %s -start-before=mips-delay-slot-filler -stop-after=mips-delay-slot-filler \
6 # RUN: llc %s -start-before=mips-delay-slot-filler -verify-machineinstrs -o - | FileCheck %s -check…
126 ; This BUNDLE instruction must not be split by the delay slot filler:
H A Dbrdelayslot.ll32 ; Check that cvt.d.w goes into jalr's delay slot.
51 ; Check that branch delay slot can be filled with an instruction with operand
79 ; Check that delay slot filler can place mov.s or mov.d in delay slot.
132 ; Check that delay slots of branches in both the entry block and loop body are
/llvm-project-15.0.7/lldb/unittests/tools/lldb-server/inferior/
H A Dthread_inferior.cpp21 std::atomic<bool> delay(true); in main() local
24 threads.push_back(std::thread([&delay] { in main()
25 while (delay.load()) in main()
34 delay.store(false); in main()
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dphi-select-constant.ll10 ; CHECK: delay:
17 br i1 %which, label %final, label %delay
19 delay:
23 %use2 = phi i1 [ false, %entry ], [ icmp eq (i32* @A, i32* @B), %delay ]
34 ; CHECK: delay:
41 br i1 %which, label %final, label %delay
43 delay:
47 … <i1 true, i1 true, i1 true, i1 true>, %entry ], [ <i1 true, i1 true, i1 false, i1 false>, %delay ]
56 ; CHECK: delay:
63 br i1 %which, label %final, label %delay
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H A Dpr38677.ll11 ; CHECK: delay:
21 br i1 true, label %final, label %delay
23 delay: ; preds = %entry
26 final: ; preds = %delay, %entry
27 %use2 = phi i1 [ false, %entry ], [ icmp eq (ptr @A, ptr @B), %delay ]
/llvm-project-15.0.7/openmp/runtime/test/ompt/
H A Dompt-signal.h3 #define delay() Sleep(1); macro
6 #define delay(t) usleep(t); macro
27 delay(10); in ompt_wait()
/llvm-project-15.0.7/openmp/tools/archer/tests/ompt/
H A Dompt-signal.h15 #define delay() Sleep(1); macro
18 #define delay(t) usleep(t); macro
38 delay(10); in ompt_wait()
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/
H A Davr-rust-issue-123.ll24 @delay = hidden global %UInt32 zeroinitializer, align 4
49 ; CHECK: sts delay+3, r{{[0-9]+}}
50 ; CHECK-NEXT: sts delay+2, r{{[0-9]+}}
51 ; CHECK-NEXT: sts delay+1, r{{[0-9]+}}
52 ; CHECK-NEXT: sts delay, r{{[0-9]+}}
53 store i32 %tmp5, i32* getelementptr inbounds (%UInt32, %UInt32* @delay, i64 0, i32 0), align 4
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/
H A Dpr32544.ll20 br i1 %which, label %final, label %delay
22 delay:
28 %z = phi i64 [ %x2, %entry ], [ %y2, %delay ]
49 br i1 %which, label %final, label %delay
51 delay:
56 %z = phi i32 [ %x, %entry ], [ %y, %delay ]
/llvm-project-15.0.7/openmp/runtime/test/ompt/tasks/
H A Ddependences_mutexinoutset.c30 delay(100); in main()
38 delay(100); in main()
/llvm-project-15.0.7/openmp/runtime/test/ompt/cancel/
H A Dcancel_worksharing.c29 delay(10000); in main()
46 delay(10000); in main()
/llvm-project-15.0.7/lldb/test/API/functionalities/thread/concurrent_events/
H A Dmain.cpp25 int delay; member
32 sleep(args->delay); in do_action_args()
161 delay_arg.delay = 1; in dotest()
/llvm-project-15.0.7/compiler-rt/test/asan/TestCases/Posix/
H A Dhalt_on_error-torture.cpp29 struct timespec delay = { 0, static_cast<long>((*seed % 1000) * 1000) }; in random_delay() local
30 nanosleep(&delay, 0); in random_delay()
H A Dhalt_on_error-signals.c22 struct timespec delay = { 0, (*seed % 1000) * 1000 }; in random_delay() local
23 nanosleep(&delay, 0); in random_delay()
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/compactbranches/
H A Dno-beqzc-bnezc.ll1 ; RUN: llc -march=mipsel -mcpu=mips32r6 -disable-mips-delay-filler < %s | FileCheck %s
2 ; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s -filetype=obj \
4 ; RUN: llc -march=mipsel -mcpu=mips64r6 -disable-mips-delay-filler -target-abi=n64 < %s | FileCheck…
5 ; RUN: llc -march=mips -mcpu=mips64r6 -disable-mips-delay-filler -target-abi=n64 < %s -filetype=obj…
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmulti-64bit-func.ll3 ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler < %s
4 ; Run it again without extra nop in delay slot
/llvm-project-15.0.7/lldb/test/API/tools/lldb-vscode/attach/
H A DTestVSCode_attach.py20 def spawn_and_wait(program, delay): argument
21 if delay:
22 time.sleep(delay)
/llvm-project-15.0.7/openmp/runtime/test/worksharing/for/
H A Dkmp_sch_simd_guided.c13 #define delay() Sleep(1); macro
16 #define delay() usleep(10); macro
188 delay(); in run_loop_64()
343 delay(); in run_loop_32()
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/Mips/
H A Dcall-site-info-update-delay-slot-filler.mir2 # RUN: llc -mtriple mips-linux-gnu -emit-call-site-info -run-pass=mips-delay-slot-filler %s -o -| F…
10 ## clang --target=mips-linux-gnu -march=mips32r6 -g -O2 -c m.c -mllvm -stop-before=mips-delay-slot-…
12 ## Confirm that call site info exists after mips-delay-slot-filler, although,
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/
H A Dcall.ll7 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tai…
8 …cpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mips-delay-filler -mips-tail…
14 ; RUN: llc -march=mips64 -mcpu=mips64r6 -relocation-model=pic -disable-mips-delay-filler -mips-ta…
19 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tai…
20 …cpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mips-delay-filler -mips-tail…
26 ; RUN: llc -march=mips64 -mcpu=mips64r6 -relocation-model=pic -disable-mips-delay-filler -mips-ta…
/llvm-project-15.0.7/llvm/test/Transforms/NewGVN/
H A Dcompleteness.ll86 ; CHECK: delay:
95 br i1 %which, label %final, label %delay
97 delay:
101 %A = phi i32 [ 1000, %entry ], [ 10, %delay ]
110 ; CHECK: delay:
119 br i1 %which, label %final, label %delay
121 delay:
125 %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
134 ; CHECK: delay:
143 br i1 %which, label %final, label %delay
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