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Searched refs:WLEntry (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/MC/
H A DMCSchedule.cpp46 const MCWriteLatencyEntry *WLEntry = in computeInstrLatency() local
49 if (WLEntry->Cycles < 0) in computeInstrLatency()
50 return WLEntry->Cycles; in computeInstrLatency()
51 Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles)); in computeInstrLatency()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetSchedule.cpp220 const MCWriteLatencyEntry *WLEntry = in computeOperandLatency() local
222 unsigned WriteID = WLEntry->WriteResourceID; in computeOperandLatency()
223 unsigned Latency = capLatency(WLEntry->Cycles); in computeOperandLatency()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp1107 MCWriteLatencyEntry WLEntry; in GenSchedClassTables() local
1108 WLEntry.Cycles = 0; in GenSchedClassTables()
1117 WLEntry.WriteResourceID = WriteID; in GenSchedClassTables()
1129 WLEntry.Cycles += WriteRes->getValueAsInt("Latency"); in GenSchedClassTables()
1181 WriteLatencies.push_back(WLEntry); in GenSchedClassTables()
1299 MCWriteLatencyEntry &WLEntry = SchedTables.WriteLatencies[WLIdx]; in EmitSchedClassTables() local
1300 OS << " {" << format("%2d", WLEntry.Cycles) << ", " in EmitSchedClassTables()
1301 << format("%2d", WLEntry.WriteResourceID) << "}"; in EmitSchedClassTables()
/llvm-project-15.0.7/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp220 const MCWriteLatencyEntry *WLEntry = STI->getWriteLatencyEntry(SCDesc, in getLatency() local
222 Latency = std::max(Latency, WLEntry->Cycles); in getLatency()