Home
last modified time | relevance | path

Searched refs:RISCVPassConfig (Results 1 – 1 of 1) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVTargetMachine.cpp185 return new RISCVPassConfig(*this, PM); in createPassConfig()
188 void RISCVPassConfig::addIRPasses() { in addIRPasses()
200 bool RISCVPassConfig::addPreISel() { in addPreISel()
210 bool RISCVPassConfig::addInstSelector() { in addInstSelector()
216 bool RISCVPassConfig::addIRTranslator() { in addIRTranslator()
226 bool RISCVPassConfig::addRegBankSelect() { in addRegBankSelect()
236 void RISCVPassConfig::addPreSched2() {} in addPreSched2()
238 void RISCVPassConfig::addPreEmitPass() { in addPreEmitPass()
243 void RISCVPassConfig::addPreEmitPass2() { in addPreEmitPass2()
258 void RISCVPassConfig::addPreRegAlloc() { in addPreRegAlloc()
[all …]