Home
last modified time | relevance | path

Searched refs:MachineCSE (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineCSE.cpp65 class MachineCSE : public MachineFunctionPass { class
76 MachineCSE() : MachineFunctionPass(ID) { in MachineCSE() function in __anonde9b50940111::MachineCSE
155 char MachineCSE::ID = 0;
157 char &llvm::MachineCSEID = MachineCSE::ID;
159 INITIALIZE_PASS_BEGIN(MachineCSE, DEBUG_TYPE,
163 INITIALIZE_PASS_END(MachineCSE, DEBUG_TYPE, in INITIALIZE_PASS_DEPENDENCY()
226 bool MachineCSE::isPhysDefTriviallyDead( in isPhysDefTriviallyDead()
400 bool MachineCSE::isCSECandidate(MachineInstr *MI) { in isCSECandidate()
501 void MachineCSE::EnterScope(MachineBasicBlock *MBB) { in EnterScope()
507 void MachineCSE::ExitScope(MachineBasicBlock *MBB) { in ExitScope()
[all …]
H A DCMakeLists.txt105 MachineCSE.cpp
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb/
H A Dmachine-cse-physreg.mir4 # MachineCSE, see PR32538.
6 # MachineCSE must not remove this def of $cpsr:
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-cmp-51.ll1 ; Check that modelling of CC/CCRegs does not stop MachineCSE from
2 ; removing a compare. MachineCSE will not extend a live range of an
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dcse-add-with-overflow.ll5 ; MachineCSE should coalesce trivial subregister copies.
7 ; The extra movl+addl should be removed during MachineCSE.
H A Drdrand.ll58 ; Check that MachineCSE doesn't eliminate duplicate rdrand instructions.
/llvm-project-15.0.7/llvm/test/CodeGen/MSP430/
H A Dselect-use-sr.ll6 ; Test that CMP instruction is not removed by MachineCSE.
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dno-cse-nonlocal-convergent-instrs.mir11 # This is a coverage test for the MachineCSE change. It does not reproduce an
14 # undeniably functionally breaks without the associated MachineCSE changes.
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/CodeGen/
H A DBUILD.gn110 "MachineCSE.cpp",
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Duniform-cfg.ll394 ; uniform. MachineCSE replaces the 2nd condition with the inverse of
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dmachine-cse.ll7 ; Make sure MachineCSE can combine the adds with the operands commuted.
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIInstructions.td472 // register. MachineCSE skips copies, and we don't want to have to
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td6265 // extract is free and this gives better MachineCSE results.