Searched refs:DLS (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1012 SDLoc DLS = SOp; in ppSimplifyOrSelect0() local
1014 SDValue NewOr = DAG.getNode(ISD::OR, DLS, VT, SX, VOp); in ppSimplifyOrSelect0()
1015 SDValue NewSel = DAG.getNode(ISD::SELECT, DLS, VT, SC, NewOr, VOp); in ppSimplifyOrSelect0()
1018 SDValue NewOr = DAG.getNode(ISD::OR, DLS, VT, SY, VOp); in ppSimplifyOrSelect0()
1019 SDValue NewSel = DAG.getNode(ISD::SELECT, DLS, VT, SC, VOp, NewOr); in ppSimplifyOrSelect0()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb2.td | 370 // Label operands for BF/BFL/WLS/DLS/LE
5520 // t2DoLoopStart a pseudo for DLS hardware loops. Lowered into a DLS in
5529 // ARMLowOverheadLoops when it is converted to a DLSTP or DLS as required.
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/LowOverheadLoops/ |
| H A D | wls-revert-placement.mir | 4 # This is a large test for block placement, including reverting WLS to DLS. It
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