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Searched refs:ARMv8 (Results 1 – 25 of 40) sorted by relevance

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/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dbasic-thumb2-instructions-v8.s1 @ New ARMv8 T32 encodings
6 @ HLT (in ARMv8 only)
22 @ Can accept AL condition code (in ARMv8 only)
27 @ Can accept SP as rGPR (in ARMv8 only)
36 @ CHECK-V7: note: instruction variant requires ARMv8 or later
41 @ CHECK-V7: note: instruction variant requires ARMv8 or later
48 @ DCPS{1,2,3} (in ARMv8 only)
60 @ DMB (ARMv8-only barriers)
77 @ DSB (ARMv8-only barriers)
94 @ SEVL (in ARMv8 only)
H A Dthumb2-diagnostics.s177 @ CHECK-ERRORS-V7: error: instruction variant requires ARMv8 or later
183 @ CHECK-ERRORS-V7: error: instruction variant requires ARMv8 or later
188 @ CHECK-ERRORS-V7: error: instruction variant requires ARMv8 or later
194 @ CHECK-ERRORS-V7: error: instruction variant requires ARMv8 or later
H A Dbasic-arm-instructions-v8.s1 @ New ARMv8 A32 encodings
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dfloat-intrinsics-double.ll3 …s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP -check-prefix=FP-ARMv8
6 …s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=FP-ARMv8
143 ; FP-ARMv8: vrintm.f64
153 ; FP-ARMv8: vrintp.f64
163 ; FP-ARMv8: vrintz.f64
173 ; FP-ARMv8: vrintx.f64
183 ; FP-ARMv8: vrintr.f64
193 ; FP-ARMv8: vrinta.f64
205 ; FP-ARMv8: vfma.f64
215 ; FP-ARMv8: vcvt{{[bt]}}.f16.f64
[all …]
H A Dfloat-intrinsics-float.ll4 …check-prefix=CHECK -check-prefix=HARD -check-prefix=VFP -check-prefix=FP-ARMv8 -check-prefix=VMLA
5 …s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=FP-ARMv8 -check-prefix=VMLA
7 …ck-prefix=CHECK -check-prefix=HARD -check-prefix=NEON-A57 -check-prefix=FP-ARMv8 -check-prefix=VMLA
149 ; FP-ARMv8: vrintm.f32
159 ; FP-ARMv8: vrintp.f32
169 ; FP-ARMv8: vrintz.f32
179 ; FP-ARMv8: vrintx.f32
189 ; FP-ARMv8: vrintr.f32
199 ; FP-ARMv8: vrinta.f32
H A Dfloat-ops.ll3 …ex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=FP-ARMv8
272 ; FP-ARMv8: vseleq.f32 s0, s1, s0
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dthumb2-v8.txt8 # These are the only coprocessor instructions that remain defined in ARMv8
H A Dbasic-arm-instructions-v8.txt26 # These are the only coprocessor instructions that remain defined in ARMv8
H A Dinvalid-thumbv8.txt3 # Coprocessors other than CP10, CP11, CP14 and CP15 are undefined in ARMv8;
H A Dinvalid-armv8.txt3 # Coprocessors other than CP10, CP11, CP14 and CP15 are undefined in ARMv8;
H A Dinvalid-thumbv7.txt372 # SP is invalid as rGPR before ARMv8
/llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/ARM/
H A Dattribute-8.s16 @CHECK-OBJ-NEXT: Description: ARMv8-a FP-D16
H A Dattribute-7.s16 @CHECK-OBJ-NEXT: Description: ARMv8-a FP
H A Dattribute-4.s23 @CHECK-OBJ-NEXT: Description: ARMv8.1-a NEON
H A Dattribute-3.s23 @CHECK-OBJ-NEXT: Description: ARMv8-a NEON
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64.td23 "Enable ARMv8 FP">;
56 "Enable ARMv8 CRC-32 checksum instructions">;
59 "Enable ARMv8 Reliability, Availability and Serviceability Extensions">;
62 "Enable ARMv8.1 Large System Extension (LSE) atomic instructions">;
65 "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules">;
75 "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions">;
92 "Enable ARMv8 PMUv3 Performance Monitors extension">;
/llvm-project-15.0.7/clang/include/clang/Basic/
H A Darm_fp16.td16 // ARMv8.2-A FP16 intrinsics.
H A Darm_neon.td1649 // ARMv8.2-A FP16 vector intrinsics for A32/A64.
1652 // ARMv8.2-A FP16 one-operand vector intrinsics.
1690 // ARMv8.2-A FP16 two-operands vector intrinsics.
1743 // ARMv8.2-A FP16 three-operands vector intrinsics.
1749 // ARMv8.2-A FP16 lane vector intrinsics.
1769 // Already implemented prior to ARMv8.2-A.
1782 // ARMv8.2-A FP16 vector intrinsics for A64 only.
1806 // ARMv8.2-A FP16 lane vector intrinsics.
1857 // ARMv8.2-A FP16 reduction vector intrinsics.
H A DBuiltinsARM.def169 // ARMv8-M Security Extensions a.k.a CMSE
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dbuild-attributes.ll170 ; ARMv8.1a (AArch32)
222 ; ARMv8-R
227 ; ARMv8-M
1191 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1353 ;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1453 ;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1483 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1513 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1543 ;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1574 ;; The Exynos processors have the ARMv8 FP unit, which always flushes preserving sign.
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMPredicates.td151 "ARMv8-M Security Extensions">;
H A DARM.td117 defm FeatureFPARMv8: VFPver<"fp-armv8", "HasFPARMv8", "Enable ARMv8 FP",
182 // True if processor supports ARMv8-M Security Extensions.
184 "Enable support for ARMv8-M "
204 // True if the ARMv8.2A dot product instructions are supported.
/llvm-project-15.0.7/llvm/docs/
H A DCompilerWriterInfo.rst19 * `ARMv8-A Architecture Reference Manual <https://developer.arm.com/docs/ddi0487/latest>`_ This doc…
/llvm-project-15.0.7/llvm/docs/TableGen/
H A Dindex.rst207 "Enable ARMv8 FP">;
/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp676 #define ARMv8 (1u << 10) macro
681 ARMv7S | ARMv8)
684 ARMv8)
686 (ARMv5TE | ARMv5TEJ | ARMv6 | ARMv6K | ARMv6T2 | ARMv7 | ARMv7S | ARMv8)
688 (ARMv5TEJ | ARMv6 | ARMv6K | ARMv6T2 | ARMv7 | ARMv7S | ARMv8)
689 #define ARMV6_ABOVE (ARMv6 | ARMv6K | ARMv6T2 | ARMv7 | ARMv7S | ARMv8)
690 #define ARMV6T2_ABOVE (ARMv6T2 | ARMv7 | ARMv7S | ARMv8)
691 #define ARMV7_ABOVE (ARMv7 | ARMv7S | ARMv8)
13790 m_arm_isa = ARMv8; in SetArchitecture()

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