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Searched refs:xe_reg (Results 1 – 25 of 34) sorted by relevance

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/linux-6.15/drivers/gpu/drm/xe/
H A Dxe_mmio.h12 struct xe_reg;
19 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);
20 u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);
21 void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
22 u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);
23 u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);
24 int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval…
25 bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg …
27 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
28 int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
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H A Dxe_oa_types.h81 struct xe_reg oa_head_ptr;
82 struct xe_reg oa_tail_ptr;
83 struct xe_reg oa_buffer;
84 struct xe_reg oa_ctx_ctrl;
85 struct xe_reg oa_ctrl;
86 struct xe_reg oa_debug;
87 struct xe_reg oa_status;
H A Dxe_mmio.c173 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read8()
187 u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read16()
201 void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val) in xe_mmio_write32()
213 u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read32()
231 u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set) in xe_mmio_rmw32()
243 struct xe_reg reg, u32 val, u32 mask, u32 eval) in xe_mmio_write32_and_verify()
255 struct xe_reg reg) in xe_mmio_in_range()
284 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read64_2x32()
286 struct xe_reg reg_udw = { .addr = reg.addr + 0x4 }; in xe_mmio_read64_2x32()
312 static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, in __xe_mmio_wait32()
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H A Dxe_gt_sriov_pf_service.c108 static const struct xe_reg tgl_runtime_regs[] = {
119 static const struct xe_reg ats_m_runtime_regs[] = {
131 static const struct xe_reg pvc_runtime_regs[] = {
143 static const struct xe_reg ver_1270_runtime_regs[] = {
157 static const struct xe_reg ver_2000_runtime_regs[] = {
174 static const struct xe_reg ver_3000_runtime_regs[] = {
194 const struct xe_reg *regs; in pick_runtime_regs()
225 const struct xe_reg *regs; in pf_alloc_runtime_info()
253 const struct xe_reg *regs, u32 *values) in read_many()
261 const struct xe_reg *regs; in pf_prepare_runtime_info()
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H A Dxe_gt_sriov_vf.h13 struct xe_reg;
27 u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg);
28 void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val);
H A Dxe_gt_sriov_pf.c130 static struct xe_reg xe_reg_vf_to_pf(struct xe_reg vf_reg, unsigned int vfid, u32 stride) in xe_reg_vf_to_pf()
132 struct xe_reg pf_reg = vf_reg; in xe_reg_vf_to_pf()
143 struct xe_reg scratch; in pf_clear_vf_scratch_regs()
H A Dxe_gt_sriov_pf_service_types.h11 struct xe_reg;
32 const struct xe_reg *regs;
H A Dxe_force_wake_types.h61 struct xe_reg reg_ctl;
63 struct xe_reg reg_ack;
H A Dxe_hw_engine.h79 void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe, struct xe_reg reg, u32 val);
80 u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg);
H A Dxe_gt_mcr.c51 static inline struct xe_reg to_xe_reg(struct xe_reg_mcr reg_mcr) in to_xe_reg()
563 const struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_get_nonterminated_steering()
640 const struct xe_reg reg = to_xe_reg(reg_mcr); in rw_with_mcr_steering()
642 struct xe_reg steer_reg; in rw_with_mcr_steering()
707 const struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_unicast_read_any()
786 struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_multicast_write()
H A Dxe_reg_sr_types.h15 struct xe_reg reg;
H A Dxe_reg_sr.c124 static struct xe_reg_mcr to_xe_reg_mcr(const struct xe_reg reg) in to_xe_reg_mcr()
131 struct xe_reg reg = entry->reg; in apply_one_mmio()
H A Dxe_guc_capture_types.h31 struct xe_reg reg;
H A Dxe_guc_types.h113 struct xe_reg notify_reg;
H A Dxe_hwmon.c84 static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg hwmon_reg, in xe_hwmon_get_reg()
167 struct xe_reg rapl_limit, pkg_power_sku; in xe_hwmon_power_max_read()
212 struct xe_reg rapl_limit; in xe_hwmon_power_max_write()
242 struct xe_reg reg = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel); in xe_hwmon_power_rated_max_read()
848 struct xe_reg pkg_power_sku_unit; in xe_hwmon_get_preregistration_info()
H A Dxe_rtp_types.h24 struct xe_reg reg;
H A Dxe_force_wake.c32 struct xe_reg reg, struct xe_reg ack) in init_domain()
H A Dxe_gt_topology.c30 fuse_val[i] = xe_mmio_read32(&gt->mmio, va_arg(argp, struct xe_reg)); in load_dss_mask()
H A Dxe_huc.c217 struct xe_reg reg;
H A Dxe_gt.c183 static struct xe_reg_mcr to_xe_reg_mcr(const struct xe_reg reg) in to_xe_reg_mcr()
218 struct xe_reg reg = entry->reg; in emit_wa_job()
H A Dxe_hw_engine.c296 struct xe_reg reg, u32 val) in xe_hw_engine_mmio_write32()
316 u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg) in xe_hw_engine_mmio_read32()
H A Dxe_guc_ads.c720 struct xe_reg reg, in guc_mmio_regset_write_one()
756 struct xe_reg reg; in guc_mmio_regset_write()
/linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/
H A Dintel_uncore.h37 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read()
45 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read8()
53 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read16()
80 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_posting_read()
88 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_write()
96 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_rmw()
105 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_wait_for_register()
115 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_wait_for_register_fw()
126 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in __intel_wait_for_register()
145 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read_fw()
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/linux-6.15/drivers/gpu/drm/xe/regs/
H A Dxe_reg_defs.h32 struct xe_reg { struct
61 static_assert(sizeof(struct xe_reg) == sizeof(u32));
72 struct xe_reg __reg;
120 #define XE_REG(r_, ...) ((const struct xe_reg)XE_REG_INITIALIZER(r_, ##__VA_ARGS__))
132 static inline bool xe_reg_is_valid(struct xe_reg r) in xe_reg_is_valid()
/linux-6.15/drivers/gpu/drm/xe/display/
H A Dxe_plane_initial.c31 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); in intel_plane_initial_vblank_wait()

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