Searched refs:vlv_dpio_write (Results 1 – 6 of 6) sorted by relevance
| /linux-6.15/drivers/gpu/drm/i915/display/ |
| H A D | intel_dpio_phy.c | 747 vlv_dpio_write(dev_priv, phy, VLV_PCS01_DW9(ch), val); in chv_set_phy_signal_level() 893 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW5_CH0, val); in chv_phy_pre_pll_enable() 901 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW1_CH1, val); in chv_phy_pre_pll_enable() 933 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW19(ch), val); in chv_phy_pre_pll_enable() 994 vlv_dpio_write(dev_priv, phy, VLV_PCS01_DW12(ch), in chv_phy_pre_encoder_enable() 1002 vlv_dpio_write(dev_priv, phy, VLV_PCS23_DW12(ch), in chv_phy_pre_encoder_enable() 1041 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW5_CH0, val); in chv_phy_post_pll_disable() 1045 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW1_CH1, val); in chv_phy_post_pll_disable() 1076 vlv_dpio_write(dev_priv, phy, VLV_TX_DW2_GRP(ch), in vlv_set_phy_signal_level() 1101 vlv_dpio_write(dev_priv, phy, VLV_PCS_DW0_GRP(ch), in vlv_phy_pre_pll_enable() [all …]
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| H A D | intel_dpll.c | 1969 vlv_dpio_write(dev_priv, phy, VLV_PLL_DW18(ch), in vlv_prepare_pll() 1972 vlv_dpio_write(dev_priv, phy, VLV_PLL_DW18(ch), in vlv_prepare_pll() 1978 vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch), in vlv_prepare_pll() 1981 vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch), in vlv_prepare_pll() 1986 vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch), in vlv_prepare_pll() 1989 vlv_dpio_write(dev_priv, phy, VLV_PLL_DW5(ch), in vlv_prepare_pll() 2060 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW13(ch), in chv_prepare_pll() 2067 vlv_dpio_write(dev_priv, phy, CHV_PLL_DW0(ch), in chv_prepare_pll() 2071 vlv_dpio_write(dev_priv, phy, CHV_PLL_DW1(ch), in chv_prepare_pll() 2076 vlv_dpio_write(dev_priv, phy, CHV_PLL_DW2(ch), in chv_prepare_pll() [all …]
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| H A D | intel_display_power_well.c | 1464 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW28, tmp); in chv_dpio_cmn_power_well_enable() 1469 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW6_CH1, tmp); in chv_dpio_cmn_power_well_enable() 1478 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW30, tmp); in chv_dpio_cmn_power_well_enable()
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| /linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/ |
| H A D | vlv_sideband.h | 87 static inline void vlv_dpio_write(struct drm_i915_private *i915, in vlv_dpio_write() function
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| /linux-6.15/drivers/gpu/drm/i915/ |
| H A D | vlv_sideband.h | 79 void vlv_dpio_write(struct drm_i915_private *i915,
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| H A D | vlv_sideband.c | 230 void vlv_dpio_write(struct drm_i915_private *i915, in vlv_dpio_write() function
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