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Searched refs:rtw_write32_set (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/net/wireless/realtek/rtw88/
H A Drtw8821c.c194 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8821c_phy_set_param()
280 rtw_write32_set(rtwdev, REG_DMEM_CTRL, BIT_WL_RST); in rtw8821c_switch_rf_set()
281 rtw_write32_set(rtwdev, REG_SYS_CTRL, BIT_FEN_EN); in rtw8821c_switch_rf_set()
512 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw8821c_set_channel_bb()
766 rtw_write32_set(rtwdev, REG_FAS, BIT(17)); in rtw8821c_false_alarm_statistics()
769 rtw_write32_set(rtwdev, REG_RXDESC, BIT(15)); in rtw8821c_false_alarm_statistics()
770 rtw_write32_set(rtwdev, REG_CNTRST, BIT(0)); in rtw8821c_false_alarm_statistics()
869 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821c_coex_cfg_ant_switch()
891 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821c_coex_cfg_ant_switch()
902 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821c_coex_cfg_ant_switch()
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H A Drtw8821a.c757 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in rtw8821a_coex_cfg_init()
775 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821a_coex_cfg_ant_switch()
784 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821a_coex_cfg_ant_switch()
792 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821a_coex_cfg_ant_switch()
801 rtw_write32_set(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL); in rtw8821a_coex_cfg_ant_switch()
H A Drtw88xxa.c315 rtw_write32_set(rtwdev, REG_FPGA0_XCD_RF_PARA, BIT(6)); in rtw88xxau_hw_reset()
940 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw88xxa_switch_band()
981 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw88xxa_switch_band()
1067 rtw_write32_set(rtwdev, REG_TXDMA_OFFSET_CHK, BIT_DROP_DATA_EN); in rtw88xxa_power_on()
1217 rtw_write32_set(rtwdev, REG_FWHW_TXQ_CTRL, BIT(12)); in rtw88xxa_power_on()
1270 rtw_write32_set(rtwdev, REG_CCA2ND, BIT(3)); in rtw88xxa_phy_read_rf()
1441 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw88xxa_post_set_bw_mode()
1706 rtw_write32_set(rtwdev, REG_FAS, BIT(17)); in rtw88xxa_false_alarm_statistics()
1709 rtw_write32_set(rtwdev, REG_CCK0_FAREPORT, BIT(15)); in rtw88xxa_false_alarm_statistics()
1710 rtw_write32_set(rtwdev, REG_CNTRST, BIT(0)); in rtw88xxa_false_alarm_statistics()
H A Drtw8822b.c163 rtw_write32_set(rtwdev, REG_WLRF1, BIT_WLRF1_BBRF_EN); in rtw8822b_phy_set_param()
175 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
672 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw8822b_set_channel_bb()
1061 rtw_write32_set(rtwdev, 0x9a4, BIT(17)); in rtw8822b_false_alarm_statistics()
1064 rtw_write32_set(rtwdev, 0xa2c, BIT(15)); in rtw8822b_false_alarm_statistics()
1065 rtw_write32_set(rtwdev, 0xb58, BIT(0)); in rtw8822b_false_alarm_statistics()
1112 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in rtw8822b_coex_cfg_init()
1113 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); in rtw8822b_coex_cfg_init()
1544 rtw_write32_set(rtwdev, REG_RD_CTRL, BIT_EDCCA_MSK_CNTDOWN_EN); in rtw8822b_adaptivity_init()
1550 rtw_write32_set(rtwdev, REG_EDCCA_DECISION, BIT_EDCCA_OPTION); in rtw8822b_adaptivity_init()
H A Drtw8822c.c91 rtw_write32_set(rtwdev, REG_3WIRE, BIT_3WIRE_PI_ON); in rtw8822c_header_file_init()
93 rtw_write32_set(rtwdev, REG_3WIRE2, BIT_3WIRE_PI_ON); in rtw8822c_header_file_init()
98 rtw_write32_set(rtwdev, REG_ENCCK, BIT_CCK_OFDM_BLK_EN); in rtw8822c_header_file_init()
736 rtw_write32_set(rtwdev, 0x1830, BIT(30)); in rtw8822c_dac_cal_backup()
737 rtw_write32_set(rtwdev, 0x4130, BIT(30)); in rtw8822c_dac_cal_backup()
749 rtw_write32_set(rtwdev, REG_DCKA_I_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
755 rtw_write32_set(rtwdev, REG_DCKA_Q_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
761 rtw_write32_set(rtwdev, REG_DCKB_I_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
767 rtw_write32_set(rtwdev, REG_DCKB_Q_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
1879 rtw_write32_set(rtwdev, REG_WLRF1, BIT_WLRF1_BBRF_EN); in rtw8822c_phy_set_param()
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H A Drtw8814a.c321 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8814a_phy_set_param()
1108 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw8814a_set_bw_mode()
1377 rtw_write32_set(rtwdev, REG_FAS, BIT(17)); in rtw8814a_false_alarm_statistics()
1380 rtw_write32_set(rtwdev, REG_CCK0_FAREPORT, BIT(15)); in rtw8814a_false_alarm_statistics()
1381 rtw_write32_set(rtwdev, REG_CNTRST, BIT(0)); in rtw8814a_false_alarm_statistics()
1442 rtw_write32_set(rtwdev, REG_CCK_RPT_FORMAT, BIT(2)); in rtw8814a_iqk_afe_setting()
1509 rtw_write32_set(rtwdev, REG_PRECTRL, BIT_IQ_WGT); in rtw8814a_iqk_configure_mac()
H A Dmac.c80 rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS); in rtw_mac_pre_system_cfg()
1201 rtw_write32_set(rtwdev, REG_RQPN_CTRL_2, BIT_LD_RQPN); in __priority_queue_cfg()
1249 rtw_write32_set(rtwdev, REG_AUTO_LLT, BIT_AUTO_INIT_LLT); in __priority_queue_cfg_legacy()
1382 rtw_write32_set(rtwdev, REG_RCR, BIT_APP_PHYSTS); in rtw_drv_info_cfg()
H A Dhci.h140 static inline void rtw_write32_set(struct rtw_dev *rtwdev, u32 addr, u32 bit) in rtw_write32_set() function
H A Drtw8723x.c649 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in __rtw8723x_coex_cfg_init()
650 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); in __rtw8723x_coex_cfg_init()
H A Drtw8812a.c809 rtw_write32_set(rtwdev, REG_CCASEL, BIT(31)); in rtw8812a_do_iqk()
831 rtw_write32_set(rtwdev, REG_CCASEL, BIT(31)); in rtw8812a_do_iqk()
H A Dmac80211.c437 rtw_write32_set(rtwdev, REG_FWHW_TXQ_CTRL, in rtw_ops_bss_info_changed()
468 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_HGQMD); in rtw_ops_start_ap()
H A Dbf.c372 rtw_write32_set(rtwdev, REG_TXBF_CTRL, BIT_USE_NDPA_PARAMETER); in rtw_bf_phy_init()
H A Drtw8723d.c107 rtw_write32_set(rtwdev, REG_FPGA0_RFMOD, BIT_CCKEN | BIT_OFDMEN); in rtw8723d_phy_set_param()
109 rtw_write32_set(rtwdev, REG_AFE_CTRL3, BIT_XTAL_GMP_BIT4); in rtw8723d_phy_set_param()
111 rtw_write32_set(rtwdev, REG_LDO_SWR_CTRL, BIT_XTA1); in rtw8723d_phy_set_param()
H A Dmain.c734 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE); in rtw_set_dtim_period()
2442 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); in rtw_core_enable_beacon()
2446 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); in rtw_core_enable_beacon()
H A Dwow.c301 rtw_write32_set(rtwdev, REG_RXPKT_NUM, BIT_RW_RELEASE); in rtw_wow_rx_dma_stop()
H A Dpci.c470 rtw_write32_set(rtwdev, RTK_PCI_TXBD_H2CQ_CSR, in rtw_pci_reset_buf_desc()
521 rtw_write32_set(rtwdev, RTK_PCI_CTRL, in rtw_pci_dma_reset()
H A Dfw.c1482 rtw_write32_set(rtwdev, REG_DWBCN0_CTRL, BIT_BCN_VALID); in rtw_fw_write_data_rsvd_page()
1808 rtw_write32_set(rtwdev, REG_RCR, BIT_DISGCLK); in rtw_fw_read_fifo_page()
H A Dsdio.c689 rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC); in rtw_sdio_enable_rx_aggregation()
H A Dusb.c1090 rtw_write32_set(rtwdev, REG_PAD_CTRL2, BIT_NO_PDN_CHIPOFF_V1); in rtw_usb_switch_mode_new()
H A Drtw8703b.c663 rtw_write32_set(rtwdev, REG_FPGA0_RFMOD, BIT_CCKEN | BIT_OFDMEN); in rtw8703b_phy_set_param()