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Searched refs:regVCN_MES_PIPE1_PRIORITY_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_offset.h1255 #define regVCN_MES_PIPE1_PRIORITY_BASE_IDX … macro
H A Dvcn_4_0_5_offset.h1430 #define regVCN_MES_PIPE1_PRIORITY_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h1651 #define regVCN_MES_PIPE1_PRIORITY_BASE_IDX … macro