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Searched refs:regMPC_OUT0_CSC_C31_C32_A_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h7325 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13117 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13096 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6873 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14183 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7444 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h6874 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7203 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7653 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h7664 #define regMPC_OUT0_CSC_C31_C32_A_BASE_IDX … macro