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Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5988 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_5_0_offset.h12836 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_5_1_offset.h12815 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_2_1_offset.h5536 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_4_offset.h13902 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_2_offset.h7235 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_2_0_offset.h5537 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_5_offset.h6994 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_4_1_0_offset.h6076 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_6_offset.h7455 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_SLOPE_CNTL_G … macro