Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5984 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_5_0_offset.h12832 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_5_1_offset.h12811 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_2_1_offset.h5532 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_4_offset.h13898 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_2_offset.h7231 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_2_0_offset.h5533 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_5_offset.h6990 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_4_1_0_offset.h6072 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_6_offset.h7451 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R … macro