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Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h6000 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_5_0_offset.h12848 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_5_1_offset.h12827 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_2_1_offset.h5548 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_4_offset.h13914 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_2_offset.h7247 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_2_0_offset.h5549 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_5_offset.h7006 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_4_1_0_offset.h6088 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_6_offset.h7467 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL2_B … macro