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Searched refs:regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5834 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_5_0_offset.h12682 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_5_1_offset.h12661 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_2_1_offset.h5382 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_1_4_offset.h13748 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_1_2_offset.h7081 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_2_0_offset.h5383 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_1_5_offset.h6840 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_4_1_0_offset.h5922 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro
H A Ddcn_3_1_6_offset.h7301 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_OFFSET_R … macro