Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5630 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_5_0_offset.h12478 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_5_1_offset.h12457 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_1_offset.h5178 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_4_offset.h13544 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_2_offset.h6877 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_0_offset.h5179 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_5_offset.h6636 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_4_1_0_offset.h5718 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_6_offset.h7097 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro