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Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5542 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_5_0_offset.h12390 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_5_1_offset.h12369 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_2_1_offset.h5090 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_1_4_offset.h13456 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_1_2_offset.h6789 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_2_0_offset.h5091 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_1_5_offset.h6548 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_4_1_0_offset.h5630 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro
H A Ddcn_3_1_6_offset.h7009 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_OFFSET_G … macro