Home
last modified time | relevance | path

Searched refs:regMPCC3_MPCC_OPP_ID_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5307 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h12250 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h12229 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4881 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h13319 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h6558 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h4882 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h6317 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h5405 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6778 #define regMPCC3_MPCC_OPP_ID_BASE_IDX … macro