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Searched refs:regMPCC2_MPCC_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5275 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h12218 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h12197 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4849 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h13289 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h6528 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h4850 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h6287 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h5373 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6748 #define regMPCC2_MPCC_CONTROL_BASE_IDX … macro