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Searched refs:regGFX_IMU_RLC_RAM_INDEX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v12_0.c368 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2); in imu_v12_0_program_rlc_ram()
389 reg_data = RREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX); in imu_v12_0_program_rlc_ram()
391 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data); in imu_v12_0_program_rlc_ram()
H A Dimu_v11_0.c356 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2); in imu_v11_0_program_rlc_ram()
376 reg_data = RREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX); in imu_v11_0_program_rlc_ram()
378 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data); in imu_v11_0_program_rlc_ram()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h9591 #define regGFX_IMU_RLC_RAM_INDEX … macro
H A Dgc_12_0_0_offset.h7147 #define regGFX_IMU_RLC_RAM_INDEX … macro
H A Dgc_11_0_0_offset.h11211 #define regGFX_IMU_RLC_RAM_INDEX … macro
H A Dgc_11_0_3_offset.h11614 #define regGFX_IMU_RLC_RAM_INDEX … macro