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Searched refs:regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h1135 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h11207 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h11186 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h885 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h12311 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h1278 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h885 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h981 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h1014 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1482 #define regDWB_OGAM_RAMB_END_CNTL1_G_BASE_IDX … macro